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authorDaniel Glöckner <dg@emlix.com>2009-09-22 23:46:38 (GMT)
committerLinus Torvalds <torvalds@linux-foundation.org>2009-09-23 14:39:48 (GMT)
commitff77c352ae17768c61cfc36357f0a3904552f11c (patch)
tree195c102f75445654e87453cbce284b2f658d13a8 /Documentation/gpio.txt
parentd120c17faeb391f5b4b99af8b1e190619934ecdd (diff)
gpiolib: allow poll() on value
Many gpio chips allow to generate interrupts when the value of a pin changes. This patch gives usermode application the opportunity to make use of this feature by calling poll(2) on the /sys/class/gpio/gpioN/value sysfs file. The edge to trigger can be set in the edge file in the same directory. Possible values are "none", "rising", "falling", and "both". Using level triggers is not possible with current sysfs since nothing changes the GPIO value (and the IRQ keeps triggering). Edge triggering will "just work". Note that if there was an event between read() and poll(), the poll() returns immediately. Also note that this version only supports true GPIO interrupts. Some later patch might be able to synthesize this behavior by timer-driven polling; some systems seem to need that. [dbrownell@users.sourceforge.net: align ids to 16 bit ids; whitespace] Signed-off-by: Daniel Glöckner <dg@emlix.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'Documentation/gpio.txt')
-rw-r--r--Documentation/gpio.txt7
1 files changed, 7 insertions, 0 deletions
diff --git a/Documentation/gpio.txt b/Documentation/gpio.txt
index 566edaa..fa4dc07 100644
--- a/Documentation/gpio.txt
+++ b/Documentation/gpio.txt
@@ -524,6 +524,13 @@ and have the following read/write attributes:
is configured as an output, this value may be written;
any nonzero value is treated as high.
+ "edge" ... reads as either "none", "rising", "falling", or
+ "both". Write these strings to select the signal edge(s)
+ that will make poll(2) on the "value" file return.
+
+ This file exists only if the pin can be configured as an
+ interrupt generating input pin.
+
GPIO controllers have paths like /sys/class/gpio/chipchip42/ (for the
controller implementing GPIOs starting at #42) and have the following
read-only attributes:

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