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authorTim Abbott <tabbott@ksplice.com>2009-09-20 22:14:15 (GMT)
committerSam Ravnborg <sam@ravnborg.org>2009-09-21 04:27:08 (GMT)
commitabe1ee3a221d53778c3e58747bbec6e518e5471b (patch)
tree5a3f7ee7bbc93ac893f6c77dedfd93c4a7277f04 /arch/x86/include/asm/cache.h
parent02b7da37f7acd49277dea1481dc0c5c246c09732 (diff)
Use macros for .data.page_aligned section.
This patch changes the remaining direct references to .data.page_aligned in C and assembly code to use the macros in include/linux/linkage.h. Signed-off-by: Tim Abbott <tabbott@ksplice.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Haavard Skinnemoen <hskinnemoen@atmel.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Diffstat (limited to 'arch/x86/include/asm/cache.h')
-rw-r--r--arch/x86/include/asm/cache.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/x86/include/asm/cache.h b/arch/x86/include/asm/cache.h
index 5d367ca..549860d 100644
--- a/arch/x86/include/asm/cache.h
+++ b/arch/x86/include/asm/cache.h
@@ -1,6 +1,8 @@
#ifndef _ASM_X86_CACHE_H
#define _ASM_X86_CACHE_H
+#include <linux/linkage.h>
+
/* L1 cache line size */
#define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT)
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
@@ -13,7 +15,7 @@
#ifdef CONFIG_SMP
#define __cacheline_aligned_in_smp \
__attribute__((__aligned__(1 << (INTERNODE_CACHE_SHIFT)))) \
- __attribute__((__section__(".data.page_aligned")))
+ __page_aligned_data
#endif
#endif

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