diff options
| author | Philipp Zabel <p.zabel@pengutronix.de> | 2018-06-01 09:13:16 -0400 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab+samsung@kernel.org> | 2018-07-26 15:21:50 -0400 |
| commit | 343b23a7c6b6680ef949e6112a4ee60688acf39d (patch) | |
| tree | 42b925d74b8420e33ad4909ff1969f0e44e06650 | |
| parent | 247fc572007db2fd12b7623e6e8b014d2f1d13cc (diff) | |
media: gpu: ipu-v3: Allow negative offsets for interlaced scanningold/cs_343b23a7c6b6
The IPU also supports interlaced buffers that start with the bottom field.
To achieve this, the the base address EBA has to be increased by a stride
length and the interlace offset ILO has to be set to the negative stride.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
| -rw-r--r-- | drivers/gpu/ipu-v3/ipu-cpmem.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c index 9f2d9ec42add..c1028f38c553 100644 --- a/drivers/gpu/ipu-v3/ipu-cpmem.c +++ b/drivers/gpu/ipu-v3/ipu-cpmem.c @@ -269,8 +269,14 @@ EXPORT_SYMBOL_GPL(ipu_cpmem_set_uv_offset); void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride) { + u32 ilo; + ipu_ch_param_write_field(ch, IPU_FIELD_SO, 1); - ipu_ch_param_write_field(ch, IPU_FIELD_ILO, stride / 8); + if (stride >= 0) + ilo = stride / 8; + else + ilo = 0x100000 - (-stride / 8); + ipu_ch_param_write_field(ch, IPU_FIELD_ILO, ilo); ipu_ch_param_write_field(ch, IPU_FIELD_SLY, (stride * 2) - 1); }; EXPORT_SYMBOL_GPL(ipu_cpmem_interlaced_scan); |