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authorRalf Baechle <ralf@linux-mips.org>2005-12-09 12:29:38 +0000
committer <ralf@denk.linux-mips.net>2006-01-10 13:39:07 +0000
commitba339c03e2e8ede8ccd37ed6c4e564e3b1545495 (patch)
tree1a7bbfd15a9c46d5300d2d5a1890d748b81dbce2 /arch/mips/kernel/time.c
parent0401572a9b9b2f368176b6e53f53004fd048a566 (diff)
MIPS: Oprofile: Fixup the loose ends in the plumbing.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/time.c')
-rw-r--r--arch/mips/kernel/time.c26
1 files changed, 25 insertions, 1 deletions
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index 07e125c027b2..7050b4ffffcd 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -507,14 +507,38 @@ irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
return IRQ_HANDLED;
}
+int null_perf_irq(struct pt_regs *regs)
+{
+ return 0;
+}
+
+int (*perf_irq)(struct pt_regs *regs) = null_perf_irq;
+
+EXPORT_SYMBOL(null_perf_irq);
+EXPORT_SYMBOL(perf_irq);
+
asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs)
{
+ int r2 = cpu_has_mips_r2;
+
irq_enter();
kstat_this_cpu.irqs[irq]++;
+ /*
+ * Suckage alert:
+ * Before R2 of the architecture there was no way to see if a
+ * performance counter interrupt was pending, so we have to run the
+ * performance counter interrupt handler anyway.
+ */
+ if (!r2 || (read_c0_cause() & (1 << 26)))
+ if (perf_irq(regs))
+ goto out;
+
/* we keep interrupt disabled all the time */
- timer_interrupt(irq, NULL, regs);
+ if (!r2 || (read_c0_cause() & (1 << 30)))
+ timer_interrupt(irq, NULL, regs);
+out:
irq_exit();
}

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