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authorRobert P. J. Day <rpjday@crashcourse.ca>2018-09-08 10:20:05 (GMT)
committerWim Van Sebroeck <wim@linux-watchdog.org>2018-10-02 11:32:25 (GMT)
commitd08ec7bea2795be008736a852e67949c162669ed (patch)
tree865751d2ce29d835a3466cd5be2878c9b453a5fe /drivers/watchdog
parentd674ee232b2d9480033df9107a04b4b5436040e6 (diff)
watchdog: fix a small number of "watchog" typos in comments
All typos in comments, should not affect functionality. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
Diffstat (limited to 'drivers/watchdog')
-rw-r--r--drivers/watchdog/booke_wdt.c2
-rw-r--r--drivers/watchdog/via_wdt.c4
2 files changed, 3 insertions, 3 deletions
diff --git a/drivers/watchdog/booke_wdt.c b/drivers/watchdog/booke_wdt.c
index 3ad1e44..6e78a34 100644
--- a/drivers/watchdog/booke_wdt.c
+++ b/drivers/watchdog/booke_wdt.c
@@ -25,7 +25,7 @@
/* If the kernel parameter wdt=1, the watchdog will be enabled at boot.
* Also, the wdt_period sets the watchdog timer period timeout.
* For E500 cpus the wdt_period sets which bit changing from 0->1 will
- * trigger a watchog timeout. This watchdog timeout will occur 3 times, the
+ * trigger a watchdog timeout. This watchdog timeout will occur 3 times, the
* first time nothing will happen, the second time a watchdog exception will
* occur, and the final time the board will reset.
*/
diff --git a/drivers/watchdog/via_wdt.c b/drivers/watchdog/via_wdt.c
index b085ef1..d56d0a9 100644
--- a/drivers/watchdog/via_wdt.c
+++ b/drivers/watchdog/via_wdt.c
@@ -30,7 +30,7 @@
#define VIA_WDT_CONF_MMIO 0x02 /* 1: enable watchdog MMIO */
/*
- * The MMIO region contains the watchog control register and the
+ * The MMIO region contains the watchdog control register and the
* hardware timer counter.
*/
#define VIA_WDT_MMIO_LEN 8 /* MMIO region length in bytes */
@@ -82,7 +82,7 @@ static inline void wdt_reset(void)
/*
* Timer tick: the timer will make sure that the watchdog timer hardware
* is being reset in time. The conditions to do this are:
- * 1) the watchog timer has been started and /dev/watchdog is open
+ * 1) the watchdog timer has been started and /dev/watchdog is open
* and there is still time left before userspace should send the
* next heartbeat/ping. (note: the internal heartbeat is much smaller
* then the external/userspace heartbeat).

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