diff options
Diffstat (limited to 'drivers/staging/media/ipu3/ipu3-css.h')
-rw-r--r-- | drivers/staging/media/ipu3/ipu3-css.h | 83 |
1 files changed, 47 insertions, 36 deletions
diff --git a/drivers/staging/media/ipu3/ipu3-css.h b/drivers/staging/media/ipu3/ipu3-css.h index 12d80f87fcb4..e88d60f1a0c3 100644 --- a/drivers/staging/media/ipu3/ipu3-css.h +++ b/drivers/staging/media/ipu3/ipu3-css.h @@ -13,6 +13,7 @@ /* 2 stages for split isp pipeline, 1 for scaling */ #define IMGU_NUM_SP 2 #define IMGU_MAX_PIPELINE_NUM 20 +#define IMGU_MAX_PIPE_NUM 2 /* For DVS etc., format FRAME_FMT_YUV420_16 */ #define IPU3_CSS_AUX_FRAME_REF 0 @@ -57,12 +58,6 @@ struct ipu3_css_resolution { u32 h; }; -enum ipu3_css_vf_status { - IPU3_NODE_VF_ENABLED, - IPU3_NODE_PV_ENABLED, - IPU3_NODE_VF_DISABLED -}; - enum ipu3_css_buffer_state { IPU3_CSS_BUFFER_NEW, /* Not yet queued */ IPU3_CSS_BUFFER_QUEUED, /* Queued, waiting to be filled */ @@ -77,6 +72,7 @@ struct ipu3_css_buffer { enum ipu3_css_buffer_state state; struct list_head list; u8 queue_pos; + unsigned int pipe; }; struct ipu3_css_format { @@ -100,33 +96,32 @@ struct ipu3_css_queue { } fmt; const struct ipu3_css_format *css_fmt; - unsigned int width_pad; /* bytesperline / byp */ + unsigned int width_pad; struct list_head bufs; }; -/* IPU3 Camera Sub System structure */ -struct ipu3_css { - struct device *dev; - void __iomem *base; - const struct firmware *fw; - struct imgu_fw_header *fwp; - int iomem_length; - int fw_bl, fw_sp[IMGU_NUM_SP]; /* Indices of bl and SP binaries */ - struct ipu3_css_map *binary; /* fw binaries mapped to device */ - unsigned int current_binary; /* Currently selected binary */ - bool streaming; /* true when streaming is enabled */ - enum ipu3_css_pipe_id pipe_id; /* CSS pipe ID. */ +struct ipu3_css_pipe { + enum ipu3_css_pipe_id pipe_id; + unsigned int bindex; + + struct ipu3_css_queue queue[IPU3_CSS_QUEUES]; + struct v4l2_rect rect[IPU3_CSS_RECTS]; + + bool vf_output_en; + /* Protect access to queue[IPU3_CSS_QUEUES] */ + spinlock_t qlock; /* Data structures shared with IMGU and driver, always allocated */ + struct ipu3_css_map sp_ddr_ptrs; struct ipu3_css_map xmem_sp_stage_ptrs[IPU3_CSS_PIPE_ID_NUM] [IMGU_ABI_MAX_STAGES]; struct ipu3_css_map xmem_isp_stage_ptrs[IPU3_CSS_PIPE_ID_NUM] [IMGU_ABI_MAX_STAGES]; - struct ipu3_css_map sp_ddr_ptrs; - struct ipu3_css_map xmem_sp_group_ptrs; - /* Data structures shared with IMGU and driver, binary specific */ - /* PARAM_CLASS_CONFIG and PARAM_CLASS_STATE parameters */ + /* + * Data structures shared with IMGU and driver, binary specific. + * PARAM_CLASS_CONFIG and PARAM_CLASS_STATE parameters. + */ struct ipu3_css_map binary_params_cs[IMGU_ABI_PARAM_CLASS_NUM - 1] [IMGU_ABI_NUM_MEMORIES]; @@ -138,11 +133,6 @@ struct ipu3_css { unsigned int bytesperpixel; } aux_frames[IPU3_CSS_AUX_FRAME_TYPES]; - struct ipu3_css_queue queue[IPU3_CSS_QUEUES]; - struct v4l2_rect rect[IPU3_CSS_RECTS]; - struct ipu3_css_map abi_buffers[IPU3_CSS_QUEUES] - [IMGU_ABI_HOST2SP_BUFQ_SIZE]; - struct { struct ipu3_css_pool parameter_set_info; struct ipu3_css_pool acc; @@ -152,9 +142,26 @@ struct ipu3_css { struct ipu3_css_pool binary_params_p[IMGU_ABI_NUM_MEMORIES]; } pool; - enum ipu3_css_vf_status vf_output_en; - /* Protect access to css->queue[] */ - spinlock_t qlock; + struct ipu3_css_map abi_buffers[IPU3_CSS_QUEUES] + [IMGU_ABI_HOST2SP_BUFQ_SIZE]; +}; + +/* IPU3 Camera Sub System structure */ +struct ipu3_css { + struct device *dev; + void __iomem *base; + const struct firmware *fw; + struct imgu_fw_header *fwp; + int iomem_length; + int fw_bl, fw_sp[IMGU_NUM_SP]; /* Indices of bl and SP binaries */ + struct ipu3_css_map *binary; /* fw binaries mapped to device */ + bool streaming; /* true when streaming is enabled */ + + struct ipu3_css_pipe pipes[IMGU_MAX_PIPE_NUM]; + struct ipu3_css_map xmem_sp_group_ptrs; + + /* enabled pipe(s) */ + DECLARE_BITMAP(enabled_pipes, IMGU_MAX_PIPE_NUM); }; /******************* css v4l *******************/ @@ -163,17 +170,21 @@ int ipu3_css_init(struct device *dev, struct ipu3_css *css, void ipu3_css_cleanup(struct ipu3_css *css); int ipu3_css_fmt_try(struct ipu3_css *css, struct v4l2_pix_format_mplane *fmts[IPU3_CSS_QUEUES], - struct v4l2_rect *rects[IPU3_CSS_RECTS]); + struct v4l2_rect *rects[IPU3_CSS_RECTS], + unsigned int pipe); int ipu3_css_fmt_set(struct ipu3_css *css, struct v4l2_pix_format_mplane *fmts[IPU3_CSS_QUEUES], - struct v4l2_rect *rects[IPU3_CSS_RECTS]); + struct v4l2_rect *rects[IPU3_CSS_RECTS], + unsigned int pipe); int ipu3_css_meta_fmt_set(struct v4l2_meta_format *fmt); -int ipu3_css_buf_queue(struct ipu3_css *css, struct ipu3_css_buffer *b); +int ipu3_css_buf_queue(struct ipu3_css *css, unsigned int pipe, + struct ipu3_css_buffer *b); struct ipu3_css_buffer *ipu3_css_buf_dequeue(struct ipu3_css *css); int ipu3_css_start_streaming(struct ipu3_css *css); void ipu3_css_stop_streaming(struct ipu3_css *css); bool ipu3_css_queue_empty(struct ipu3_css *css); bool ipu3_css_is_streaming(struct ipu3_css *css); +bool ipu3_css_pipe_queue_empty(struct ipu3_css *css, unsigned int pipe); /******************* css hw *******************/ int ipu3_css_set_powerup(struct device *dev, void __iomem *base); @@ -181,10 +192,10 @@ void ipu3_css_set_powerdown(struct device *dev, void __iomem *base); int ipu3_css_irq_ack(struct ipu3_css *css); /******************* set parameters ************/ -int ipu3_css_set_parameters(struct ipu3_css *css, +int ipu3_css_set_parameters(struct ipu3_css *css, unsigned int pipe, struct ipu3_uapi_params *set_params); -/******************* css misc *******************/ +/******************* auxiliary helpers *******************/ static inline enum ipu3_css_buffer_state ipu3_css_buf_state(struct ipu3_css_buffer *b) { |