path: root/arch/mips/kernel/asm-offsets.c
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2007-08-27[MIPS] Extract {PGD,PMD,PTE}_ORDER into asm-offset.hRalf Baechle1-0/+4
For debugging purposes only. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-31[MIPS] Fixup secure computing stuff.Ralf Baechle1-1/+0
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-09rename thread_info to stackRoman Zippel1-1/+1
This finally renames the thread_info field in task structure to stack, so that the assumptions about this field are gone and archs have more freedom about placing the thread_info structure. Nonbroken archs which have a proper thread pointer can do the access to both current thread and task structure via a single pointer. It'll allow for a few more cleanups of the fork code, from which e.g. ia64 could benefit. Signed-off-by: Roman Zippel <zippel@linux-m68k.org> [akpm@linux-foundation.org: build fix] Cc: Richard Henderson <rth@twiddle.net> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Ian Molton <spyro@f2s.com> Cc: Haavard Skinnemoen <hskinnemoen@atmel.com> Cc: Mikael Starvik <starvik@axis.com> Cc: David Howells <dhowells@redhat.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Roman Zippel <zippel@linux-m68k.org> Cc: Greg Ungerer <gerg@uclinux.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Kazumoto Kojima <kkojima@rr.iij4u.or.jp> Cc: Richard Curnow <rc@rc0.org.uk> Cc: William Lee Irwin III <wli@holomorphy.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Jeff Dike <jdike@addtoit.com> Cc: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Cc: Miles Bader <uclinux-v850@lsi.nec.co.jp> Cc: Andi Kleen <ak@muc.de> Cc: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-04-27[MIPS] Remove unused _THREAD_SIZE_ORDER from asm-offset.c.Ralf Baechle1-1/+0
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-22[MIPS] Add basic SMARTMIPS ASE supportFranck Bui-Huu1-0/+4
This patch adds trivial support for SMARTMIPS extension. This extension is currently implemented by 4KS[CD] CPUs. Basically it saves/restores ACX register, which is part of the SMARTMIPS ASE, when needed. This patch does *not* add any support for Smartmips MMU features. Futhermore this patch does not add explicit support for 4KS[CD] CPUs since they are respectively mips32 and mips32r2 compliant. So with the current processor configuration, a platform that has such CPUs needs to select both configs: CPU_HAS_SMARTMIPS SYS_HAS_CPU_MIPS32_R[12] This is due to the processor configuration which is mixing up all the architecture variants and the processor types. The drawback of this, is that we currently pass '-march=mips32' option to gcc when building a kernel instead of '-march=4ksc' for 4KSC case. This can lead to a kernel image a little bit bigger than required. Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-10[MIPS] signal32: no need to save c0_status register in setup_sigcontext32()Franck Bui-Huu1-1/+0
All the information in the MIPS c0_status register is priviledged. Nothing that would constitute part of the thread context. The one flag one could possibly argument about might be c0_status.fr but none of the ABIs or tools or application software can make use of it. So for consistency with restore_sigcontext32(), which does not restore c0_status register, this patch remove the saving part. Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-06[MIPS] Move some kernel globals from asm file to C file.Atsushi Nemoto1-4/+0
This get rid of some undesirable hole in BSS section due to random order of placement. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-01[MIPS] 16K & 64K page size fixesRalf Baechle1-1/+1
Derived from Peter Watkins <treestem@gmail.com>'s work. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-08[MIPS] Complete fixes after removal of pt_regs argument to int handlers.Ralf Baechle1-1/+2
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-30Remove obsolete #include <linux/config.h>Jörn Engel1-1/+0
Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
2006-06-19[MIPS] Unify mips_fpu_soft_struct and mips_fpu_hard_structs.Atsushi Nemoto1-33/+33
The struct mips_fpu_soft_struct and mips_fpu_hard_struct are completely same now and the kernel fpu emulator assumes that. This patch unifies them to mips_fpu_struct and get rid of mips_fpu_union. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-01[MIPS] Update struct sigcontext member namesDaniel Jacobowitz1-2/+2
Rename the 64-bit sc_hi and sc_lo arrays to use the same names as the 32-bit struct sigcontext (sc_mdhi, sc_hi1, et cetera). Signed-off-by: Daniel Jacobowitz <dan@codesourcery.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-19[MIPS] MT: Improved multithreading support.Ralf Baechle1-0/+3
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Support the MIPS32 / MIPS64 DSP ASE.Ralf Baechle1-3/+23
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29NPTL, round one.Ralf Baechle1-0/+1
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-09-11mips: rename offsets.c to asm-offsets.cSam Ravnborg1-0/+314
Cannot build MIPS now. We need to change offset.c to asm-offsets.c Signed-off-by: Yoichi Yuasa <yuasa@hh.iij4u.or.jp> Signed-off-by: Sam Ravnborg <sam@ravnborg.org>

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