From 343b23a7c6b6680ef949e6112a4ee60688acf39d Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Fri, 1 Jun 2018 09:13:16 -0400 Subject: media: gpu: ipu-v3: Allow negative offsets for interlaced scanning The IPU also supports interlaced buffers that start with the bottom field. To achieve this, the the base address EBA has to be increased by a stride length and the interlace offset ILO has to be set to the negative stride. Signed-off-by: Philipp Zabel Signed-off-by: Mauro Carvalho Chehab --- drivers/gpu/ipu-v3/ipu-cpmem.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c index 9f2d9ec42add..c1028f38c553 100644 --- a/drivers/gpu/ipu-v3/ipu-cpmem.c +++ b/drivers/gpu/ipu-v3/ipu-cpmem.c @@ -269,8 +269,14 @@ EXPORT_SYMBOL_GPL(ipu_cpmem_set_uv_offset); void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride) { + u32 ilo; + ipu_ch_param_write_field(ch, IPU_FIELD_SO, 1); - ipu_ch_param_write_field(ch, IPU_FIELD_ILO, stride / 8); + if (stride >= 0) + ilo = stride / 8; + else + ilo = 0x100000 - (-stride / 8); + ipu_ch_param_write_field(ch, IPU_FIELD_ILO, ilo); ipu_ch_param_write_field(ch, IPU_FIELD_SLY, (stride * 2) - 1); }; EXPORT_SYMBOL_GPL(ipu_cpmem_interlaced_scan); -- cgit v1.2.1