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authorLinus Torvalds <torvalds@linux-foundation.org>2010-08-13 10:39:30 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2010-08-13 10:39:30 -0700
commit4b17cafaa4cc000a490821db649c5a3bf7ba9671 (patch)
tree9e6a1ed383be31f7a28ebfee726acf2cc15c377f /arch
parent36450e9c953b2a6838def5945de8ae508141e834 (diff)
parent88d89da64951377962334b684634cfc1468aa93f (diff)
Merge branch 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (30 commits) perf: Add back list_head data types perf ui hist browser: Fixup key bindings perf ui browser: Add ui_browser__show counterpart: __hide perf annotate: Cycle thru sorted lines with samples perf ui: Make SPACE work as PGDN in all browsers perf annotate: Sort by hottest lines in the TUI perf ui: Complete the breakdown of util/newt.c perf ui: Move hists browser to util/ui/browsers/ perf symbols: Ignore mapping symbols on ARM perf ui: Move map browser to util/ui/browsers/ perf ui: Move annotate browser to util/ui/browsers/ perf ui: Move ui_progress routines to separate file in util/ui/ perf ui: Move ui_helpline routines to separate file in util/ui/ perf ui: Shorten ui_browser member names perf, x86: P4 PMU -- update nmi irq statistics and unmask lvt entry properly perf ui: Start breaking down newt.c into multiple files perf tui: Introduce list_head based generic ui_browser refresh routine perf probe: Fix memory leaks in add_perf_probe_events perf probe: Fix to copy the type for raw parameters perf report: Speed up exit path ...
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/kernel/cpu/perf_event_p4.c9
-rw-r--r--arch/x86/oprofile/nmi_int.c1
2 files changed, 7 insertions, 3 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c
index 107711bf0ee8..febb12cea795 100644
--- a/arch/x86/kernel/cpu/perf_event_p4.c
+++ b/arch/x86/kernel/cpu/perf_event_p4.c
@@ -656,6 +656,7 @@ static int p4_pmu_handle_irq(struct pt_regs *regs)
cpuc = &__get_cpu_var(cpu_hw_events);
for (idx = 0; idx < x86_pmu.num_counters; idx++) {
+ int overflow;
if (!test_bit(idx, cpuc->active_mask))
continue;
@@ -666,12 +667,14 @@ static int p4_pmu_handle_irq(struct pt_regs *regs)
WARN_ON_ONCE(hwc->idx != idx);
/* it might be unflagged overflow */
- handled = p4_pmu_clear_cccr_ovf(hwc);
+ overflow = p4_pmu_clear_cccr_ovf(hwc);
val = x86_perf_event_update(event);
- if (!handled && (val & (1ULL << (x86_pmu.cntval_bits - 1))))
+ if (!overflow && (val & (1ULL << (x86_pmu.cntval_bits - 1))))
continue;
+ handled += overflow;
+
/* event overflow for sure */
data.period = event->hw.last_period;
@@ -687,7 +690,7 @@ static int p4_pmu_handle_irq(struct pt_regs *regs)
inc_irq_stat(apic_perf_irqs);
}
- return handled;
+ return handled > 0;
}
/*
diff --git a/arch/x86/oprofile/nmi_int.c b/arch/x86/oprofile/nmi_int.c
index 1ba67dc8006a..f6b48f6c5951 100644
--- a/arch/x86/oprofile/nmi_int.c
+++ b/arch/x86/oprofile/nmi_int.c
@@ -668,6 +668,7 @@ static int __init ppro_init(char **cpu_type)
*cpu_type = "i386/core_2";
break;
case 0x1a:
+ case 0x1e:
case 0x2e:
spec = &op_arch_perfmon_spec;
*cpu_type = "i386/core_i7";

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