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authorGerhard Pircher <gerhard_pircher@gmx.net>2009-01-23 06:51:28 +0000
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-01-28 17:15:52 +1100
commit4c456a67f501b8b15542c7c21c28812bf88f484b (patch)
tree0f1de24f488a59da4a7cc3445c89f8fe48b775aa
parent69b052e828b5ff32df7f96d6d3268a069910c663 (diff)
powerpc/mm: Fix handling of _PAGE_COHERENT in BAT setup code
_PAGE_COHERENT is now always set in _PAGE_RAM resp. PAGE_KERNEL. Thus it has to be masked out, if the BAT mapping should be non cacheable or CPU_FTR_NEED_COHERENT is not set. This will work on normal SMP setups because we force-set CPU_FTR_NEED_COHERENT as part of CPU_FTR_COMMON on SMP. Signed-off-by: Gerhard Pircher <gerhard_pircher@gmx.net> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
-rw-r--r--arch/powerpc/mm/ppc_mmu_32.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/powerpc/mm/ppc_mmu_32.c b/arch/powerpc/mm/ppc_mmu_32.c
index 45d925360b89..fe65c405412c 100644
--- a/arch/powerpc/mm/ppc_mmu_32.c
+++ b/arch/powerpc/mm/ppc_mmu_32.c
@@ -123,9 +123,9 @@ void __init setbat(int index, unsigned long virt, phys_addr_t phys,
int wimgxpp;
struct ppc_bat *bat = BATS[index];
- if (((flags & _PAGE_NO_CACHE) == 0) &&
- cpu_has_feature(CPU_FTR_NEED_COHERENT))
- flags |= _PAGE_COHERENT;
+ if ((flags & _PAGE_NO_CACHE) ||
+ (cpu_has_feature(CPU_FTR_NEED_COHERENT) == 0))
+ flags &= ~_PAGE_COHERENT;
bl = (size >> 17) - 1;
if (PVR_VER(mfspr(SPRN_PVR)) != 1) {

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