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authorMaarten ter Huurne <maarten@treewalker.org>2013-05-30 18:25:00 +0200
committerVinod Koul <vinod.koul@intel.com>2013-07-05 11:40:53 +0530
commit757f4e51b74f7fb19251020e742a78111fdea194 (patch)
tree584331d90fda0de9cac1dfa7bda90c63c0be1b12 /arch/mips/jz4740
parent25ce6c35fea0588c7a1b68e55d700c22d9e97ce0 (diff)
MIPS: jz4740: Correct clock gate bit for DMA controller
Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'arch/mips/jz4740')
-rw-r--r--arch/mips/jz4740/clock.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/jz4740/clock.c b/arch/mips/jz4740/clock.c
index 484d38a0864f..1b5f55426cad 100644
--- a/arch/mips/jz4740/clock.c
+++ b/arch/mips/jz4740/clock.c
@@ -687,7 +687,7 @@ static struct clk jz4740_clock_simple_clks[] = {
[3] = {
.name = "dma",
.parent = &jz_clk_high_speed_peripheral.clk,
- .gate_bit = JZ_CLOCK_GATE_UART0,
+ .gate_bit = JZ_CLOCK_GATE_DMAC,
.ops = &jz_clk_simple_ops,
},
[4] = {

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