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authorLeonid Yegoshin <Leonid.Yegoshin@imgtec.com>2013-11-27 10:07:53 +0000
committerRalf Baechle <ralf@linux-mips.org>2014-01-22 20:19:01 +0100
commit26ab96dfa9f98d74ef38efbe830d356547a292c1 (patch)
tree3789a48dbf291811980cde03016eed2dfcde419a /arch/mips/kernel
parent0ce7d58ee0d814622bf7b4700925455dd4960ddd (diff)
MIPS: Add support for interAptiv cores
The interAptiv is a power-efficient multi-core microprocessor for use in system-on-chip (SoC) applications. The interAptiv combines a multi-threading pipeline with a coherence manager to deliver improved computational throughput and power efficiency. The interAptiv can contain one to four MIPS32R3 interAptiv cores, system level coherence manager with L2 cache, optional coherent I/O port, and optional floating point unit. Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6163/
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r--arch/mips/kernel/idle.c1
-rw-r--r--arch/mips/kernel/spram.c1
-rw-r--r--arch/mips/kernel/traps.c1
3 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/kernel/idle.c b/arch/mips/kernel/idle.c
index cb2c94f13d01..3553243bf9d6 100644
--- a/arch/mips/kernel/idle.c
+++ b/arch/mips/kernel/idle.c
@@ -184,6 +184,7 @@ void __init check_wait(void)
case CPU_24K:
case CPU_34K:
case CPU_1004K:
+ case CPU_INTERAPTIV:
case CPU_PROAPTIV:
cpu_wait = r4k_wait;
if (read_c0_config7() & MIPS_CONF7_WII)
diff --git a/arch/mips/kernel/spram.c b/arch/mips/kernel/spram.c
index fb72b803b754..dfed8a41c696 100644
--- a/arch/mips/kernel/spram.c
+++ b/arch/mips/kernel/spram.c
@@ -206,6 +206,7 @@ void spram_config(void)
case CPU_34K:
case CPU_74K:
case CPU_1004K:
+ case CPU_INTERAPTIV:
case CPU_PROAPTIV:
config0 = read_c0_config();
/* FIXME: addresses are Malta specific */
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 39370e1d4362..e0b499694d18 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1337,6 +1337,7 @@ static inline void parity_protection_init(void)
case CPU_34K:
case CPU_74K:
case CPU_1004K:
+ case CPU_INTERAPTIV:
case CPU_PROAPTIV:
{
#define ERRCTL_PE 0x80000000

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