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-rw-r--r--arch/parisc/kernel/processor.c8
-rw-r--r--arch/parisc/kernel/setup.c2
-rw-r--r--arch/parisc/kernel/time.c18
-rw-r--r--drivers/char/agp/parisc-agp.c2
4 files changed, 20 insertions, 10 deletions
diff --git a/arch/parisc/kernel/processor.c b/arch/parisc/kernel/processor.c
index 7c056dcebf55..dd5d0cb6b347 100644
--- a/arch/parisc/kernel/processor.c
+++ b/arch/parisc/kernel/processor.c
@@ -48,6 +48,8 @@ EXPORT_SYMBOL(boot_cpu_data);
struct cpuinfo_parisc cpu_data[NR_CPUS] __read_mostly;
+extern int update_cr16_clocksource(void); /* from time.c */
+
/*
** PARISC CPU driver - claim "device" and initialize CPU data structures.
**
@@ -198,6 +200,12 @@ static int __init processor_probe(struct parisc_device *dev)
}
#endif
+ /* If we've registered more than one cpu,
+ * we'll use the jiffies clocksource since cr16
+ * is not synchronized between CPUs.
+ */
+ update_cr16_clocksource();
+
return 0;
}
diff --git a/arch/parisc/kernel/setup.c b/arch/parisc/kernel/setup.c
index bd2116e03f34..9818919571fd 100644
--- a/arch/parisc/kernel/setup.c
+++ b/arch/parisc/kernel/setup.c
@@ -45,7 +45,7 @@
#include <asm/io.h>
#include <asm/setup.h>
-char __initdata command_line[COMMAND_LINE_SIZE] __read_mostly;
+char __initdata command_line[COMMAND_LINE_SIZE];
/* Intended for ccio/sba/cpu statistics under /proc/bus/{runway|gsc} */
struct proc_dir_entry * proc_runway_root __read_mostly = NULL;
diff --git a/arch/parisc/kernel/time.c b/arch/parisc/kernel/time.c
index d1db8e518654..07a991aa9b0c 100644
--- a/arch/parisc/kernel/time.c
+++ b/arch/parisc/kernel/time.c
@@ -176,8 +176,6 @@ static cycle_t read_cr16(void)
return get_cycles();
}
-static int cr16_update_callback(void);
-
static struct clocksource clocksource_cr16 = {
.name = "cr16",
.rating = 300,
@@ -185,25 +183,29 @@ static struct clocksource clocksource_cr16 = {
.mask = CLOCKSOURCE_MASK(BITS_PER_LONG),
.mult = 0, /* to be set */
.shift = 22,
- .update_callback = cr16_update_callback,
- .is_continuous = 1,
+ .flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
-static int cr16_update_callback(void)
+#ifdef CONFIG_SMP
+int update_cr16_clocksource(void)
{
int change = 0;
/* since the cr16 cycle counters are not syncronized across CPUs,
we'll check if we should switch to a safe clocksource: */
if (clocksource_cr16.rating != 0 && num_online_cpus() > 1) {
- clocksource_cr16.rating = 0;
- clocksource_reselect();
+ clocksource_change_rating(&clocksource_cr16, 0);
change = 1;
}
return change;
}
-
+#else
+int update_cr16_clocksource(void)
+{
+ return 0; /* no change */
+}
+#endif /*CONFIG_SMP*/
void __init start_cpu_itimer(void)
{
diff --git a/drivers/char/agp/parisc-agp.c b/drivers/char/agp/parisc-agp.c
index 3c8f3d633625..3d83b461ccad 100644
--- a/drivers/char/agp/parisc-agp.c
+++ b/drivers/char/agp/parisc-agp.c
@@ -210,7 +210,7 @@ parisc_agp_enable(struct agp_bridge_data *bridge, u32 mode)
agp_device_command(command, (mode & AGP8X_MODE) != 0);
}
-struct const agp_bridge_driver parisc_agp_driver = {
+static const struct agp_bridge_driver parisc_agp_driver = {
.owner = THIS_MODULE,
.size_type = FIXED_APER_SIZE,
.configure = parisc_agp_configure,

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