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authorHaavard Skinnemoen <hskinnemoen@atmel.com>2007-06-11 15:17:14 (GMT)
committerHaavard Skinnemoen <hskinnemoen@atmel.com>2007-06-14 16:30:50 (GMT)
commit093d0faf57e59feee224217273f944e10e4e3562 (patch)
treeafecbd1b0ee1ca66fad714a9accadd8ce9efd897 /include
parent2fdfe8d9a2687718b07a35196b89fbf48ba0c82f (diff)
[AVR32] Define ARCH_KMALLOC_MINALIGN to L1_CACHE_BYTES
This allows SLUB debugging to be used without fear of messing up DMA transfers. SPI is one example that easily breaks without this patch. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Diffstat (limited to 'include')
-rw-r--r--include/asm-avr32/cache.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/include/asm-avr32/cache.h b/include/asm-avr32/cache.h
index dabb955..d3cf35a 100644
--- a/include/asm-avr32/cache.h
+++ b/include/asm-avr32/cache.h
@@ -4,6 +4,15 @@
#define L1_CACHE_SHIFT 5
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
+/*
+ * Memory returned by kmalloc() may be used for DMA, so we must make
+ * sure that all such allocations are cache aligned. Otherwise,
+ * unrelated code may cause parts of the buffer to be read into the
+ * cache before the transfer is done, causing old data to be seen by
+ * the CPU.
+ */
+#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
+
#ifndef __ASSEMBLER__
struct cache_info {
unsigned int ways;

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