aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorGrant Grundler <grundler@parisc-linux.org>2009-01-28 22:30:55 -0700
committerKyle McMartin <kyle@treachery.i.cabal.ca>2009-03-13 01:19:12 -0400
commit9785d646c10b0707412516ffe56b71b9eb18861f (patch)
tree1886076d2eff28dd97fa03a4df3d1a3ae76f43a6
parentc1da90fd099531e9449019dc53a5a02a5eaef2b4 (diff)
parisc: fix wrong assumption about bus->self
Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> posted a patch series to linux-pci to fix a wrong assumption about pci_bus->self==NULL for all PCI host bus controllers. While PARISC platforms to not behave this way, I prefer to have the code consistent across architectures. The following patch replaces pci_bus->self with pci_bus->parent when used as a test to check for "root bus controller". Signed-off-by: Grant Grundler <grundler@parisc-linux.org> Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
-rw-r--r--drivers/parisc/dino.c2
-rw-r--r--drivers/parisc/iosapic.c9
-rw-r--r--drivers/parisc/lba_pci.c4
3 files changed, 7 insertions, 8 deletions
diff --git a/drivers/parisc/dino.c b/drivers/parisc/dino.c
index d539d9df88e7..f79266cd00e5 100644
--- a/drivers/parisc/dino.c
+++ b/drivers/parisc/dino.c
@@ -587,7 +587,7 @@ dino_fixup_bus(struct pci_bus *bus)
bus->resource[i+1] = &res[i];
}
- } else if(bus->self) {
+ } else if (bus->parent) {
int i;
pci_read_bridge_bases(bus);
diff --git a/drivers/parisc/iosapic.c b/drivers/parisc/iosapic.c
index 0797659ee016..1cdfdea5d7ef 100644
--- a/drivers/parisc/iosapic.c
+++ b/drivers/parisc/iosapic.c
@@ -487,7 +487,7 @@ iosapic_xlate_pin(struct iosapic_info *isi, struct pci_dev *pcidev)
}
/* Check if pcidev behind a PPB */
- if (NULL != pcidev->bus->self) {
+ if (pcidev->bus->parent) {
/* Convert pcidev INTR_PIN into something we
** can lookup in the IRT.
*/
@@ -523,10 +523,9 @@ iosapic_xlate_pin(struct iosapic_info *isi, struct pci_dev *pcidev)
#endif /* PCI_BRIDGE_FUNCS */
/*
- ** Locate the host slot the PPB nearest the Host bus
- ** adapter.
- */
- while (NULL != p->parent->self)
+ * Locate the host slot of the PPB.
+ */
+ while (p->parent->parent)
p = p->parent;
intr_slot = PCI_SLOT(p->self->devfn);
diff --git a/drivers/parisc/lba_pci.c b/drivers/parisc/lba_pci.c
index d8233de8c75d..59fbbf128365 100644
--- a/drivers/parisc/lba_pci.c
+++ b/drivers/parisc/lba_pci.c
@@ -644,7 +644,7 @@ lba_fixup_bus(struct pci_bus *bus)
** Properly Setup MMIO resources for this bus.
** pci_alloc_primary_bus() mangles this.
*/
- if (bus->self) {
+ if (bus->parent) {
int i;
/* PCI-PCI Bridge */
pci_read_bridge_bases(bus);
@@ -802,7 +802,7 @@ lba_fixup_bus(struct pci_bus *bus)
** Can't fixup here anyway....garr...
*/
if (fbb_enable) {
- if (bus->self) {
+ if (bus->parent) {
u8 control;
/* enable on PPB */
(void) pci_read_config_byte(bus->self, PCI_BRIDGE_CONTROL, &control);

Privacy Policy