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authorCatalin Marinas <catalin.marinas@arm.com>2010-06-21 15:12:09 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-07-01 10:13:41 +0100
commitcf0bb91b3ce7e42142ccea46232da19a9bbf28d5 (patch)
tree45c8c9403b519212211ee5bd5dd24040f3545617
parentad642d9f58f1af6e96efccb5f84e52c6d01db5c4 (diff)
ARM: 6192/1: VExpress: Align the machine_desc.phys_io to 1MB section
When not aligned, random bits could be written in the initial page table by the __create_page_tables() function. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/mach-vexpress/ct-ca9x4.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c
index 9b11eedba65f..6353459bb567 100644
--- a/arch/arm/mach-vexpress/ct-ca9x4.c
+++ b/arch/arm/mach-vexpress/ct-ca9x4.c
@@ -10,6 +10,7 @@
#include <linux/amba/clcd.h>
#include <asm/clkdev.h>
+#include <asm/pgtable.h>
#include <asm/hardware/arm_timer.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/hardware/gic.h>
@@ -236,7 +237,7 @@ static void ct_ca9x4_init(void)
}
MACHINE_START(VEXPRESS, "ARM-Versatile Express CA9x4")
- .phys_io = V2M_UART0,
+ .phys_io = V2M_UART0 & SECTION_MASK,
.io_pg_offst = (__MMIO_P2V(V2M_UART0) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x00000100,
.map_io = ct_ca9x4_map_io,

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