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authorVasanth Ananthan <vasanthananthan@gmail.com>2012-11-20 21:02:11 +0900
committerKukjin Kim <kgene.kim@samsung.com>2012-11-20 21:02:17 +0900
commitc47d244a646d08e2161b7fa22c5512e7988762ae (patch)
tree1ba9836448fc41d08e40b30a5d9e3f553bfe5bde
parentd36bb0f0401b60f5484700da84a4cf760cd82fe3 (diff)
ARM: EXYNOS: DT Support for SATA and SATA PHY
This patch adds Device Nodes for SATA and SATA PHY device. Signed-off-by: Vasanth Ananthan <vasanth.a@samsung.com> [kgene.kim@samsung.com: removed address definitions as per comments] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
-rw-r--r--Documentation/devicetree/bindings/ata/exynos-sata-phy.txt14
-rw-r--r--Documentation/devicetree/bindings/ata/exynos-sata.txt17
-rw-r--r--arch/arm/boot/dts/exynos5250-smdk5250.dts15
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi18
-rw-r--r--arch/arm/mach-exynos/mach-exynos5-dt.c6
5 files changed, 70 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt b/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt
new file mode 100644
index 000000000000..37824fac688e
--- /dev/null
+++ b/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt
@@ -0,0 +1,14 @@
+* Samsung SATA PHY Controller
+
+SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.
+Each SATA PHY controller should have its own node.
+
+Required properties:
+- compatible : compatible list, contains "samsung,exynos5-sata-phy"
+- reg : <registers mapping>
+
+Example:
+ sata@ffe07000 {
+ compatible = "samsung,exynos5-sata-phy";
+ reg = <0xffe07000 0x1000>;
+ };
diff --git a/Documentation/devicetree/bindings/ata/exynos-sata.txt b/Documentation/devicetree/bindings/ata/exynos-sata.txt
new file mode 100644
index 000000000000..0849f1025e34
--- /dev/null
+++ b/Documentation/devicetree/bindings/ata/exynos-sata.txt
@@ -0,0 +1,17 @@
+* Samsung AHCI SATA Controller
+
+SATA nodes are defined to describe on-chip Serial ATA controllers.
+Each SATA controller should have its own node.
+
+Required properties:
+- compatible : compatible list, contains "samsung,exynos5-sata"
+- interrupts : <interrupt mapping for SATA IRQ>
+- reg : <registers mapping>
+- samsung,sata-freq : <frequency in MHz>
+
+Example:
+ sata@ffe08000 {
+ compatible = "samsung,exynos5-sata";
+ reg = <0xffe08000 0x1000>;
+ interrupts = <115>;
+ };
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 21d4ccdb0a5a..3f8c2ab1d038 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -55,6 +55,21 @@
};
};
+ i2c@121D0000 {
+ samsung,i2c-sda-delay = <100>;
+ samsung,i2c-max-bus-freq = <40000>;
+ samsung,i2c-slave-addr = <0x38>;
+
+ sata-phy {
+ compatible = "samsung,sata-phy";
+ reg = <0x38>;
+ };
+ };
+
+ sata@122F0000 {
+ samsung,sata-freq = <66>;
+ };
+
i2c@12C80000 {
status = "disabled";
};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 670dfdb01a09..e913525a4814 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -104,6 +104,17 @@
interrupts = <0 54 0>;
};
+ sata@122F0000 {
+ compatible = "samsung,exynos5-sata-ahci";
+ reg = <0x122F0000 0x1ff>;
+ interrupts = <0 115 0>;
+ };
+
+ sata-phy@12170000 {
+ compatible = "samsung,exynos5-sata-phy";
+ reg = <0x12170000 0x1ff>;
+ };
+
i2c@12C60000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C60000 0x100>;
@@ -168,6 +179,13 @@
#size-cells = <0>;
};
+ i2c@121D0000 {
+ compatible = "samsung,exynos5-sata-phy-i2c";
+ reg = <0x121D0000 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
spi_0: spi@12d20000 {
compatible = "samsung,exynos4210-spi";
reg = <0x12d20000 0x100>;
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c
index 4c0f3369abdf..a88c19f5efcc 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -64,6 +64,12 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
"exynos4210-spi.1", NULL),
OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI2,
"exynos4210-spi.2", NULL),
+ OF_DEV_AUXDATA("samsung,exynos5-sata-ahci", 0x122F0000,
+ "exynos5-sata", NULL),
+ OF_DEV_AUXDATA("samsung,exynos5-sata-phy", 0x12170000,
+ "exynos5-sata-phy", NULL),
+ OF_DEV_AUXDATA("samsung,exynos5-sata-phy-i2c", 0x121D0000,
+ "exynos5-sata-phy-i2c", NULL),
OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL),
OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL),
OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_MDMA1, "dma-pl330.2", NULL),

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