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authorTom Lendacky <thomas.lendacky@amd.com>2014-07-10 10:58:35 -0500
committerHerbert Xu <herbert@gondor.apana.org.au>2014-07-23 21:28:38 +0800
commit126ae9adc1ec8d9006542f1a5e474b0183845e21 (patch)
treef3ee814b261aa440feae1b5785f797aaa16cced7 /Documentation/devicetree/bindings/crypto
parent96956aef2ff5521af44d6cb896c967d025360ead (diff)
crypto: ccp - Base AXI DMA cache settings on device tree
The default cache operations for ARM64 were changed during 3.15. To use coherent operations a "dma-coherent" device tree property is required. If that property is not present in the device tree node then the non-coherent operations are assigned for the device. Add support to the ccp driver to assign the AXI DMA cache settings based on whether the "dma-coherent" property is present in the device node. If present, use settings that work with the caches. If not present, use settings that do not look at the caches. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'Documentation/devicetree/bindings/crypto')
-rw-r--r--Documentation/devicetree/bindings/crypto/amd-ccp.txt3
1 files changed, 3 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/crypto/amd-ccp.txt b/Documentation/devicetree/bindings/crypto/amd-ccp.txt
index 6e0b11aa8995..8c61183b41e0 100644
--- a/Documentation/devicetree/bindings/crypto/amd-ccp.txt
+++ b/Documentation/devicetree/bindings/crypto/amd-ccp.txt
@@ -7,6 +7,9 @@ Required properties:
that services interrupts for this device
- interrupts: Should contain the CCP interrupt
+Optional properties:
+- dma-coherent: Present if dma operations are coherent
+
Example:
ccp@e0100000 {
compatible = "amd,ccp-seattle-v1a";

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