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authorJamie Iles <jamie@jamieiles.com>2014-02-25 17:01:01 -0600
committerLinus Walleij <linus.walleij@linaro.org>2014-03-05 08:59:45 +0800
commit7779b34556978f6771a78bd87557523623e0405b (patch)
treee935791db33a976a7fec8059bfe102301248cbef /Documentation/devicetree/bindings/gpio
parent0c6feb0796ea6407c6477994b854659311078cfa (diff)
gpio: add a driver for the Synopsys DesignWare APB GPIO block
The Synopsys DesignWare block is used in some ARM devices (picoxcell) and can be configured to provide multiple banks of GPIO pins. v12: - Add irq_startup/shutdown - do irq_create_mapping() in probe, irq_find_mapping() in to_irq() - Adjust mappings to show support for 1 gpio per port. - gpio-cells = <1> v11: - Use NULL when checking existence of 'interrupts' property - Bindings descriptions cleanup v10: - in documentation nr-gpio -> nr-gpios v9: - cleanup in dt bindings doc - use of_get_child_count() v8: - remove socfpga.dtsi changes - minor cleanup in devicetree documentation v7: - use irq_generic_chip - support one irq per gpio line or one irq for many - s/bank/port/ and other cleanup v6: - (atull) squash the set of patches - use linear irq domain - build fixes. Original driver was reviewed on v3.2. - Fix setting irq edge type for 'rising' and 'both'. - Support as a loadable module. - Use bgpio_chip's spinlock during register access. - Clean up register names to match spec - s/bank/port/ because register names use the word 'port' - s/nr-gpio/nr-gpios/ - don't get/put the of_node - remove signoffs/acked-by's because of changes - other cleanup v5: - handle sparse bank population correctly v3: - depend on rather than select IRQ_DOMAIN - split IRQ support into a separate patch v2: - use Rob Herring's irqdomain in generic irq chip patches - use reg property to indicate bank index - support irqs on both edges based on LinusW's u300 driver Signed-off-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Alan Tull <atull@altera.com> Reviewed-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/gpio')
-rw-r--r--Documentation/devicetree/bindings/gpio/snps-dwapb-gpio.txt57
1 files changed, 57 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/gpio/snps-dwapb-gpio.txt b/Documentation/devicetree/bindings/gpio/snps-dwapb-gpio.txt
new file mode 100644
index 000000000000..093495018c1b
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/snps-dwapb-gpio.txt
@@ -0,0 +1,57 @@
+* Synopsys DesignWare APB GPIO controller
+
+Required properties:
+- compatible : Should contain "snps,dw-apb-gpio"
+- reg : Address and length of the register set for the device.
+- #address-cells : should be 1 (for addressing port subnodes).
+- #size-cells : should be 0 (port subnodes).
+
+The GPIO controller has a configurable number of ports, each of which are
+represented as child nodes with the following properties:
+
+Required properties:
+- compatible : "snps,dw-apb-gpio-port"
+- gpio-controller : Marks the device node as a gpio controller.
+- #gpio-cells : Should be 1. It is the pin number.
+- reg : The integer port index of the port, a single cell.
+
+Optional properties:
+- interrupt-controller : The first port may be configured to be an interrupt
+controller.
+- #interrupt-cells : Specifies the number of cells needed to encode an
+ interrupt. Shall be set to 2. The first cell defines the interrupt number,
+ the second encodes the triger flags encoded as described in
+ Documentation/devicetree/bindings/interrupts.txt
+- interrupt-parent : The parent interrupt controller.
+- interrupts : The interrupt to the parent controller raised when GPIOs
+ generate the interrupts.
+- snps,nr-gpios : The number of pins in the port, a single cell.
+
+Example:
+
+gpio: gpio@20000 {
+ compatible = "snps,dw-apb-gpio";
+ reg = <0x20000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ porta: gpio-controller@0 {
+ compatible = "snps,dw-apb-gpio-port";
+ gpio-controller;
+ #gpio-cells = <1>;
+ snps,nr-gpios = <8>;
+ reg = <0>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&vic1>;
+ interrupts = <0>;
+ };
+
+ portb: gpio-controller@1 {
+ compatible = "snps,dw-apb-gpio-port";
+ gpio-controller;
+ #gpio-cells = <1>;
+ snps,nr-gpios = <8>;
+ reg = <1>;
+ };
+};

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