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authorAndrew Lunn <andrew@lunn.ch>2013-11-07 10:35:29 (GMT)
committerJason Cooper <jason@lakedaemon.net>2013-11-26 15:04:53 (GMT)
commit40b367d95fb3d60fc1edb9ba8f6ef52272e48936 (patch)
tree7d4060a9c5001fa7c4d31e189ade110411ce05d5 /Documentation/devicetree/bindings/interrupt-controller
parent6ce4eac1f600b34f2f7f58f9cd8f0503d79e42ae (diff)
irqchip: irq-dove: Add PMU interrupt controller.
Dove has a Power Management Unit with its own interrupt controller. This is chained on the main interrupt controller. Add a driver, making use of generic chip where possible. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> cc: devicetree@vger.kernel.org cc: pawel.moll@arm.com cc: mark.rutland@arm.com cc: swarren@wwwdotorg.org cc: ian.campbell@citrix.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'Documentation/devicetree/bindings/interrupt-controller')
-rw-r--r--Documentation/devicetree/bindings/interrupt-controller/marvell,dove-pmu-intc.txt17
1 files changed, 17 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,dove-pmu-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/marvell,dove-pmu-intc.txt
new file mode 100644
index 0000000..1feb582
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/marvell,dove-pmu-intc.txt
@@ -0,0 +1,17 @@
+Marvell Dove Power Management Unit interrupt controller
+
+Required properties:
+- compatible: shall be "marvell,dove-pmu-intc"
+- reg: base address of PMU interrupt registers starting with CAUSE register
+- interrupts: PMU interrupt of the main interrupt controller
+- interrupt-controller: identifies the node as an interrupt controller
+- #interrupt-cells: number of cells to encode an interrupt source, shall be 1
+
+Example:
+ pmu_intc: pmu-interrupt-ctrl@d0050 {
+ compatible = "marvell,dove-pmu-intc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0xd0050 0x8>;
+ interrupts = <33>;
+ };

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