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authorSrinivas Kandagatla <srinivas.kandagatla@linaro.org>2014-07-14 11:18:08 (GMT)
committerKishon Vijay Abraham I <kishon@ti.com>2014-07-22 07:16:11 (GMT)
commite299f59a2ea1d1f6ce43ebfc56c75ea266a056de (patch)
treeac77b59d018132a3793079cb2179f23a7911da72 /Documentation/devicetree/bindings/phy
parent1de990d8a169de8aa971cea650e5dec6cdf62a09 (diff)
phy: qcom: Add APQ8064 SATA PHY device tree bindings
This patch adds binding spec for Qualcomm AP8064 SATA PHY. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Tested-by: Kiran Padwal <kiran.padwal@smartplayin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'Documentation/devicetree/bindings/phy')
-rw-r--r--Documentation/devicetree/bindings/phy/qcom-apq8064-sata-phy.txt24
1 files changed, 24 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/phy/qcom-apq8064-sata-phy.txt b/Documentation/devicetree/bindings/phy/qcom-apq8064-sata-phy.txt
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+Qualcomm APQ8064 SATA PHY Controller
+------------------------------------
+
+SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.
+Each SATA PHY controller should have its own node.
+
+Required properties:
+- compatible: compatible list, contains "qcom,apq8064-sata-phy".
+- reg: offset and length of the SATA PHY register set;
+- #phy-cells: must be zero
+- clocks: a list of phandles and clock-specifier pairs, one for each entry in
+ clock-names.
+- clock-names: must be "cfg" for phy config clock.
+
+Example:
+ sata_phy: sata-phy@1b400000 {
+ compatible = "qcom,apq8064-sata-phy";
+ reg = <0x1b400000 0x200>;
+
+ clocks = <&gcc SATA_PHY_CFG_CLK>;
+ clock-names = "cfg";
+
+ #phy-cells = <0>;
+ };

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