path: root/Documentation/devicetree/bindings/pwm
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authorThierry Reding <thierry.reding@avionic-design.de>2011-12-21 07:04:13 (GMT)
committerThierry Reding <thierry.reding@avionic-design.de>2012-07-02 19:38:59 (GMT)
commit140fd977dc46bc750258f082cdf1cfea79dc1d14 (patch)
tree689eedb11b8b36a2bef6d08266074168a43f7281 /Documentation/devicetree/bindings/pwm
parent0134b932a02f272a3137e8331e38b69eff011587 (diff)
pwm: tegra: Add device tree support
Add auxdata to instantiate the PWFM controller from a device tree, include the corresponding nodes in the dtsi files for Tegra 20 and Tegra 30 and add binding documentation. Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Diffstat (limited to 'Documentation/devicetree/bindings/pwm')
1 files changed, 18 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
new file mode 100644
index 0000000..bbbeedb
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
@@ -0,0 +1,18 @@
+Tegra SoC PWFM controller
+Required properties:
+- compatible: should be one of:
+ - "nvidia,tegra20-pwm"
+ - "nvidia,tegra30-pwm"
+- reg: physical base address and length of the controller's registers
+- #pwm-cells: On Tegra the number of cells used to specify a PWM is 2. The
+ first cell specifies the per-chip index of the PWM to use and the second
+ cell is the duty cycle in nanoseconds.
+ pwm: pwm@7000a000 {
+ compatible = "nvidia,tegra20-pwm";
+ reg = <0x7000a000 0x100>;
+ #pwm-cells = <2>;
+ };

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