aboutsummaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/serial
diff options
context:
space:
mode:
authorHeiko Stübner <heiko@sntech.de>2014-06-16 13:25:17 (GMT)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2014-07-10 22:27:37 (GMT)
commit7d78cbefaa465bbf36e2b4b90d3c196a00f54008 (patch)
tree9bce39e9e8c77f596280a1d59784d82c958e42eb /Documentation/devicetree/bindings/serial
parentd8782c7452b4a54cc8830074e8cd967e17559880 (diff)
serial: 8250_dw: add ability to handle the peripheral clock
First try to find the named clock variants then fall back to the already existing handling of a nameless declared baudclk. This also adds the missing documentation for this already existing variant. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation/devicetree/bindings/serial')
-rw-r--r--Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt31
1 files changed, 31 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt
index f13f1c5..095ac71 100644
--- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt
+++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt
@@ -4,7 +4,15 @@ Required properties:
- compatible : "snps,dw-apb-uart"
- reg : offset and length of the register set for the device.
- interrupts : should contain uart interrupt.
+
+Clock handling:
+The clock rate of the input clock needs to be supplied by one of
- clock-frequency : the input clock frequency for the UART.
+- clocks : phandle to the input clock
+
+The supplying peripheral clock can also be handled, needing a second property
+- clock-names: tuple listing input clock names.
+ Required elements: "baudclk", "apb_pclk"
Optional properties:
- reg-shift : quantity to shift the register offsets by. If this property is
@@ -23,3 +31,26 @@ Example:
reg-shift = <2>;
reg-io-width = <4>;
};
+
+Example with one clock:
+
+ uart@80230000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x80230000 0x100>;
+ clocks = <&baudclk>;
+ interrupts = <10>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ };
+
+Example with two clocks:
+
+ uart@80230000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x80230000 0x100>;
+ clocks = <&baudclk>, <&apb_pclk>;
+ clock-names = "baudclk", "apb_pclk";
+ interrupts = <10>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ };

Privacy Policy