path: root/Documentation/devicetree/bindings/timer
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authorStuart Menefy <stuart.menefy@st.com>2013-06-26 12:48:38 +0100
committerDaniel Lezcano <daniel.lezcano@linaro.org>2013-07-03 17:30:57 +0200
commitc1b40e447af8695666d4c11cfec4a7407e6a124d (patch)
tree813182806167d481396812928fec503b84e39cab /Documentation/devicetree/bindings/timer
parent0c1dcfd53b1066c411d3885cf8156abf59694360 (diff)
clocksource: arm_global_timer: Add ARM global timer support
This is a simple driver for the global timer module found in the Cortex A9-MP cores from revision r1p0 onwards. This should be able to perform the functions of the system timer and the local timer in an SMP system. The global timer has the following features: The global timer is a 64-bit incrementing counter with an auto-incrementing feature. It continues incrementing after sending interrupts. The global timer is memory mapped in the private memory region. The global timer is accessible to all Cortex-A9 processors in the cluster. Each Cortex-A9 processor has a private 64-bit comparator that is used to assert a private interrupt when the global timer has reached the comparator value. All the Cortex-A9 processors in a design use the banked ID, ID27, for this interrupt. ID27 is sent to the Interrupt Controller as a Private Peripheral Interrupt. The global timer is clocked by PERIPHCLK. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Rob Herring <robherring2@gmail.com> CC: Linus Walleij <linus.walleij@linaro.org> CC: Will Deacon <will.deacon@arm.com> CC: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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