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authorSascha Hauer <s.hauer@pengutronix.de>2013-03-14 13:08:56 +0100
committerShawn Guo <shawn.guo@linaro.org>2013-04-09 22:52:52 +0800
commitc21e5ca87400ceed04e7033a1848fda5d7e0e5f2 (patch)
treea53f45789884959207c19780f042d192276aaff2 /Documentation/devicetree/bindings/timer
parentc20736f1aba75bd4251e96ef3f487beebbaf41cc (diff)
ARM: i.MX: Add GPT devicetree Documentation
The GPT binding is already used on i.MX6 and i.MX25, but not yet documented. Add a binding document for it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/timer')
-rw-r--r--Documentation/devicetree/bindings/timer/fsl,imxgpt.txt18
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diff --git a/Documentation/devicetree/bindings/timer/fsl,imxgpt.txt b/Documentation/devicetree/bindings/timer/fsl,imxgpt.txt
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+++ b/Documentation/devicetree/bindings/timer/fsl,imxgpt.txt
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+Freescale i.MX General Purpose Timer (GPT)
+
+Required properties:
+
+- compatible : should be "fsl,<soc>-gpt"
+- reg : Specifies base physical address and size of the registers.
+- interrupts : A list of 4 interrupts; one per timer channel.
+- clocks : The clocks provided by the SoC to drive the timer.
+
+Example:
+
+gpt1: timer@10003000 {
+ compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
+ reg = <0x10003000 0x1000>;
+ interrupts = <26>;
+ clocks = <&clks 46>, <&clks 61>;
+ clock-names = "ipg", "per";
+};

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