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authorChen-Yu Tsai <wens@csie.org>2014-07-23 15:33:06 (GMT)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2014-07-27 18:07:07 (GMT)
commit7fe090bf48b522de8cd6fe85e2b3252ed74e74f8 (patch)
treebb5c2994d76becef318ec6e2bfbf125e6603db35 /Documentation/devicetree/bindings
parent1d6ba284dff546baca58e78546da46be3b48462a (diff)
serial: 8250_dw: Add optional reset control support
The Allwinner A31 and A23 SoCs have a reset controller maintaining the UART in reset by default. This patch adds optional reset support to the driver. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation/devicetree/bindings')
-rw-r--r--Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt1
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt
index 095ac71..7f76214 100644
--- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt
+++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt
@@ -15,6 +15,7 @@ The supplying peripheral clock can also be handled, needing a second property
Required elements: "baudclk", "apb_pclk"
Optional properties:
+- resets : phandle to the parent reset controller.
- reg-shift : quantity to shift the register offsets by. If this property is
not present then the register offsets are not shifted.
- reg-io-width : the size (in bytes) of the IO accesses that should be

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