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authorMichal Simek <michal.simek@xilinx.com>2013-03-20 10:46:01 +0100
committerMichal Simek <michal.simek@xilinx.com>2013-04-04 09:22:09 +0200
commit4f0f234fce1d263cc9881456352e8fd56ead0514 (patch)
tree492ac93a4cec234aa400c47722a607ce4ea02679 /Documentation/devicetree
parent9e09dc5f7fdc1e914c3b7bc186fa4b54d05a88d6 (diff)
arm: zynq: Move timer to generic location
Move zynq timer out of mach folder to generic location and enable it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/timer/cadence,ttc-timer.txt17
1 files changed, 17 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/timer/cadence,ttc-timer.txt b/Documentation/devicetree/bindings/timer/cadence,ttc-timer.txt
new file mode 100644
index 000000000000..993695c659e1
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/cadence,ttc-timer.txt
@@ -0,0 +1,17 @@
+Cadence TTC - Triple Timer Counter
+
+Required properties:
+- compatible : Should be "cdns,ttc".
+- reg : Specifies base physical address and size of the registers.
+- interrupts : A list of 3 interrupts; one per timer channel.
+- clocks: phandle to the source clock
+
+Example:
+
+ttc0: ttc0@f8001000 {
+ interrupt-parent = <&intc>;
+ interrupts = < 0 10 4 0 11 4 0 12 4 >;
+ compatible = "cdns,ttc";
+ reg = <0xF8001000 0x1000>;
+ clocks = <&cpu_clk 3>;
+};

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