aboutsummaryrefslogtreecommitdiffstats
path: root/Documentation/robust-futexes.txt
diff options
context:
space:
mode:
authorChen-Yu Tsai <wens@csie.org>2014-10-20 22:10:27 +0800
committerMaxime Ripard <maxime.ripard@free-electrons.com>2014-10-21 21:45:48 +0200
commit3b2bd70f03c75d37de791b65d574a31d1e2507b0 (patch)
tree454b32440d32110295b2903b6cb27f5cb802b50f /Documentation/robust-futexes.txt
parente94f8cb32d47b157b2af1906eb965290e89ee3fe (diff)
clk: sunxi: Add support for A80 basic bus clocks
The A80 SoC has 12 PLL clocks, 3 AHB clocks, 2 APB clocks, and a new "GT" bus, which I assume is some kind of data bus connecting the processor cores, memory and various busses. Also there is a bus clock for a ARM CCI400 module. As far as I can tell, the GT bus and CCI400 bus clock must be protected. This patch adds driver support for peripheral related PLLs and bus clocks on the A80. The GT and CCI400 clocks are added as well as these 2 along with the PLLs they are clocked from must not be disabled. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'Documentation/robust-futexes.txt')
0 files changed, 0 insertions, 0 deletions

Privacy Policy