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authorLinus Torvalds <torvalds@linux-foundation.org>2013-09-03 11:38:36 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2013-09-03 11:38:36 -0700
commit2f01ea908bcf838e815c0124b579513dbda3b8c8 (patch)
treef42db47c1695daaf369f08a21b2267d4a8ece756 /Documentation
parent751144271f4b63d5de9005ea4e5e6e5c7c6fd629 (diff)
parent2d1d3f3ae985ec5676fb56ff2c7acad2e1c4e6eb (diff)
Merge tag 'tty-3.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty
Pull tty/serial driver patches from Greg KH: "Here's the big tty/serial driver pull request for 3.12-rc1. Lots of n_tty reworks to resolve some very long-standing issues, removing the 3-4 different locks that were taken for every character. This code has been beaten on for a long time in linux-next with no reported regressions. Other than that, a range of serial and tty driver updates and revisions. Full details in the shortlog" * tag 'tty-3.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (226 commits) hvc_xen: Remove unnecessary __GFP_ZERO from kzalloc serial: imx: initialize the local variable tty: ar933x_uart: add device tree support and binding documentation tty: ar933x_uart: allow to build the driver as a module ARM: dts: msm: Update uartdm compatible strings devicetree: serial: Document msm_serial bindings serial: unify serial bindings into a single dir serial: fsl-imx-uart: Cleanup duplicate device tree binding tty: ar933x_uart: use config_enabled() macro to clean up ifdefs tty: ar933x_uart: remove superfluous assignment of ar933x_uart_driver.nr tty: ar933x_uart: use the clk API to get the uart clock tty: serial: cpm_uart: Adding proper request of GPIO used by cpm_uart driver serial: sirf: fix the amount of serial ports serial: sirf: define macro for some magic numbers of USP serial: icom: move array overflow checks earlier TTY: amiserial, remove unnecessary platform_set_drvdata() serial: st-asc: remove unnecessary platform_set_drvdata() msm_serial: Send more than 1 character on the console w/ UARTDM msm_serial: Add support for non-GSBI UARTDM devices msm_serial: Switch clock consumer strings and simplify code ...
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/serial/arc-uart.txt (renamed from Documentation/devicetree/bindings/tty/serial/arc-uart.txt)0
-rw-r--r--Documentation/devicetree/bindings/serial/atmel-usart.txt (renamed from Documentation/devicetree/bindings/tty/serial/atmel-usart.txt)18
-rw-r--r--Documentation/devicetree/bindings/serial/efm32-uart.txt (renamed from Documentation/devicetree/bindings/tty/serial/efm32-uart.txt)0
-rw-r--r--Documentation/devicetree/bindings/serial/fsl-imx-uart.txt22
-rw-r--r--Documentation/devicetree/bindings/serial/fsl-lpuart.txt (renamed from Documentation/devicetree/bindings/tty/serial/fsl-lpuart.txt)0
-rw-r--r--Documentation/devicetree/bindings/serial/fsl-mxs-auart.txt (renamed from Documentation/devicetree/bindings/tty/serial/fsl-mxs-auart.txt)4
-rw-r--r--Documentation/devicetree/bindings/serial/nxp-lpc32xx-hsuart.txt (renamed from Documentation/devicetree/bindings/tty/serial/nxp-lpc32xx-hsuart.txt)0
-rw-r--r--Documentation/devicetree/bindings/serial/of-serial.txt (renamed from Documentation/devicetree/bindings/tty/serial/of-serial.txt)0
-rw-r--r--Documentation/devicetree/bindings/serial/qcom,msm-uart.txt25
-rw-r--r--Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt53
-rw-r--r--Documentation/devicetree/bindings/serial/sirf-uart.txt33
-rw-r--r--Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt (renamed from Documentation/devicetree/bindings/tty/serial/snps-dw-apb-uart.txt)0
-rw-r--r--Documentation/devicetree/bindings/serial/st-asc.txt18
-rw-r--r--Documentation/devicetree/bindings/serial/via,vt8500-uart.txt (renamed from Documentation/devicetree/bindings/tty/serial/via,vt8500-uart.txt)0
-rw-r--r--Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt22
-rw-r--r--Documentation/devicetree/bindings/tty/serial/msm_serial.txt27
-rw-r--r--Documentation/devicetree/bindings/tty/serial/qca,ar9330-uart.txt34
-rw-r--r--Documentation/kernel-parameters.txt10
18 files changed, 202 insertions, 64 deletions
diff --git a/Documentation/devicetree/bindings/tty/serial/arc-uart.txt b/Documentation/devicetree/bindings/serial/arc-uart.txt
index 5cae2eb686f8..5cae2eb686f8 100644
--- a/Documentation/devicetree/bindings/tty/serial/arc-uart.txt
+++ b/Documentation/devicetree/bindings/serial/arc-uart.txt
diff --git a/Documentation/devicetree/bindings/tty/serial/atmel-usart.txt b/Documentation/devicetree/bindings/serial/atmel-usart.txt
index a49d9a1d4ccf..2191dcb9f1da 100644
--- a/Documentation/devicetree/bindings/tty/serial/atmel-usart.txt
+++ b/Documentation/devicetree/bindings/serial/atmel-usart.txt
@@ -10,13 +10,18 @@ Required properties:
Optional properties:
- atmel,use-dma-rx: use of PDC or DMA for receiving data
- atmel,use-dma-tx: use of PDC or DMA for transmitting data
+- add dma bindings for dma transfer:
+ - dmas: DMA specifier, consisting of a phandle to DMA controller node,
+ memory peripheral interface and USART DMA channel ID, FIFO configuration.
+ Refer to dma.txt and atmel-dma.txt for details.
+ - dma-names: "rx" for RX channel, "tx" for TX channel.
<chip> compatible description:
- at91rm9200: legacy USART support
- at91sam9260: generic USART implementation for SAM9 SoCs
Example:
-
+- use PDC:
usart0: serial@fff8c000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfff8c000 0x4000>;
@@ -25,3 +30,14 @@ Example:
atmel,use-dma-tx;
};
+- use DMA:
+ usart0: serial@f001c000 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xf001c000 0x100>;
+ interrupts = <12 4 5>;
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ dmas = <&dma0 2 0x3>,
+ <&dma0 2 0x204>;
+ dma-names = "tx", "rx";
+ };
diff --git a/Documentation/devicetree/bindings/tty/serial/efm32-uart.txt b/Documentation/devicetree/bindings/serial/efm32-uart.txt
index 8e080b893b49..8e080b893b49 100644
--- a/Documentation/devicetree/bindings/tty/serial/efm32-uart.txt
+++ b/Documentation/devicetree/bindings/serial/efm32-uart.txt
diff --git a/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt b/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt
index c58573b5b1a4..35ae1fb3537f 100644
--- a/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt
+++ b/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt
@@ -1,35 +1,29 @@
-* Freescale i.MX UART controller
+* Freescale i.MX Universal Asynchronous Receiver/Transmitter (UART)
Required properties:
-- compatible : should be "fsl,imx21-uart"
+- compatible : Should be "fsl,<soc>-uart"
- reg : Address and length of the register set for the device
-- interrupts : Should contain UART interrupt number
+- interrupts : Should contain uart interrupt
Optional properties:
-- fsl,uart-has-rtscts: indicate that RTS/CTS signals are used
+- fsl,uart-has-rtscts : Indicate the uart has rts and cts
+- fsl,irda-mode : Indicate the uart supports irda mode
+- fsl,dte-mode : Indicate the uart works in DTE mode. The uart works
+ is DCE mode by default.
Note: Each uart controller should have an alias correctly numbered
in "aliases" node.
Example:
-- From imx51.dtsi:
aliases {
serial0 = &uart1;
- serial1 = &uart2;
- serial2 = &uart3;
};
uart1: serial@73fbc000 {
compatible = "fsl,imx51-uart", "fsl,imx21-uart";
reg = <0x73fbc000 0x4000>;
interrupts = <31>;
- status = "disabled";
-}
-
-- From imx51-babbage.dts:
-uart1: serial@73fbc000 {
fsl,uart-has-rtscts;
- status = "okay";
+ fsl,dte-mode;
};
-
diff --git a/Documentation/devicetree/bindings/tty/serial/fsl-lpuart.txt b/Documentation/devicetree/bindings/serial/fsl-lpuart.txt
index 6fd1dd1638dd..6fd1dd1638dd 100644
--- a/Documentation/devicetree/bindings/tty/serial/fsl-lpuart.txt
+++ b/Documentation/devicetree/bindings/serial/fsl-lpuart.txt
diff --git a/Documentation/devicetree/bindings/tty/serial/fsl-mxs-auart.txt b/Documentation/devicetree/bindings/serial/fsl-mxs-auart.txt
index 2c00ec64628e..59a40f18d551 100644
--- a/Documentation/devicetree/bindings/tty/serial/fsl-mxs-auart.txt
+++ b/Documentation/devicetree/bindings/serial/fsl-mxs-auart.txt
@@ -10,6 +10,10 @@ Required properties:
Refer to dma.txt and fsl-mxs-dma.txt for details.
- dma-names: "rx" for RX channel, "tx" for TX channel.
+Optional properties:
+- fsl,uart-has-rtscts : Indicate the UART has RTS and CTS lines,
+ it also means you enable the DMA support for this UART.
+
Example:
auart0: serial@8006a000 {
compatible = "fsl,imx28-auart", "fsl,imx23-auart";
diff --git a/Documentation/devicetree/bindings/tty/serial/nxp-lpc32xx-hsuart.txt b/Documentation/devicetree/bindings/serial/nxp-lpc32xx-hsuart.txt
index 0d439dfc1aa5..0d439dfc1aa5 100644
--- a/Documentation/devicetree/bindings/tty/serial/nxp-lpc32xx-hsuart.txt
+++ b/Documentation/devicetree/bindings/serial/nxp-lpc32xx-hsuart.txt
diff --git a/Documentation/devicetree/bindings/tty/serial/of-serial.txt b/Documentation/devicetree/bindings/serial/of-serial.txt
index 1928a3e83cd0..1928a3e83cd0 100644
--- a/Documentation/devicetree/bindings/tty/serial/of-serial.txt
+++ b/Documentation/devicetree/bindings/serial/of-serial.txt
diff --git a/Documentation/devicetree/bindings/serial/qcom,msm-uart.txt b/Documentation/devicetree/bindings/serial/qcom,msm-uart.txt
new file mode 100644
index 000000000000..ce8c90161959
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/qcom,msm-uart.txt
@@ -0,0 +1,25 @@
+* MSM Serial UART
+
+The MSM serial UART hardware is designed for low-speed use cases where a
+dma-engine isn't needed. From a software perspective it's mostly compatible
+with the MSM serial UARTDM except that it only supports reading and writing one
+character at a time.
+
+Required properties:
+- compatible: Should contain "qcom,msm-uart"
+- reg: Should contain UART register location and length.
+- interrupts: Should contain UART interrupt.
+- clocks: Should contain the core clock.
+- clock-names: Should be "core".
+
+Example:
+
+A uart device at 0xa9c00000 with interrupt 11.
+
+serial@a9c00000 {
+ compatible = "qcom,msm-uart";
+ reg = <0xa9c00000 0x1000>;
+ interrupts = <11>;
+ clocks = <&uart_cxc>;
+ clock-names = "core";
+};
diff --git a/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt b/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt
new file mode 100644
index 000000000000..ffa5b784c66e
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt
@@ -0,0 +1,53 @@
+* MSM Serial UARTDM
+
+The MSM serial UARTDM hardware is designed for high-speed use cases where the
+transmit and/or receive channels can be offloaded to a dma-engine. From a
+software perspective it's mostly compatible with the MSM serial UART except
+that it supports reading and writing multiple characters at a time.
+
+Required properties:
+- compatible: Should contain at least "qcom,msm-uartdm".
+ A more specific property should be specified as follows depending
+ on the version:
+ "qcom,msm-uartdm-v1.1"
+ "qcom,msm-uartdm-v1.2"
+ "qcom,msm-uartdm-v1.3"
+ "qcom,msm-uartdm-v1.4"
+- reg: Should contain UART register locations and lengths. The first
+ register shall specify the main control registers. An optional second
+ register location shall specify the GSBI control region.
+ "qcom,msm-uartdm-v1.3" is the only compatible value that might
+ need the GSBI control region.
+- interrupts: Should contain UART interrupt.
+- clocks: Should contain the core clock and the AHB clock.
+- clock-names: Should be "core" for the core clock and "iface" for the
+ AHB clock.
+
+Optional properties:
+- dmas: Should contain dma specifiers for transmit and receive channels
+- dma-names: Should contain "tx" for transmit and "rx" for receive channels
+
+Examples:
+
+A uartdm v1.4 device with dma capabilities.
+
+serial@f991e000 {
+ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+ reg = <0xf991e000 0x1000>;
+ interrupts = <0 108 0x0>;
+ clocks = <&blsp1_uart2_apps_cxc>, <&blsp1_ahb_cxc>;
+ clock-names = "core", "iface";
+ dmas = <&dma0 0>, <&dma0 1>;
+ dma-names = "tx", "rx";
+};
+
+A uartdm v1.3 device without dma capabilities and part of a GSBI complex.
+
+serial@19c40000 {
+ compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
+ reg = <0x19c40000 0x1000>,
+ <0x19c00000 0x1000>;
+ interrupts = <0 195 0x0>;
+ clocks = <&gsbi5_uart_cxc>, <&gsbi5_ahb_cxc>;
+ clock-names = "core", "iface";
+};
diff --git a/Documentation/devicetree/bindings/serial/sirf-uart.txt b/Documentation/devicetree/bindings/serial/sirf-uart.txt
new file mode 100644
index 000000000000..a2dfc6522a91
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/sirf-uart.txt
@@ -0,0 +1,33 @@
+* CSR SiRFprimaII/atlasVI Universal Synchronous Asynchronous Receiver/Transmitter *
+
+Required properties:
+- compatible : Should be "sirf,prima2-uart" or "sirf, prima2-usp-uart"
+- reg : Offset and length of the register set for the device
+- interrupts : Should contain uart interrupt
+- fifosize : Should define hardware rx/tx fifo size
+- clocks : Should contain uart clock number
+
+Optional properties:
+- sirf,uart-has-rtscts: we have hardware flow controller pins in hardware
+- rts-gpios: RTS pin for USP-based UART if sirf,uart-has-rtscts is true
+- cts-gpios: CTS pin for USP-based UART if sirf,uart-has-rtscts is true
+
+Example:
+
+uart0: uart@b0050000 {
+ cell-index = <0>;
+ compatible = "sirf,prima2-uart";
+ reg = <0xb0050000 0x1000>;
+ interrupts = <17>;
+ fifosize = <128>;
+ clocks = <&clks 13>;
+};
+
+On the board-specific dts, we can put rts-gpios and cts-gpios like
+
+usp@b0090000 {
+ compatible = "sirf,prima2-usp-uart";
+ sirf,uart-has-rtscts;
+ rts-gpios = <&gpio 15 0>;
+ cts-gpios = <&gpio 46 0>;
+};
diff --git a/Documentation/devicetree/bindings/tty/serial/snps-dw-apb-uart.txt b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt
index f13f1c5be91c..f13f1c5be91c 100644
--- a/Documentation/devicetree/bindings/tty/serial/snps-dw-apb-uart.txt
+++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt
diff --git a/Documentation/devicetree/bindings/serial/st-asc.txt b/Documentation/devicetree/bindings/serial/st-asc.txt
new file mode 100644
index 000000000000..75d877f5968f
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/st-asc.txt
@@ -0,0 +1,18 @@
+*st-asc(Serial Port)
+
+Required properties:
+- compatible : Should be "st,asc".
+- reg, reg-names, interrupts, interrupt-names : Standard way to define device
+ resources with names. look in
+ Documentation/devicetree/bindings/resource-names.txt
+
+Optional properties:
+- st,hw-flow-ctrl bool flag to enable hardware flow control.
+- st,force-m1 bool flat to force asc to be in Mode-1 recommeded
+ for high bit rates (above 19.2K)
+Example:
+serial@fe440000{
+ compatible = "st,asc";
+ reg = <0xfe440000 0x2c>;
+ interrupts = <0 209 0>;
+};
diff --git a/Documentation/devicetree/bindings/tty/serial/via,vt8500-uart.txt b/Documentation/devicetree/bindings/serial/via,vt8500-uart.txt
index 5feef1ef167d..5feef1ef167d 100644
--- a/Documentation/devicetree/bindings/tty/serial/via,vt8500-uart.txt
+++ b/Documentation/devicetree/bindings/serial/via,vt8500-uart.txt
diff --git a/Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt b/Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt
deleted file mode 100644
index c662eb36be29..000000000000
--- a/Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt
+++ /dev/null
@@ -1,22 +0,0 @@
-* Freescale i.MX Universal Asynchronous Receiver/Transmitter (UART)
-
-Required properties:
-- compatible : Should be "fsl,<soc>-uart"
-- reg : Address and length of the register set for the device
-- interrupts : Should contain uart interrupt
-
-Optional properties:
-- fsl,uart-has-rtscts : Indicate the uart has rts and cts
-- fsl,irda-mode : Indicate the uart supports irda mode
-- fsl,dte-mode : Indicate the uart works in DTE mode. The uart works
- is DCE mode by default.
-
-Example:
-
-serial@73fbc000 {
- compatible = "fsl,imx51-uart", "fsl,imx21-uart";
- reg = <0x73fbc000 0x4000>;
- interrupts = <31>;
- fsl,uart-has-rtscts;
- fsl,dte-mode;
-};
diff --git a/Documentation/devicetree/bindings/tty/serial/msm_serial.txt b/Documentation/devicetree/bindings/tty/serial/msm_serial.txt
deleted file mode 100644
index aef383eb8876..000000000000
--- a/Documentation/devicetree/bindings/tty/serial/msm_serial.txt
+++ /dev/null
@@ -1,27 +0,0 @@
-* Qualcomm MSM UART
-
-Required properties:
-- compatible :
- - "qcom,msm-uart", and one of "qcom,msm-hsuart" or
- "qcom,msm-lsuart".
-- reg : offset and length of the register set for the device
- for the hsuart operating in compatible mode, there should be a
- second pair describing the gsbi registers.
-- interrupts : should contain the uart interrupt.
-
-There are two different UART blocks used in MSM devices,
-"qcom,msm-hsuart" and "qcom,msm-lsuart". The msm-serial driver is
-able to handle both of these, and matches against the "qcom,msm-uart"
-as the compatibility.
-
-The registers for the "qcom,msm-hsuart" device need to specify both
-register blocks, even for the common driver.
-
-Example:
-
- uart@19c400000 {
- compatible = "qcom,msm-hsuart", "qcom,msm-uart";
- reg = <0x19c40000 0x1000>,
- <0x19c00000 0x1000>;
- interrupts = <195>;
- };
diff --git a/Documentation/devicetree/bindings/tty/serial/qca,ar9330-uart.txt b/Documentation/devicetree/bindings/tty/serial/qca,ar9330-uart.txt
new file mode 100644
index 000000000000..c5e032c85bf9
--- /dev/null
+++ b/Documentation/devicetree/bindings/tty/serial/qca,ar9330-uart.txt
@@ -0,0 +1,34 @@
+* Qualcomm Atheros AR9330 High-Speed UART
+
+Required properties:
+
+- compatible: Must be "qca,ar9330-uart"
+
+- reg: Specifies the physical base address of the controller and
+ the length of the memory mapped region.
+
+- interrupt-parent: The phandle for the interrupt controller that
+ services interrupts for this device.
+
+- interrupts: Specifies the interrupt source of the parent interrupt
+ controller. The format of the interrupt specifier depends on the
+ parent interrupt controller.
+
+Additional requirements:
+
+ Each UART port must have an alias correctly numbered in "aliases"
+ node.
+
+Example:
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ uart0: uart@18020000 {
+ compatible = "qca,ar9330-uart";
+ reg = <0x18020000 0x14>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <3>;
+ };
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 7f9d4f53882c..31a9e5174e63 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -3322,6 +3322,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
them quite hard to use for exploits but
might break your system.
+ vt.color= [VT] Default text color.
+ Format: 0xYX, X = foreground, Y = background.
+ Default: 0x07 = light gray on black.
+
vt.cur_default= [VT] Default cursor shape.
Format: 0xCCBBAA, where AA, BB, and CC are the same as
the parameters of the <Esc>[?A;B;Cc escape sequence;
@@ -3361,6 +3365,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
overridden by individual drivers. 0 will hide
cursors, 1 will display them.
+ vt.italic= [VT] Default color for italic text; 0-15.
+ Default: 2 = green.
+
+ vt.underline= [VT] Default color for underlined text; 0-15.
+ Default: 3 = cyan.
+
watchdog timers [HW,WDT] For information on watchdog timers,
see Documentation/watchdog/watchdog-parameters.txt
or other driver-specific files in the

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