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authorLinus Torvalds <torvalds@linux-foundation.org>2013-09-03 18:19:53 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2013-09-03 18:19:53 -0700
commit357397a14117f0c2eeafcac06a1f8412a02aa6af (patch)
tree8420d5aab6b80fc211979d894174462c9806b26e /Documentation
parent9ee52a1633a77961cb7b7fb5bd40be682f8412c7 (diff)
parent86a565e61bcb9574bae3b622799682fef2d855bb (diff)
Merge branch 'for-3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata
Pull libata changes from Tejun Heo: "Two interesting changes. - libata acpi handling has been restructured so that the association between ata devices and ACPI handles are less convoluted. This change shouldn't change visible behavior. - Queued TRIM support, which enables sending TRIM to the device without draining in-flight RW commands, is added. Currently only enabled for ahci (and likely to stay that way for the foreseeable future). Other changes are driver-specific updates / fixes" * 'for-3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata: libata: bugfix: Remove __le32 in ata_tf_to_fis() libata: acpi: Remove ata_dev_acpi_handle stub in libata.h libata: Add support for queued DSM TRIM libata: Add support for SEND/RECEIVE FPDMA QUEUED libata: Add H2D FIS "auxiliary" port flag libata: Populate host-to-device FIS "auxiliary" field ata: acpi: rework the ata acpi bind support sata, highbank: send extra clock cycles in SGPIO patterns sata, highbank: set tx_atten override bits devicetree: create a separate binding description for sata_highbank drivers/ata/sata_rcar.c: simplify use of devm_ioremap_resource sata highbank: enable 64-bit DMA mask when using LPAE ata: pata_samsung_cf: add missing __iomem annotation ata: pata_arasan: Staticize local symbols sata_mv: Remove unneeded CONFIG_HAVE_CLK ifdefs ata: use dev_get_platdata() sata_mv: Remove unneeded forward declaration libata: acpi: remove dead code for ata_acpi_(un)bind libata: move 'struct ata_taskfile' and friends from ata.h to libata.h
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/ata/ahci-platform.txt18
-rw-r--r--Documentation/devicetree/bindings/ata/sata_highbank.txt44
2 files changed, 48 insertions, 14 deletions
diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt
index 3ec0c5c4f0e9..89de1564950c 100644
--- a/Documentation/devicetree/bindings/ata/ahci-platform.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt
@@ -4,27 +4,17 @@ SATA nodes are defined to describe on-chip Serial ATA controllers.
Each SATA controller should have its own node.
Required properties:
-- compatible : compatible list, contains "calxeda,hb-ahci" or "snps,spear-ahci"
+- compatible : compatible list, contains "snps,spear-ahci"
- interrupts : <interrupt mapping for SATA IRQ>
- reg : <registers mapping>
Optional properties:
-- calxeda,port-phys: phandle-combophy and lane assignment, which maps each
- SATA port to a combophy and a lane within that
- combophy
-- calxeda,sgpio-gpio: phandle-gpio bank, bit offset, and default on or off,
- which indicates that the driver supports SGPIO
- indicator lights using the indicated GPIOs
-- calxeda,led-order : a u32 array that map port numbers to offsets within the
- SGPIO bitstream.
- dma-coherent : Present if dma operations are coherent
Example:
sata@ffe08000 {
- compatible = "calxeda,hb-ahci";
- reg = <0xffe08000 0x1000>;
- interrupts = <115>;
- calxeda,port-phys = <&combophy5 0 &combophy0 0 &combophy0 1
- &combophy0 2 &combophy0 3>;
+ compatible = "snps,spear-ahci";
+ reg = <0xffe08000 0x1000>;
+ interrupts = <115>;
};
diff --git a/Documentation/devicetree/bindings/ata/sata_highbank.txt b/Documentation/devicetree/bindings/ata/sata_highbank.txt
new file mode 100644
index 000000000000..aa83407cb7a4
--- /dev/null
+++ b/Documentation/devicetree/bindings/ata/sata_highbank.txt
@@ -0,0 +1,44 @@
+* Calxeda AHCI SATA Controller
+
+SATA nodes are defined to describe on-chip Serial ATA controllers.
+The Calxeda SATA controller mostly conforms to the AHCI interface
+with some special extensions to add functionality.
+Each SATA controller should have its own node.
+
+Required properties:
+- compatible : compatible list, contains "calxeda,hb-ahci"
+- interrupts : <interrupt mapping for SATA IRQ>
+- reg : <registers mapping>
+
+Optional properties:
+- dma-coherent : Present if dma operations are coherent
+- calxeda,port-phys : phandle-combophy and lane assignment, which maps each
+ SATA port to a combophy and a lane within that
+ combophy
+- calxeda,sgpio-gpio: phandle-gpio bank, bit offset, and default on or off,
+ which indicates that the driver supports SGPIO
+ indicator lights using the indicated GPIOs
+- calxeda,led-order : a u32 array that map port numbers to offsets within the
+ SGPIO bitstream.
+- calxeda,tx-atten : a u32 array that contains TX attenuation override
+ codes, one per port. The upper 3 bytes are always
+ 0 and thus ignored.
+- calxeda,pre-clocks : a u32 that indicates the number of additional clock
+ cycles to transmit before sending an SGPIO pattern
+- calxeda,post-clocks: a u32 that indicates the number of additional clock
+ cycles to transmit after sending an SGPIO pattern
+
+Example:
+ sata@ffe08000 {
+ compatible = "calxeda,hb-ahci";
+ reg = <0xffe08000 0x1000>;
+ interrupts = <115>;
+ dma-coherent;
+ calxeda,port-phys = <&combophy5 0 &combophy0 0 &combophy0 1
+ &combophy0 2 &combophy0 3>;
+ calxeda,sgpio-gpio =<&gpioh 5 1 &gpioh 6 1 &gpioh 7 1>;
+ calxeda,led-order = <4 0 1 2 3>;
+ calxeda,tx-atten = <0xff 22 0xff 0xff 23>;
+ calxeda,pre-clocks = <10>;
+ calxeda,post-clocks = <0>;
+ };

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