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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2013-10-03 21:56:29 +0200
committerDaniel Lezcano <daniel.lezcano@linaro.org>2013-10-22 22:36:33 +0200
commit9c9b781804e0a278e258f81dfc31c50f80867730 (patch)
treeed03e43c78b0a08262c0fbab84d0891bfbee908c /Documentation
parentfdfcab17a26ab2179c9d233f8a1b63e93cff9a4a (diff)
clocksource: Provide timekeeping for efm32 SoCs
An efm32 features 4 16-bit timers with a 10-bit prescaler. This driver provides clocksource and clock event device using one timer instance each. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/timer/efm32,timer.txt23
1 files changed, 23 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/timer/efm32,timer.txt b/Documentation/devicetree/bindings/timer/efm32,timer.txt
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index 000000000000..97a568f696c9
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+++ b/Documentation/devicetree/bindings/timer/efm32,timer.txt
@@ -0,0 +1,23 @@
+* EFM32 timer hardware
+
+The efm32 Giant Gecko SoCs come with four 16 bit timers. Two counters can be
+connected to form a 32 bit counter. Each timer has three Compare/Capture
+channels and can be used as PWM or Quadrature Decoder. Available clock sources
+are the cpu's HFPERCLK (with a 10-bit prescaler) or an external pin.
+
+Required properties:
+- compatible : Should be efm32,timer
+- reg : Address and length of the register set
+- clocks : Should contain a reference to the HFPERCLK
+
+Optional properties:
+- interrupts : Reference to the timer interrupt
+
+Example:
+
+timer@40010c00 {
+ compatible = "efm32,timer";
+ reg = <0x40010c00 0x400>;
+ interrupts = <14>;
+ clocks = <&cmu clk_HFPERCLKTIMER3>;
+};

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