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authorLinus Torvalds <torvalds@linux-foundation.org>2014-10-15 04:58:16 (GMT)
committerLinus Torvalds <torvalds@linux-foundation.org>2014-10-15 04:58:16 (GMT)
commitfcc3a5d277571bc6048e7b4ef8cd391b935de629 (patch)
tree143954c115011c657f747a0e1470973b94ab3690 /include
parent50fa86172bec2769979b5eb0cd1a244391ae4bb0 (diff)
parentd86c21fd31114e3ef9fae64be335c76aa22859dc (diff)
Merge tag 'mfd-for-linus-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
Pull MFD updates from Lee Jones: "Changes to existing drivers: - DT clean-ups in da9055-core, max14577, rn5t618, arizona, hi6421, stmpe, twl4030 - Export symbols for use in modules in max14577 - Plenty of static code analysis/Coccinelle fixes throughout the SS - Regmap clean-ups in arizona, wm5102, wm5110, da9052, tps65217, rk808 - Remove unused/duplicate code in da9052, 88pm860x, ti_ssp, lpc_sch, arizona - Bug fixes in ti_am335x_tscadc, da9052, ti_am335x_tscadc, rtsx_pcr - IRQ fixups in arizona, stmpe, max14577 - Regulator related changes in axp20x - Pass DMA coherency information from parent => child in MFD core - Rename DT document files for consistency - Add ACPI support to the MFD core - Add Andreas Werner to MAINTAINERS for MEN F21BMC New drivers/supported devices: - New driver for MEN 14F021P00 Board Management Controller - New driver for Ricoh RN5T618 PMIC - New driver for Rockchip RK808 - New driver for HiSilicon Hi6421 PMIC - New driver for Qualcomm SPMI PMICs - Add support for Intel Braswell in lpc_ich - Add support for Intel 9 Series PCH in lpc_ich - Add support for Intel Quark ILB in lpc_sch" [ Delayed to after the poweer/reset pull due to Kconfig problems with recursive Kconfig select/depends-on chains. - Linus ] * tag 'mfd-for-linus-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (79 commits) mfd: cros_ec: wait for completion of commands that return IN_PROGRESS i2c: i2c-cros-ec-tunnel: Set retries to 3 mfd: cros_ec: move locking into cros_ec_cmd_xfer mfd: cros_ec: stop calling ->cmd_xfer() directly mfd: cros_ec: Delay for 50ms when we see EC_CMD_REBOOT_EC MAINTAINERS: Adds Andreas Werner to maintainers list for MEN F21BMC mfd: arizona: Correct mask to allow setting micbias external cap mfd: Add ACPI support Revert "mfd: wm5102: Manually apply register patch" mfd: ti_am335x_tscadc: Update logic in CTRL register for 5-wire TS mfd: dt-bindings: atmel-gpbr: Rename doc file to conform to naming convention mfd: dt-bindings: qcom-pm8xxx: Rename doc file to conform to naming convention mfd: Inherit coherent_dma_mask from parent device mfd: Document DT bindings for Qualcomm SPMI PMICs mfd: Add support for Qualcomm SPMI PMICs mfd: dt-bindings: pm8xxx: Add new compatible string mfd: axp209x: Drop the parent supplies field mfd: twl4030-power: Use 'ti,system-power-controller' as alternative way to support system power off mfd: dt-bindings: twl4030-power: Use the standard property to mark power control mfd: syscon: Add Atmel GPBR DT bindings documention ...
Diffstat (limited to 'include')
-rw-r--r--include/dt-bindings/clock/rockchip,rk808.h11
-rw-r--r--include/linux/mfd/arizona/registers.h29
-rw-r--r--include/linux/mfd/core.h3
-rw-r--r--include/linux/mfd/cros_ec.h24
-rw-r--r--include/linux/mfd/da9052/da9052.h2
-rw-r--r--include/linux/mfd/davinci_voicecodec.h2
-rw-r--r--include/linux/mfd/hi6421-pmic.h41
-rw-r--r--include/linux/mfd/max77693-private.h61
-rw-r--r--include/linux/mfd/max77693.h40
-rw-r--r--include/linux/mfd/rk808.h196
-rw-r--r--include/linux/mfd/rn5t618.h228
-rw-r--r--include/linux/mfd/ti_am335x_tscadc.h1
-rw-r--r--include/linux/mfd/ti_ssp.h93
-rw-r--r--include/linux/mfd/tps65217.h2
-rw-r--r--include/linux/pci_ids.h1
15 files changed, 626 insertions, 108 deletions
diff --git a/include/dt-bindings/clock/rockchip,rk808.h b/include/dt-bindings/clock/rockchip,rk808.h
new file mode 100644
index 0000000..1a87343
--- /dev/null
+++ b/include/dt-bindings/clock/rockchip,rk808.h
@@ -0,0 +1,11 @@
+/*
+ * This header provides constants clk index RK808 pmic clkout
+ */
+#ifndef _CLK_ROCKCHIP_RK808
+#define _CLK_ROCKCHIP_RK808
+
+/* CLOCKOUT index */
+#define RK808_CLKOUT0 0
+#define RK808_CLKOUT1 1
+
+#endif
diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h
index dbd23c3..c0b075f 100644
--- a/include/linux/mfd/arizona/registers.h
+++ b/include/linux/mfd/arizona/registers.h
@@ -27,6 +27,7 @@
#define ARIZONA_WRITE_SEQUENCER_CTRL_0 0x16
#define ARIZONA_WRITE_SEQUENCER_CTRL_1 0x17
#define ARIZONA_WRITE_SEQUENCER_CTRL_2 0x18
+#define ARIZONA_WRITE_SEQUENCER_CTRL_3 0x19
#define ARIZONA_WRITE_SEQUENCER_PROM 0x1A
#define ARIZONA_TONE_GENERATOR_1 0x20
#define ARIZONA_TONE_GENERATOR_2 0x21
@@ -70,7 +71,9 @@
#define ARIZONA_SAMPLE_RATE_3_STATUS 0x10C
#define ARIZONA_ASYNC_CLOCK_1 0x112
#define ARIZONA_ASYNC_SAMPLE_RATE_1 0x113
+#define ARIZONA_ASYNC_SAMPLE_RATE_2 0x114
#define ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS 0x11B
+#define ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS 0x11C
#define ARIZONA_OUTPUT_SYSTEM_CLOCK 0x149
#define ARIZONA_OUTPUT_ASYNC_CLOCK 0x14A
#define ARIZONA_RATE_ESTIMATOR_1 0x152
@@ -1664,16 +1667,30 @@
/*
* R275 (0x113) - Async sample rate 1
*/
-#define ARIZONA_ASYNC_SAMPLE_RATE_MASK 0x001F /* ASYNC_SAMPLE_RATE - [4:0] */
-#define ARIZONA_ASYNC_SAMPLE_RATE_SHIFT 0 /* ASYNC_SAMPLE_RATE - [4:0] */
-#define ARIZONA_ASYNC_SAMPLE_RATE_WIDTH 5 /* ASYNC_SAMPLE_RATE - [4:0] */
+#define ARIZONA_ASYNC_SAMPLE_RATE_1_MASK 0x001F /* ASYNC_SAMPLE_RATE_1 - [4:0] */
+#define ARIZONA_ASYNC_SAMPLE_RATE_1_SHIFT 0 /* ASYNC_SAMPLE_RATE_1 - [4:0] */
+#define ARIZONA_ASYNC_SAMPLE_RATE_1_WIDTH 5 /* ASYNC_SAMPLE_RATE_1 - [4:0] */
+
+/*
+ * R276 (0x114) - Async sample rate 2
+ */
+#define ARIZONA_ASYNC_SAMPLE_RATE_2_MASK 0x001F /* ASYNC_SAMPLE_RATE_2 - [4:0] */
+#define ARIZONA_ASYNC_SAMPLE_RATE_2_SHIFT 0 /* ASYNC_SAMPLE_RATE_2 - [4:0] */
+#define ARIZONA_ASYNC_SAMPLE_RATE_2_WIDTH 5 /* ASYNC_SAMPLE_RATE_2 - [4:0] */
/*
* R283 (0x11B) - Async sample rate 1 status
*/
-#define ARIZONA_ASYNC_SAMPLE_RATE_STS_MASK 0x001F /* ASYNC_SAMPLE_RATE_STS - [4:0] */
-#define ARIZONA_ASYNC_SAMPLE_RATE_STS_SHIFT 0 /* ASYNC_SAMPLE_RATE_STS - [4:0] */
-#define ARIZONA_ASYNC_SAMPLE_RATE_STS_WIDTH 5 /* ASYNC_SAMPLE_RATE_STS - [4:0] */
+#define ARIZONA_ASYNC_SAMPLE_RATE_1_STS_MASK 0x001F /* ASYNC_SAMPLE_RATE_1_STS - [4:0] */
+#define ARIZONA_ASYNC_SAMPLE_RATE_1_STS_SHIFT 0 /* ASYNC_SAMPLE_RATE_1_STS - [4:0] */
+#define ARIZONA_ASYNC_SAMPLE_RATE_1_STS_WIDTH 5 /* ASYNC_SAMPLE_RATE_1_STS - [4:0] */
+
+/*
+ * R284 (0x11C) - Async sample rate 2 status
+ */
+#define ARIZONA_ASYNC_SAMPLE_RATE_2_STS_MASK 0x001F /* ASYNC_SAMPLE_RATE_2_STS - [4:0] */
+#define ARIZONA_ASYNC_SAMPLE_RATE_2_STS_SHIFT 0 /* ASYNC_SAMPLE_RATE_2_STS - [4:0] */
+#define ARIZONA_ASYNC_SAMPLE_RATE_2_STS_WIDTH 5 /* ASYNC_SAMPLE_RATE_2_STS - [4:0] */
/*
* R329 (0x149) - Output system clock
diff --git a/include/linux/mfd/core.h b/include/linux/mfd/core.h
index f543de9..73e1709 100644
--- a/include/linux/mfd/core.h
+++ b/include/linux/mfd/core.h
@@ -44,6 +44,9 @@ struct mfd_cell {
*/
const char *of_compatible;
+ /* Matches ACPI PNP id, either _HID or _CID */
+ const char *acpi_pnpid;
+
/*
* These resources can be specified relative to the parent device.
* For accessing hardware you should use resources from the platform dev
diff --git a/include/linux/mfd/cros_ec.h b/include/linux/mfd/cros_ec.h
index fcbe9d1..0e166b9 100644
--- a/include/linux/mfd/cros_ec.h
+++ b/include/linux/mfd/cros_ec.h
@@ -62,10 +62,6 @@ struct cros_ec_command {
* @dev: Device pointer
* @was_wake_device: true if this device was set to wake the system from
* sleep at the last suspend
- * @cmd_xfer: send command to EC and get response
- * Returns the number of bytes received if the communication succeeded, but
- * that doesn't mean the EC was happy with the command. The caller
- * should check msg.result for the EC's result code.
*
* @priv: Private data
* @irq: Interrupt to use
@@ -82,6 +78,10 @@ struct cros_ec_command {
* @dout_size: size of dout buffer to allocate (zero to use static dout)
* @parent: pointer to parent device (e.g. i2c or spi device)
* @wake_enabled: true if this device can wake the system from sleep
+ * @cmd_xfer: send command to EC and get response
+ * Returns the number of bytes received if the communication succeeded, but
+ * that doesn't mean the EC was happy with the command. The caller
+ * should check msg.result for the EC's result code.
* @lock: one transaction at a time
*/
struct cros_ec_device {
@@ -92,8 +92,6 @@ struct cros_ec_device {
struct device *dev;
bool was_wake_device;
struct class *cros_class;
- int (*cmd_xfer)(struct cros_ec_device *ec,
- struct cros_ec_command *msg);
/* These are used to implement the platform-specific interface */
void *priv;
@@ -104,6 +102,8 @@ struct cros_ec_device {
int dout_size;
struct device *parent;
bool wake_enabled;
+ int (*cmd_xfer)(struct cros_ec_device *ec,
+ struct cros_ec_command *msg);
struct mutex lock;
};
@@ -153,6 +153,18 @@ int cros_ec_check_result(struct cros_ec_device *ec_dev,
struct cros_ec_command *msg);
/**
+ * cros_ec_cmd_xfer - Send a command to the ChromeOS EC
+ *
+ * Call this to send a command to the ChromeOS EC. This should be used
+ * instead of calling the EC's cmd_xfer() callback directly.
+ *
+ * @ec_dev: EC device
+ * @msg: Message to write
+ */
+int cros_ec_cmd_xfer(struct cros_ec_device *ec_dev,
+ struct cros_ec_command *msg);
+
+/**
* cros_ec_remove - Remove a ChromeOS EC
*
* Call this to deregister a ChromeOS EC, then clean up any private data.
diff --git a/include/linux/mfd/da9052/da9052.h b/include/linux/mfd/da9052/da9052.h
index bba65f5..c18a4c1 100644
--- a/include/linux/mfd/da9052/da9052.h
+++ b/include/linux/mfd/da9052/da9052.h
@@ -211,7 +211,7 @@ static inline int da9052_reg_update(struct da9052 *da9052, unsigned char reg,
int da9052_device_init(struct da9052 *da9052, u8 chip_id);
void da9052_device_exit(struct da9052 *da9052);
-extern struct regmap_config da9052_regmap_config;
+extern const struct regmap_config da9052_regmap_config;
int da9052_irq_init(struct da9052 *da9052);
int da9052_irq_exit(struct da9052 *da9052);
diff --git a/include/linux/mfd/davinci_voicecodec.h b/include/linux/mfd/davinci_voicecodec.h
index 5166935..cb01496 100644
--- a/include/linux/mfd/davinci_voicecodec.h
+++ b/include/linux/mfd/davinci_voicecodec.h
@@ -21,7 +21,7 @@
*/
#ifndef __LINUX_MFD_DAVINCI_VOICECODEC_H_
-#define __LINUX_MFD_DAVINIC_VOICECODEC_H_
+#define __LINUX_MFD_DAVINCI_VOICECODEC_H_
#include <linux/kernel.h>
#include <linux/platform_device.h>
diff --git a/include/linux/mfd/hi6421-pmic.h b/include/linux/mfd/hi6421-pmic.h
new file mode 100644
index 0000000..587273e
--- /dev/null
+++ b/include/linux/mfd/hi6421-pmic.h
@@ -0,0 +1,41 @@
+/*
+ * Header file for device driver Hi6421 PMIC
+ *
+ * Copyright (c) <2011-2014> HiSilicon Technologies Co., Ltd.
+ * http://www.hisilicon.com
+ * Copyright (c) <2013-2014> Linaro Ltd.
+ * http://www.linaro.org
+ *
+ * Author: Guodong Xu <guodong.xu@linaro.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __HI6421_PMIC_H
+#define __HI6421_PMIC_H
+
+/* Hi6421 registers are mapped to memory bus in 4 bytes stride */
+#define HI6421_REG_TO_BUS_ADDR(x) (x << 2)
+
+/* Hi6421 maximum register number */
+#define HI6421_REG_MAX 0xFF
+
+/* Hi6421 OCP (over current protection) and DEB (debounce) control register */
+#define HI6421_OCP_DEB_CTRL_REG HI6421_REG_TO_BUS_ADDR(0x51)
+#define HI6421_OCP_DEB_SEL_MASK 0x0C
+#define HI6421_OCP_DEB_SEL_8MS 0x00
+#define HI6421_OCP_DEB_SEL_16MS 0x04
+#define HI6421_OCP_DEB_SEL_32MS 0x08
+#define HI6421_OCP_DEB_SEL_64MS 0x0C
+#define HI6421_OCP_EN_DEBOUNCE_MASK 0x02
+#define HI6421_OCP_EN_DEBOUNCE_ENABLE 0x02
+#define HI6421_OCP_AUTO_STOP_MASK 0x01
+#define HI6421_OCP_AUTO_STOP_ENABLE 0x01
+
+struct hi6421_pmic {
+ struct regmap *regmap;
+};
+
+#endif /* __HI6421_PMIC_H */
diff --git a/include/linux/mfd/max77693-private.h b/include/linux/mfd/max77693-private.h
index d0e578f..fc17d56 100644
--- a/include/linux/mfd/max77693-private.h
+++ b/include/linux/mfd/max77693-private.h
@@ -46,7 +46,7 @@ enum max77693_pmic_reg {
MAX77693_LED_REG_VOUT_FLASH2 = 0x0C,
MAX77693_LED_REG_FLASH_INT = 0x0E,
MAX77693_LED_REG_FLASH_INT_MASK = 0x0F,
- MAX77693_LED_REG_FLASH_INT_STATUS = 0x10,
+ MAX77693_LED_REG_FLASH_STATUS = 0x10,
MAX77693_PMIC_REG_PMIC_ID1 = 0x20,
MAX77693_PMIC_REG_PMIC_ID2 = 0x21,
@@ -85,6 +85,65 @@ enum max77693_pmic_reg {
MAX77693_PMIC_REG_END,
};
+/* MAX77693 ITORCH register */
+#define TORCH_IOUT1_SHIFT 0
+#define TORCH_IOUT2_SHIFT 4
+#define TORCH_IOUT_MIN 15625
+#define TORCH_IOUT_MAX 250000
+#define TORCH_IOUT_STEP 15625
+
+/* MAX77693 IFLASH1 and IFLASH2 registers */
+#define FLASH_IOUT_MIN 15625
+#define FLASH_IOUT_MAX_1LED 1000000
+#define FLASH_IOUT_MAX_2LEDS 625000
+#define FLASH_IOUT_STEP 15625
+
+/* MAX77693 TORCH_TIMER register */
+#define TORCH_TMR_NO_TIMER 0x40
+#define TORCH_TIMEOUT_MIN 262000
+#define TORCH_TIMEOUT_MAX 15728000
+
+/* MAX77693 FLASH_TIMER register */
+#define FLASH_TMR_LEVEL 0x80
+#define FLASH_TIMEOUT_MIN 62500
+#define FLASH_TIMEOUT_MAX 1000000
+#define FLASH_TIMEOUT_STEP 62500
+
+/* MAX77693 FLASH_EN register */
+#define FLASH_EN_OFF 0x0
+#define FLASH_EN_FLASH 0x1
+#define FLASH_EN_TORCH 0x2
+#define FLASH_EN_ON 0x3
+#define FLASH_EN_SHIFT(x) (6 - ((x) - 1) * 2)
+#define TORCH_EN_SHIFT(x) (2 - ((x) - 1) * 2)
+
+/* MAX77693 MAX_FLASH1 register */
+#define MAX_FLASH1_MAX_FL_EN 0x80
+#define MAX_FLASH1_VSYS_MIN 2400
+#define MAX_FLASH1_VSYS_MAX 3400
+#define MAX_FLASH1_VSYS_STEP 33
+
+/* MAX77693 VOUT_CNTL register */
+#define FLASH_BOOST_FIXED 0x04
+#define FLASH_BOOST_LEDNUM_2 0x80
+
+/* MAX77693 VOUT_FLASH1 register */
+#define FLASH_VOUT_MIN 3300
+#define FLASH_VOUT_MAX 5500
+#define FLASH_VOUT_STEP 25
+#define FLASH_VOUT_RMIN 0x0c
+
+/* MAX77693 FLASH_STATUS register */
+#define FLASH_STATUS_FLASH_ON BIT(3)
+#define FLASH_STATUS_TORCH_ON BIT(2)
+
+/* MAX77693 FLASH_INT register */
+#define FLASH_INT_FLED2_OPEN BIT(0)
+#define FLASH_INT_FLED2_SHORT BIT(1)
+#define FLASH_INT_FLED1_OPEN BIT(2)
+#define FLASH_INT_FLED1_SHORT BIT(3)
+#define FLASH_INT_OVER_CURRENT BIT(4)
+
/* MAX77693 CHG_CNFG_00 register */
#define CHG_CNFG_00_CHG_MASK 0x1
#define CHG_CNFG_00_BUCK_MASK 0x4
diff --git a/include/linux/mfd/max77693.h b/include/linux/mfd/max77693.h
index 3f3dc45..f0b6585 100644
--- a/include/linux/mfd/max77693.h
+++ b/include/linux/mfd/max77693.h
@@ -63,6 +63,45 @@ struct max77693_muic_platform_data {
int path_uart;
};
+/* MAX77693 led flash */
+
+/* triggers */
+enum max77693_led_trigger {
+ MAX77693_LED_TRIG_OFF,
+ MAX77693_LED_TRIG_FLASH,
+ MAX77693_LED_TRIG_TORCH,
+ MAX77693_LED_TRIG_EXT,
+ MAX77693_LED_TRIG_SOFT,
+};
+
+/* trigger types */
+enum max77693_led_trigger_type {
+ MAX77693_LED_TRIG_TYPE_EDGE,
+ MAX77693_LED_TRIG_TYPE_LEVEL,
+};
+
+/* boost modes */
+enum max77693_led_boost_mode {
+ MAX77693_LED_BOOST_NONE,
+ MAX77693_LED_BOOST_ADAPTIVE,
+ MAX77693_LED_BOOST_FIXED,
+};
+
+struct max77693_led_platform_data {
+ u32 fleds[2];
+ u32 iout_torch[2];
+ u32 iout_flash[2];
+ u32 trigger[2];
+ u32 trigger_type[2];
+ u32 num_leds;
+ u32 boost_mode;
+ u32 flash_timeout;
+ u32 boost_vout;
+ u32 low_vsys;
+};
+
+/* MAX77693 */
+
struct max77693_platform_data {
/* regulator data */
struct max77693_regulator_data *regulators;
@@ -70,5 +109,6 @@ struct max77693_platform_data {
/* muic data */
struct max77693_muic_platform_data *muic_data;
+ struct max77693_led_platform_data *led_data;
};
#endif /* __LINUX_MFD_MAX77693_H */
diff --git a/include/linux/mfd/rk808.h b/include/linux/mfd/rk808.h
new file mode 100644
index 0000000..fb09312
--- /dev/null
+++ b/include/linux/mfd/rk808.h
@@ -0,0 +1,196 @@
+/*
+ * rk808.h for Rockchip RK808
+ *
+ * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * Author: Chris Zhong <zyw@rock-chips.com>
+ * Author: Zhang Qing <zhangqing@rock-chips.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ */
+
+#ifndef __LINUX_REGULATOR_rk808_H
+#define __LINUX_REGULATOR_rk808_H
+
+#include <linux/regulator/machine.h>
+#include <linux/regmap.h>
+
+/*
+ * rk808 Global Register Map.
+ */
+
+#define RK808_DCDC1 0 /* (0+RK808_START) */
+#define RK808_LDO1 4 /* (4+RK808_START) */
+#define RK808_NUM_REGULATORS 14
+
+enum rk808_reg {
+ RK808_ID_DCDC1,
+ RK808_ID_DCDC2,
+ RK808_ID_DCDC3,
+ RK808_ID_DCDC4,
+ RK808_ID_LDO1,
+ RK808_ID_LDO2,
+ RK808_ID_LDO3,
+ RK808_ID_LDO4,
+ RK808_ID_LDO5,
+ RK808_ID_LDO6,
+ RK808_ID_LDO7,
+ RK808_ID_LDO8,
+ RK808_ID_SWITCH1,
+ RK808_ID_SWITCH2,
+};
+
+#define RK808_SECONDS_REG 0x00
+#define RK808_MINUTES_REG 0x01
+#define RK808_HOURS_REG 0x02
+#define RK808_DAYS_REG 0x03
+#define RK808_MONTHS_REG 0x04
+#define RK808_YEARS_REG 0x05
+#define RK808_WEEKS_REG 0x06
+#define RK808_ALARM_SECONDS_REG 0x08
+#define RK808_ALARM_MINUTES_REG 0x09
+#define RK808_ALARM_HOURS_REG 0x0a
+#define RK808_ALARM_DAYS_REG 0x0b
+#define RK808_ALARM_MONTHS_REG 0x0c
+#define RK808_ALARM_YEARS_REG 0x0d
+#define RK808_RTC_CTRL_REG 0x10
+#define RK808_RTC_STATUS_REG 0x11
+#define RK808_RTC_INT_REG 0x12
+#define RK808_RTC_COMP_LSB_REG 0x13
+#define RK808_RTC_COMP_MSB_REG 0x14
+#define RK808_CLK32OUT_REG 0x20
+#define RK808_VB_MON_REG 0x21
+#define RK808_THERMAL_REG 0x22
+#define RK808_DCDC_EN_REG 0x23
+#define RK808_LDO_EN_REG 0x24
+#define RK808_SLEEP_SET_OFF_REG1 0x25
+#define RK808_SLEEP_SET_OFF_REG2 0x26
+#define RK808_DCDC_UV_STS_REG 0x27
+#define RK808_DCDC_UV_ACT_REG 0x28
+#define RK808_LDO_UV_STS_REG 0x29
+#define RK808_LDO_UV_ACT_REG 0x2a
+#define RK808_DCDC_PG_REG 0x2b
+#define RK808_LDO_PG_REG 0x2c
+#define RK808_VOUT_MON_TDB_REG 0x2d
+#define RK808_BUCK1_CONFIG_REG 0x2e
+#define RK808_BUCK1_ON_VSEL_REG 0x2f
+#define RK808_BUCK1_SLP_VSEL_REG 0x30
+#define RK808_BUCK1_DVS_VSEL_REG 0x31
+#define RK808_BUCK2_CONFIG_REG 0x32
+#define RK808_BUCK2_ON_VSEL_REG 0x33
+#define RK808_BUCK2_SLP_VSEL_REG 0x34
+#define RK808_BUCK2_DVS_VSEL_REG 0x35
+#define RK808_BUCK3_CONFIG_REG 0x36
+#define RK808_BUCK4_CONFIG_REG 0x37
+#define RK808_BUCK4_ON_VSEL_REG 0x38
+#define RK808_BUCK4_SLP_VSEL_REG 0x39
+#define RK808_BOOST_CONFIG_REG 0x3a
+#define RK808_LDO1_ON_VSEL_REG 0x3b
+#define RK808_LDO1_SLP_VSEL_REG 0x3c
+#define RK808_LDO2_ON_VSEL_REG 0x3d
+#define RK808_LDO2_SLP_VSEL_REG 0x3e
+#define RK808_LDO3_ON_VSEL_REG 0x3f
+#define RK808_LDO3_SLP_VSEL_REG 0x40
+#define RK808_LDO4_ON_VSEL_REG 0x41
+#define RK808_LDO4_SLP_VSEL_REG 0x42
+#define RK808_LDO5_ON_VSEL_REG 0x43
+#define RK808_LDO5_SLP_VSEL_REG 0x44
+#define RK808_LDO6_ON_VSEL_REG 0x45
+#define RK808_LDO6_SLP_VSEL_REG 0x46
+#define RK808_LDO7_ON_VSEL_REG 0x47
+#define RK808_LDO7_SLP_VSEL_REG 0x48
+#define RK808_LDO8_ON_VSEL_REG 0x49
+#define RK808_LDO8_SLP_VSEL_REG 0x4a
+#define RK808_DEVCTRL_REG 0x4b
+#define RK808_INT_STS_REG1 0x4c
+#define RK808_INT_STS_MSK_REG1 0x4d
+#define RK808_INT_STS_REG2 0x4e
+#define RK808_INT_STS_MSK_REG2 0x4f
+#define RK808_IO_POL_REG 0x50
+
+/* IRQ Definitions */
+#define RK808_IRQ_VOUT_LO 0
+#define RK808_IRQ_VB_LO 1
+#define RK808_IRQ_PWRON 2
+#define RK808_IRQ_PWRON_LP 3
+#define RK808_IRQ_HOTDIE 4
+#define RK808_IRQ_RTC_ALARM 5
+#define RK808_IRQ_RTC_PERIOD 6
+#define RK808_IRQ_PLUG_IN_INT 7
+#define RK808_IRQ_PLUG_OUT_INT 8
+#define RK808_NUM_IRQ 9
+
+#define RK808_IRQ_VOUT_LO_MSK BIT(0)
+#define RK808_IRQ_VB_LO_MSK BIT(1)
+#define RK808_IRQ_PWRON_MSK BIT(2)
+#define RK808_IRQ_PWRON_LP_MSK BIT(3)
+#define RK808_IRQ_HOTDIE_MSK BIT(4)
+#define RK808_IRQ_RTC_ALARM_MSK BIT(5)
+#define RK808_IRQ_RTC_PERIOD_MSK BIT(6)
+#define RK808_IRQ_PLUG_IN_INT_MSK BIT(0)
+#define RK808_IRQ_PLUG_OUT_INT_MSK BIT(1)
+
+#define RK808_VBAT_LOW_2V8 0x00
+#define RK808_VBAT_LOW_2V9 0x01
+#define RK808_VBAT_LOW_3V0 0x02
+#define RK808_VBAT_LOW_3V1 0x03
+#define RK808_VBAT_LOW_3V2 0x04
+#define RK808_VBAT_LOW_3V3 0x05
+#define RK808_VBAT_LOW_3V4 0x06
+#define RK808_VBAT_LOW_3V5 0x07
+#define VBAT_LOW_VOL_MASK (0x07 << 0)
+#define EN_VABT_LOW_SHUT_DOWN (0x00 << 4)
+#define EN_VBAT_LOW_IRQ (0x1 << 4)
+#define VBAT_LOW_ACT_MASK (0x1 << 4)
+
+#define BUCK_ILMIN_MASK (7 << 0)
+#define BOOST_ILMIN_MASK (7 << 0)
+#define BUCK1_RATE_MASK (3 << 3)
+#define BUCK2_RATE_MASK (3 << 3)
+#define MASK_ALL 0xff
+
+#define SWITCH2_EN BIT(6)
+#define SWITCH1_EN BIT(5)
+#define DEV_OFF_RST BIT(3)
+
+#define VB_LO_ACT BIT(4)
+#define VB_LO_SEL_3500MV (7 << 0)
+
+#define VOUT_LO_INT BIT(0)
+#define CLK32KOUT2_EN BIT(0)
+
+enum {
+ BUCK_ILMIN_50MA,
+ BUCK_ILMIN_100MA,
+ BUCK_ILMIN_150MA,
+ BUCK_ILMIN_200MA,
+ BUCK_ILMIN_250MA,
+ BUCK_ILMIN_300MA,
+ BUCK_ILMIN_350MA,
+ BUCK_ILMIN_400MA,
+};
+
+enum {
+ BOOST_ILMIN_75MA,
+ BOOST_ILMIN_100MA,
+ BOOST_ILMIN_125MA,
+ BOOST_ILMIN_150MA,
+ BOOST_ILMIN_175MA,
+ BOOST_ILMIN_200MA,
+ BOOST_ILMIN_225MA,
+ BOOST_ILMIN_250MA,
+};
+
+struct rk808 {
+ struct i2c_client *i2c;
+ struct regmap_irq_chip_data *irq_data;
+ struct regmap *regmap;
+};
+#endif /* __LINUX_REGULATOR_rk808_H */
diff --git a/include/linux/mfd/rn5t618.h b/include/linux/mfd/rn5t618.h
new file mode 100644
index 0000000..c72d534
--- /dev/null
+++ b/include/linux/mfd/rn5t618.h
@@ -0,0 +1,228 @@
+/*
+ * MFD core driver for Ricoh RN5T618 PMIC
+ *
+ * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __LINUX_MFD_RN5T618_H
+#define __LINUX_MFD_RN5T618_H
+
+#include <linux/regmap.h>
+
+#define RN5T618_LSIVER 0x00
+#define RN5T618_OTPVER 0x01
+#define RN5T618_IODAC 0x02
+#define RN5T618_VINDAC 0x03
+#define RN5T618_CPUCNT 0x06
+#define RN5T618_PSWR 0x07
+#define RN5T618_PONHIS 0x09
+#define RN5T618_POFFHIS 0x0a
+#define RN5T618_WATCHDOG 0x0b
+#define RN5T618_WATCHDOGCNT 0x0c
+#define RN5T618_PWRFUNC 0x0d
+#define RN5T618_SLPCNT 0x0e
+#define RN5T618_REPCNT 0x0f
+#define RN5T618_PWRONTIMSET 0x10
+#define RN5T618_NOETIMSETCNT 0x11
+#define RN5T618_PWRIREN 0x12
+#define RN5T618_PWRIRQ 0x13
+#define RN5T618_PWRMON 0x14
+#define RN5T618_PWRIRSEL 0x15
+#define RN5T618_DC1_SLOT 0x16
+#define RN5T618_DC2_SLOT 0x17
+#define RN5T618_DC3_SLOT 0x18
+#define RN5T618_LDO1_SLOT 0x1b
+#define RN5T618_LDO2_SLOT 0x1c
+#define RN5T618_LDO3_SLOT 0x1d
+#define RN5T618_LDO4_SLOT 0x1e
+#define RN5T618_LDO5_SLOT 0x1f
+#define RN5T618_PSO0_SLOT 0x25
+#define RN5T618_PSO1_SLOT 0x26
+#define RN5T618_PSO2_SLOT 0x27
+#define RN5T618_PSO3_SLOT 0x28
+#define RN5T618_LDORTC1_SLOT 0x2a
+#define RN5T618_DC1CTL 0x2c
+#define RN5T618_DC1CTL2 0x2d
+#define RN5T618_DC2CTL 0x2e
+#define RN5T618_DC2CTL2 0x2f
+#define RN5T618_DC3CTL 0x30
+#define RN5T618_DC3CTL2 0x31
+#define RN5T618_DC1DAC 0x36
+#define RN5T618_DC2DAC 0x37
+#define RN5T618_DC3DAC 0x38
+#define RN5T618_DC1DAC_SLP 0x3b
+#define RN5T618_DC2DAC_SLP 0x3c
+#define RN5T618_DC3DAC_SLP 0x3d
+#define RN5T618_DCIREN 0x40
+#define RN5T618_DCIRQ 0x41
+#define RN5T618_DCIRMON 0x42
+#define RN5T618_LDOEN1 0x44
+#define RN5T618_LDOEN2 0x45
+#define RN5T618_LDODIS 0x46
+#define RN5T618_LDO1DAC 0x4c
+#define RN5T618_LDO2DAC 0x4d
+#define RN5T618_LDO3DAC 0x4e
+#define RN5T618_LDO4DAC 0x4f
+#define RN5T618_LDO5DAC 0x50
+#define RN5T618_LDORTCDAC 0x56
+#define RN5T618_LDORTC2DAC 0x57
+#define RN5T618_LDO1DAC_SLP 0x58
+#define RN5T618_LDO2DAC_SLP 0x59
+#define RN5T618_LDO3DAC_SLP 0x5a
+#define RN5T618_LDO4DAC_SLP 0x5b
+#define RN5T618_LDO5DAC_SLP 0x5c
+#define RN5T618_ADCCNT1 0x64
+#define RN5T618_ADCCNT2 0x65
+#define RN5T618_ADCCNT3 0x66
+#define RN5T618_ILIMDATAH 0x68
+#define RN5T618_ILIMDATAL 0x69
+#define RN5T618_VBATDATAH 0x6a
+#define RN5T618_VBATDATAL 0x6b
+#define RN5T618_VADPDATAH 0x6c
+#define RN5T618_VADPDATAL 0x6d
+#define RN5T618_VUSBDATAH 0x6e
+#define RN5T618_VUSBDATAL 0x6f
+#define RN5T618_VSYSDATAH 0x70
+#define RN5T618_VSYSDATAL 0x71
+#define RN5T618_VTHMDATAH 0x72
+#define RN5T618_VTHMDATAL 0x73
+#define RN5T618_AIN1DATAH 0x74
+#define RN5T618_AIN1DATAL 0x75
+#define RN5T618_AIN0DATAH 0x76
+#define RN5T618_AIN0DATAL 0x77
+#define RN5T618_ILIMTHL 0x78
+#define RN5T618_ILIMTHH 0x79
+#define RN5T618_VBATTHL 0x7a
+#define RN5T618_VBATTHH 0x7b
+#define RN5T618_VADPTHL 0x7c
+#define RN5T618_VADPTHH 0x7d
+#define RN5T618_VUSBTHL 0x7e
+#define RN5T618_VUSBTHH 0x7f
+#define RN5T618_VSYSTHL 0x80
+#define RN5T618_VSYSTHH 0x81
+#define RN5T618_VTHMTHL 0x82
+#define RN5T618_VTHMTHH 0x83
+#define RN5T618_AIN1THL 0x84
+#define RN5T618_AIN1THH 0x85
+#define RN5T618_AIN0THL 0x86
+#define RN5T618_AIN0THH 0x87
+#define RN5T618_EN_ADCIR1 0x88
+#define RN5T618_EN_ADCIR2 0x89
+#define RN5T618_EN_ADCIR3 0x8a
+#define RN5T618_IR_ADC1 0x8c
+#define RN5T618_IR_ADC2 0x8d
+#define RN5T618_IR_ADC3 0x8e
+#define RN5T618_IOSEL 0x90
+#define RN5T618_IOOUT 0x91
+#define RN5T618_GPEDGE1 0x92
+#define RN5T618_GPEDGE2 0x93
+#define RN5T618_EN_GPIR 0x94
+#define RN5T618_IR_GPR 0x95
+#define RN5T618_IR_GPF 0x96
+#define RN5T618_MON_IOIN 0x97
+#define RN5T618_GPLED_FUNC 0x98
+#define RN5T618_INTPOL 0x9c
+#define RN5T618_INTEN 0x9d
+#define RN5T618_INTMON 0x9e
+#define RN5T618_PREVINDAC 0xb0
+#define RN5T618_BATDAC 0xb1
+#define RN5T618_CHGCTL1 0xb3
+#define RN5T618_CHGCTL2 0xb4
+#define RN5T618_VSYSSET 0xb5
+#define RN5T618_REGISET1 0xb6
+#define RN5T618_REGISET2 0xb7
+#define RN5T618_CHGISET 0xb8
+#define RN5T618_TIMSET 0xb9
+#define RN5T618_BATSET1 0xba
+#define RN5T618_BATSET2 0xbb
+#define RN5T618_DIESET 0xbc
+#define RN5T618_CHGSTATE 0xbd
+#define RN5T618_CHGCTRL_IRFMASK 0xbe
+#define RN5T618_CHGSTAT_IRFMASK1 0xbf
+#define RN5T618_CHGSTAT_IRFMASK2 0xc0
+#define RN5T618_CHGERR_IRFMASK 0xc1
+#define RN5T618_CHGCTRL_IRR 0xc2
+#define RN5T618_CHGSTAT_IRR1 0xc3
+#define RN5T618_CHGSTAT_IRR2 0xc4
+#define RN5T618_CHGERR_IRR 0xc5
+#define RN5T618_CHGCTRL_MONI 0xc6
+#define RN5T618_CHGSTAT_MONI1 0xc7
+#define RN5T618_CHGSTAT_MONI2 0xc8
+#define RN5T618_CHGERR_MONI 0xc9
+#define RN5T618_CHGCTRL_DETMOD1 0xca
+#define RN5T618_CHGCTRL_DETMOD2 0xcb
+#define RN5T618_CHGSTAT_DETMOD1 0xcc
+#define RN5T618_CHGSTAT_DETMOD2 0xcd
+#define RN5T618_CHGSTAT_DETMOD3 0xce
+#define RN5T618_CHGERR_DETMOD1 0xcf
+#define RN5T618_CHGERR_DETMOD2 0xd0
+#define RN5T618_CHGOSCCTL 0xd4
+#define RN5T618_CHGOSCSCORESET1 0xd5
+#define RN5T618_CHGOSCSCORESET2 0xd6
+#define RN5T618_CHGOSCSCORESET3 0xd7
+#define RN5T618_CHGOSCFREQSET1 0xd8
+#define RN5T618_CHGOSCFREQSET2 0xd9
+#define RN5T618_CONTROL 0xe0
+#define RN5T618_SOC 0xe1
+#define RN5T618_RE_CAP_H 0xe2
+#define RN5T618_RE_CAP_L 0xe3
+#define RN5T618_FA_CAP_H 0xe4
+#define RN5T618_FA_CAP_L 0xe5
+#define RN5T618_AGE 0xe6
+#define RN5T618_TT_EMPTY_H 0xe7
+#define RN5T618_TT_EMPTY_L 0xe8
+#define RN5T618_TT_FULL_H 0xe9
+#define RN5T618_TT_FULL_L 0xea
+#define RN5T618_VOLTAGE_1 0xeb
+#define RN5T618_VOLTAGE_0 0xec
+#define RN5T618_TEMP_1 0xed
+#define RN5T618_TEMP_0 0xee
+#define RN5T618_CC_CTRL 0xef
+#define RN5T618_CC_COUNT2 0xf0
+#define RN5T618_CC_COUNT1 0xf1
+#define RN5T618_CC_COUNT0 0xf2
+#define RN5T618_CC_SUMREG3 0xf3
+#define RN5T618_CC_SUMREG2 0xf4
+#define RN5T618_CC_SUMREG1 0xf5
+#define RN5T618_CC_SUMREG0 0xf6
+#define RN5T618_CC_OFFREG1 0xf7
+#define RN5T618_CC_OFFREG0 0xf8
+#define RN5T618_CC_GAINREG1 0xf9
+#define RN5T618_CC_GAINREG0 0xfa
+#define RN5T618_CC_AVEREG1 0xfb
+#define RN5T618_CC_AVEREG0 0xfc
+#define RN5T618_MAX_REG 0xfc
+
+#define RN5T618_REPCNT_REPWRON BIT(0)
+#define RN5T618_SLPCNT_SWPWROFF BIT(0)
+#define RN5T618_WATCHDOG_WDOGEN BIT(2)
+#define RN5T618_WATCHDOG_WDOGTIM_M (BIT(0) | BIT(1))
+#define RN5T618_WATCHDOG_WDOGTIM_S 0
+#define RN5T618_PWRIRQ_IR_WDOG BIT(6)
+
+enum {
+ RN5T618_DCDC1,
+ RN5T618_DCDC2,
+ RN5T618_DCDC3,
+ RN5T618_LDO1,
+ RN5T618_LDO2,
+ RN5T618_LDO3,
+ RN5T618_LDO4,
+ RN5T618_LDO5,
+ RN5T618_LDORTC1,
+ RN5T618_LDORTC2,
+ RN5T618_REG_NUM,
+};
+
+struct rn5t618 {
+ struct regmap *regmap;
+};
+
+#endif /* __LINUX_MFD_RN5T618_H */
diff --git a/include/linux/mfd/ti_am335x_tscadc.h b/include/linux/mfd/ti_am335x_tscadc.h
index fb96c84..e2e7005 100644
--- a/include/linux/mfd/ti_am335x_tscadc.h
+++ b/include/linux/mfd/ti_am335x_tscadc.h
@@ -155,6 +155,7 @@ struct ti_tscadc_dev {
void __iomem *tscadc_base;
int irq;
int used_cells; /* 1-2 */
+ int tsc_wires;
int tsc_cell; /* -1 if not used */
int adc_cell; /* -1 if not used */
struct mfd_cell cells[TSCADC_CELLS];
diff --git a/include/linux/mfd/ti_ssp.h b/include/linux/mfd/ti_ssp.h
deleted file mode 100644
index dbb4b43..0000000
--- a/include/linux/mfd/ti_ssp.h
+++ /dev/null
@@ -1,93 +0,0 @@
-/*
- * Sequencer Serial Port (SSP) driver for Texas Instruments' SoCs
- *
- * Copyright (C) 2010 Texas Instruments Inc
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#ifndef __TI_SSP_H__
-#define __TI_SSP_H__
-
-struct ti_ssp_dev_data {
- const char *dev_name;
- void *pdata;
- size_t pdata_size;
-};
-
-struct ti_ssp_data {
- unsigned long out_clock;
- struct ti_ssp_dev_data dev_data[2];
-};
-
-struct ti_ssp_spi_data {
- unsigned long iosel;
- int num_cs;
- void (*select)(int cs);
-};
-
-/*
- * Sequencer port IO pin configuration bits. These do not correlate 1-1 with
- * the hardware. The iosel field in the port data combines iosel1 and iosel2,
- * and is therefore not a direct map to register space. It is best to use the
- * macros below to construct iosel values.
- *
- * least significant 16 bits --> iosel1
- * most significant 16 bits --> iosel2
- */
-
-#define SSP_IN 0x0000
-#define SSP_DATA 0x0001
-#define SSP_CLOCK 0x0002
-#define SSP_CHIPSEL 0x0003
-#define SSP_OUT 0x0004
-#define SSP_PIN_SEL(pin, v) ((v) << ((pin) * 3))
-#define SSP_PIN_MASK(pin) SSP_PIN_SEL(pin, 0x7)
-#define SSP_INPUT_SEL(pin) ((pin) << 16)
-
-/* Sequencer port config bits */
-#define SSP_EARLY_DIN BIT(8)
-#define SSP_DELAY_DOUT BIT(9)
-
-/* Sequence map definitions */
-#define SSP_CLK_HIGH BIT(0)
-#define SSP_CLK_LOW 0
-#define SSP_DATA_HIGH BIT(1)
-#define SSP_DATA_LOW 0
-#define SSP_CS_HIGH BIT(2)
-#define SSP_CS_LOW 0
-#define SSP_OUT_MODE BIT(3)
-#define SSP_IN_MODE 0
-#define SSP_DATA_REG BIT(4)
-#define SSP_ADDR_REG 0
-
-#define SSP_OPCODE_DIRECT ((0x0) << 5)
-#define SSP_OPCODE_TOGGLE ((0x1) << 5)
-#define SSP_OPCODE_SHIFT ((0x2) << 5)
-#define SSP_OPCODE_BRANCH0 ((0x4) << 5)
-#define SSP_OPCODE_BRANCH1 ((0x5) << 5)
-#define SSP_OPCODE_BRANCH ((0x6) << 5)
-#define SSP_OPCODE_STOP ((0x7) << 5)
-#define SSP_BRANCH(addr) ((addr) << 8)
-#define SSP_COUNT(cycles) ((cycles) << 8)
-
-int ti_ssp_raw_read(struct device *dev);
-int ti_ssp_raw_write(struct device *dev, u32 val);
-int ti_ssp_load(struct device *dev, int offs, u32* prog, int len);
-int ti_ssp_run(struct device *dev, u32 pc, u32 input, u32 *output);
-int ti_ssp_set_mode(struct device *dev, int mode);
-int ti_ssp_set_iosel(struct device *dev, u32 iosel);
-
-#endif /* __TI_SSP_H__ */
diff --git a/include/linux/mfd/tps65217.h b/include/linux/mfd/tps65217.h
index 95d6938..ac7fba4 100644
--- a/include/linux/mfd/tps65217.h
+++ b/include/linux/mfd/tps65217.h
@@ -60,6 +60,8 @@
#define TPS65217_REG_SEQ5 0X1D
#define TPS65217_REG_SEQ6 0X1E
+#define TPS65217_REG_MAX TPS65217_REG_SEQ6
+
/* Register field definitions */
#define TPS65217_CHIPID_CHIP_MASK 0xF0
#define TPS65217_CHIPID_REV_MASK 0x0F
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 24f97bf..1fa99a3 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2560,6 +2560,7 @@
#define PCI_DEVICE_ID_INTEL_MFD_EMMC0 0x0823
#define PCI_DEVICE_ID_INTEL_MFD_EMMC1 0x0824
#define PCI_DEVICE_ID_INTEL_MRST_SD2 0x084F
+#define PCI_DEVICE_ID_INTEL_QUARK_X1000_ILB 0x095E
#define PCI_DEVICE_ID_INTEL_I960 0x0960
#define PCI_DEVICE_ID_INTEL_I960RM 0x0962
#define PCI_DEVICE_ID_INTEL_CENTERTON_ILB 0x0c60

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