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+* Marvell PXA910 Clock Controller
+The PXA910 clock subsystem generates and supplies clock to various
+controllers within the PXA910 SoC.
+- compatible: should be one of the following.
+ - "marvell,pxa910-clock" - controller compatible with PXA910 SoC.
+- reg: physical base address of the clock subsystem and length of memory mapped
+ region. There are 4 places in SOC has clock control logic:
+ "mpmu", "apmu", "apbc", "apbcp". So four reg spaces need to be defined.
+- #clock-cells: should be 1.
+- #reset-cells: should be 1.
+Each clock is assigned an identifier and client nodes use this identifier
+to specify the clock which they consume.
+All these identifier could be found in <dt-bindings/clock/marvell-pxa910.h>.