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-rw-r--r--include/linux/acpi.h30
-rw-r--r--include/linux/ahci_platform.h1
-rw-r--r--include/linux/amba/bus.h1
-rw-r--r--include/linux/amba/mmci.h42
-rw-r--r--include/linux/amba/xilinx_dma.h47
-rw-r--r--include/linux/atomic.h36
-rw-r--r--include/linux/backlight.h7
-rw-r--r--include/linux/bio.h2
-rw-r--r--include/linux/bitops.h20
-rw-r--r--include/linux/blk-mq.h103
-rw-r--r--include/linux/blk_types.h6
-rw-r--r--include/linux/blkdev.h74
-rw-r--r--include/linux/bootmem.h6
-rw-r--r--include/linux/buffer_head.h4
-rw-r--r--include/linux/capability.h2
-rw-r--r--include/linux/ceph/libceph.h2
-rw-r--r--include/linux/cgroup.h287
-rw-r--r--include/linux/cgroup_subsys.h11
-rw-r--r--include/linux/clk-provider.h163
-rw-r--r--include/linux/clk/at91_pmc.h1
-rw-r--r--include/linux/clk/shmobile.h3
-rw-r--r--include/linux/clk/sunxi.h22
-rw-r--r--include/linux/clocksource.h16
-rw-r--r--include/linux/compaction.h4
-rw-r--r--include/linux/compiler-intel.h3
-rw-r--r--include/linux/compiler.h13
-rw-r--r--include/linux/connector.h1
-rw-r--r--include/linux/console_struct.h5
-rw-r--r--include/linux/cpu.h1
-rw-r--r--include/linux/cpufreq.h50
-rw-r--r--include/linux/cpuidle.h8
-rw-r--r--include/linux/cpumask.h2
-rw-r--r--include/linux/cpuset.h29
-rw-r--r--include/linux/dcache.h2
-rw-r--r--include/linux/devfreq.h35
-rw-r--r--include/linux/device.h23
-rw-r--r--include/linux/dma-contiguous.h9
-rw-r--r--include/linux/dma-mapping.h20
-rw-r--r--include/linux/dmaengine.h3
-rw-r--r--include/linux/efi.h24
-rw-r--r--include/linux/elevator.h2
-rw-r--r--include/linux/extcon.h37
-rw-r--r--include/linux/f2fs_fs.h8
-rw-r--r--include/linux/fb.h3
-rw-r--r--include/linux/firewire.h3
-rw-r--r--include/linux/fs.h42
-rw-r--r--include/linux/ftrace.h58
-rw-r--r--include/linux/ftrace_event.h3
-rw-r--r--include/linux/genhd.h2
-rw-r--r--include/linux/gfp.h15
-rw-r--r--include/linux/goldfish.h15
-rw-r--r--include/linux/gpio/consumer.h41
-rw-r--r--include/linux/gpio/driver.h5
-rw-r--r--include/linux/gpio_keys.h48
-rw-r--r--include/linux/hid-sensor-hub.h8
-rw-r--r--include/linux/hid-sensor-ids.h1
-rw-r--r--include/linux/hid.h17
-rw-r--r--include/linux/hsi/hsi.h39
-rw-r--r--include/linux/hsi/ssi_protocol.h42
-rw-r--r--include/linux/hugetlb.h32
-rw-r--r--include/linux/hyperv.h7
-rw-r--r--include/linux/i2c/atmel_mxt_ts.h27
-rw-r--r--include/linux/i2c/twl.h4
-rw-r--r--include/linux/idr.h13
-rw-r--r--include/linux/if_macvlan.h1
-rw-r--r--include/linux/if_team.h1
-rw-r--r--include/linux/if_vlan.h15
-rw-r--r--include/linux/iio/common/st_sensors.h4
-rw-r--r--include/linux/iio/consumer.h13
-rw-r--r--include/linux/iio/iio.h24
-rw-r--r--include/linux/iio/types.h4
-rw-r--r--include/linux/init.h14
-rw-r--r--include/linux/input-polldev.h3
-rw-r--r--include/linux/input/pixcir_ts.h44
-rw-r--r--include/linux/input/touchscreen.h22
-rw-r--r--include/linux/interrupt.h59
-rw-r--r--include/linux/irq.h38
-rw-r--r--include/linux/irqchip/arm-gic.h2
-rw-r--r--include/linux/irqdesc.h4
-rw-r--r--include/linux/jump_label.h20
-rw-r--r--include/linux/kernfs.h36
-rw-r--r--include/linux/key.h13
-rw-r--r--include/linux/kmemleak.h4
-rw-r--r--include/linux/kobject.h2
-rw-r--r--include/linux/kprobes.h2
-rw-r--r--include/linux/kvm_host.h15
-rw-r--r--include/linux/linkage.h4
-rw-r--r--include/linux/lockd/lockd.h2
-rw-r--r--include/linux/mbus.h2
-rw-r--r--include/linux/mc146818rtc.h4
-rw-r--r--include/linux/mcb.h6
-rw-r--r--include/linux/memblock.h81
-rw-r--r--include/linux/memcontrol.h32
-rw-r--r--include/linux/memory_hotplug.h14
-rw-r--r--include/linux/mempolicy.h6
-rw-r--r--include/linux/mfd/abx500.h1
-rw-r--r--include/linux/mfd/arizona/core.h3
-rw-r--r--include/linux/mfd/arizona/registers.h14
-rw-r--r--include/linux/mfd/axp20x.h180
-rw-r--r--include/linux/mfd/bcm590xx.h9
-rw-r--r--include/linux/mfd/core.h2
-rw-r--r--include/linux/mfd/cros_ec.h4
-rw-r--r--include/linux/mfd/cros_ec_commands.h1128
-rw-r--r--include/linux/mfd/ipaq-micro.h148
-rw-r--r--include/linux/mfd/kempld.h4
-rw-r--r--include/linux/mfd/max14577-private.h222
-rw-r--r--include/linux/mfd/max14577.h19
-rw-r--r--include/linux/mfd/mc13xxx.h22
-rw-r--r--include/linux/mfd/palmas.h2168
-rw-r--r--include/linux/mfd/pm8xxx/core.h81
-rw-r--r--include/linux/mfd/rdc321x.h2
-rw-r--r--include/linux/mfd/rtsx_common.h1
-rw-r--r--include/linux/mfd/rtsx_pci.h6
-rw-r--r--include/linux/mfd/samsung/core.h35
-rw-r--r--include/linux/mfd/samsung/rtc.h86
-rw-r--r--include/linux/mfd/samsung/s2mps14.h2
-rw-r--r--include/linux/mfd/stmpe.h19
-rw-r--r--include/linux/mfd/syscon.h2
-rw-r--r--include/linux/mfd/syscon/exynos5-pmu.h44
-rw-r--r--include/linux/mfd/tc3589x.h1
-rw-r--r--include/linux/mfd/tps65090.h19
-rw-r--r--include/linux/mfd/tps65217.h1
-rw-r--r--include/linux/mfd/tps65218.h1
-rw-r--r--include/linux/mfd/tps6586x.h2
-rw-r--r--include/linux/mfd/twl6040.h3
-rw-r--r--include/linux/migrate.h11
-rw-r--r--include/linux/miscdevice.h2
-rw-r--r--include/linux/mlx4/device.h15
-rw-r--r--include/linux/mlx4/qp.h11
-rw-r--r--include/linux/mlx5/driver.h1
-rw-r--r--include/linux/mm.h41
-rw-r--r--include/linux/mm_types.h8
-rw-r--r--include/linux/mmc/card.h29
-rw-r--r--include/linux/mmc/dw_mmc.h14
-rw-r--r--include/linux/mmc/host.h59
-rw-r--r--include/linux/mmc/mmc.h23
-rw-r--r--include/linux/mmc/sdhci.h15
-rw-r--r--include/linux/mmdebug.h15
-rw-r--r--include/linux/mmzone.h35
-rw-r--r--include/linux/moduleparam.h2
-rw-r--r--include/linux/mtd/nand.h10
-rw-r--r--include/linux/mtd/pfow.h3
-rw-r--r--include/linux/mtd/spi-nor.h214
-rw-r--r--include/linux/net.h15
-rw-r--r--include/linux/netdevice.h36
-rw-r--r--include/linux/netlink.h14
-rw-r--r--include/linux/nfs.h5
-rw-r--r--include/linux/nfs4.h2
-rw-r--r--include/linux/nfs_fs.h9
-rw-r--r--include/linux/nfs_page.h46
-rw-r--r--include/linux/nfs_xdr.h106
-rw-r--r--include/linux/nfsd/debug.h19
-rw-r--r--include/linux/nfsd/export.h110
-rw-r--r--include/linux/nfsd/nfsfh.h63
-rw-r--r--include/linux/nfsd/stats.h45
-rw-r--r--include/linux/of.h31
-rw-r--r--include/linux/of_address.h15
-rw-r--r--include/linux/of_fdt.h64
-rw-r--r--include/linux/of_gpio.h35
-rw-r--r--include/linux/of_irq.h5
-rw-r--r--include/linux/of_mdio.h7
-rw-r--r--include/linux/of_pci.h36
-rw-r--r--include/linux/of_platform.h7
-rw-r--r--include/linux/of_reserved_mem.h22
-rw-r--r--include/linux/omap-dma.h21
-rw-r--r--include/linux/omap-dmaengine.h21
-rw-r--r--include/linux/page-flags.h14
-rw-r--r--include/linux/pageblock-flags.h30
-rw-r--r--include/linux/pagemap.h111
-rw-r--r--include/linux/pci.h40
-rw-r--r--include/linux/pci_ids.h3
-rw-r--r--include/linux/percpu-refcount.h40
-rw-r--r--include/linux/percpu.h4
-rw-r--r--include/linux/perf_event.h3
-rw-r--r--include/linux/platform_data/adau17x1.h109
-rw-r--r--include/linux/platform_data/at91_adc.h27
-rw-r--r--include/linux/platform_data/atmel.h8
-rw-r--r--include/linux/platform_data/edma.h28
-rw-r--r--include/linux/platform_data/elm.h3
-rw-r--r--include/linux/platform_data/intel-mid_wdt.h22
-rw-r--r--include/linux/platform_data/ipmmu-vmsa.h24
-rw-r--r--include/linux/platform_data/max3421-hcd.h24
-rw-r--r--include/linux/platform_data/mipi-csis.h28
-rw-r--r--include/linux/platform_data/mtd-nand-omap2.h5
-rw-r--r--include/linux/platform_data/mtd-nand-pxa3xx.h3
-rw-r--r--include/linux/platform_data/omap4-keypad.h13
-rw-r--r--include/linux/platform_data/pwm-renesas-tpu.h16
-rw-r--r--include/linux/platform_data/syscon.h8
-rw-r--r--include/linux/plist.h45
-rw-r--r--include/linux/pm.h36
-rw-r--r--include/linux/pm_opp.h20
-rw-r--r--include/linux/pm_runtime.h6
-rw-r--r--include/linux/power_supply.h2
-rw-r--r--include/linux/printk.h38
-rw-r--r--include/linux/proc_fs.h4
-rw-r--r--include/linux/ptrace.h32
-rw-r--r--include/linux/pwm.h6
-rw-r--r--include/linux/pwm_backlight.h5
-rw-r--r--include/linux/quota.h1
-rw-r--r--include/linux/rcupdate.h72
-rw-r--r--include/linux/rcutiny.h4
-rw-r--r--include/linux/rcutree.h1
-rw-r--r--include/linux/regmap.h6
-rw-r--r--include/linux/regulator/consumer.h42
-rw-r--r--include/linux/reset.h10
-rw-r--r--include/linux/rmap.h11
-rw-r--r--include/linux/rtnetlink.h5
-rw-r--r--include/linux/sched.h133
-rw-r--r--include/linux/sched/prio.h16
-rw-r--r--include/linux/sched/sysctl.h4
-rw-r--r--include/linux/sched_clock.h1
-rw-r--r--include/linux/security.h6
-rw-r--r--include/linux/serial_core.h22
-rw-r--r--include/linux/sh_timer.h1
-rw-r--r--include/linux/shdma-base.h1
-rw-r--r--include/linux/shm.h3
-rw-r--r--include/linux/signal.h21
-rw-r--r--include/linux/slab.h20
-rw-r--r--include/linux/slub_def.h9
-rw-r--r--include/linux/smp.h2
-rw-r--r--include/linux/sock_diag.h2
-rw-r--r--include/linux/spi/adi_spi3.h254
-rw-r--r--include/linux/spi/rspi.h2
-rw-r--r--include/linux/splice.h10
-rw-r--r--include/linux/string.h3
-rw-r--r--include/linux/sunrpc/sched.h8
-rw-r--r--include/linux/sunrpc/svc.h13
-rw-r--r--include/linux/sunrpc/svc_rdma.h3
-rw-r--r--include/linux/sunrpc/svc_xprt.h2
-rw-r--r--include/linux/sunrpc/xdr.h3
-rw-r--r--include/linux/sunrpc/xprt.h14
-rw-r--r--include/linux/suspend.h9
-rw-r--r--include/linux/swap.h38
-rw-r--r--include/linux/swapfile.h2
-rw-r--r--include/linux/swapops.h2
-rw-r--r--include/linux/swiotlb.h2
-rw-r--r--include/linux/syscalls.h4
-rw-r--r--include/linux/sysfs.h2
-rw-r--r--include/linux/thread_info.h16
-rw-r--r--include/linux/topology.h131
-rw-r--r--include/linux/torture.h8
-rw-r--r--include/linux/trace_seq.h10
-rw-r--r--include/linux/tracehook.h2
-rw-r--r--include/linux/tracepoint.h10
-rw-r--r--include/linux/tty.h1
-rw-r--r--include/linux/tty_ldisc.h5
-rw-r--r--include/linux/types.h1
-rw-r--r--include/linux/uio.h51
-rw-r--r--include/linux/uprobes.h3
-rw-r--r--include/linux/usb.h2
-rw-r--r--include/linux/usb/composite.h79
-rw-r--r--include/linux/usb/msm_hsusb.h39
-rw-r--r--include/linux/usb/msm_hsusb_hw.h14
-rw-r--r--include/linux/usb/usb_phy_generic.h (renamed from include/linux/usb/usb_phy_gen_xceiv.h)13
-rw-r--r--include/linux/vexpress.h94
-rw-r--r--include/linux/vfio.h5
-rw-r--r--include/linux/virtio.h2
-rw-r--r--include/linux/vm_event_item.h4
-rw-r--r--include/linux/vmstat.h6
-rw-r--r--include/linux/workqueue.h40
-rw-r--r--include/linux/zbud.h2
261 files changed, 6410 insertions, 3201 deletions
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index 7a8f2cd66c8b..358c01b971db 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -37,6 +37,7 @@
#include <linux/list.h>
#include <linux/mod_devicetable.h>
+#include <linux/dynamic_debug.h>
#include <acpi/acpi.h>
#include <acpi/acpi_bus.h>
@@ -184,6 +185,8 @@ extern int ec_transaction(u8 command,
u8 *rdata, unsigned rdata_len);
extern acpi_handle ec_get_handle(void);
+extern bool acpi_is_pnp_device(struct acpi_device *);
+
#if defined(CONFIG_ACPI_WMI) || defined(CONFIG_ACPI_WMI_MODULE)
typedef void (*wmi_notify_handler) (u32 value, void *context);
@@ -554,14 +557,20 @@ static inline int acpi_subsys_runtime_resume(struct device *dev) { return 0; }
int acpi_dev_suspend_late(struct device *dev);
int acpi_dev_resume_early(struct device *dev);
int acpi_subsys_prepare(struct device *dev);
+void acpi_subsys_complete(struct device *dev);
int acpi_subsys_suspend_late(struct device *dev);
int acpi_subsys_resume_early(struct device *dev);
+int acpi_subsys_suspend(struct device *dev);
+int acpi_subsys_freeze(struct device *dev);
#else
static inline int acpi_dev_suspend_late(struct device *dev) { return 0; }
static inline int acpi_dev_resume_early(struct device *dev) { return 0; }
static inline int acpi_subsys_prepare(struct device *dev) { return 0; }
+static inline void acpi_subsys_complete(struct device *dev) {}
static inline int acpi_subsys_suspend_late(struct device *dev) { return 0; }
static inline int acpi_subsys_resume_early(struct device *dev) { return 0; }
+static inline int acpi_subsys_suspend(struct device *dev) { return 0; }
+static inline int acpi_subsys_freeze(struct device *dev) { return 0; }
#endif
#if defined(CONFIG_ACPI) && defined(CONFIG_PM)
@@ -589,6 +598,14 @@ static inline __printf(3, 4) void
acpi_handle_printk(const char *level, void *handle, const char *fmt, ...) {}
#endif /* !CONFIG_ACPI */
+#if defined(CONFIG_ACPI) && defined(CONFIG_DYNAMIC_DEBUG)
+__printf(3, 4)
+void __acpi_handle_debug(struct _ddebug *descriptor, acpi_handle handle, const char *fmt, ...);
+#else
+#define __acpi_handle_debug(descriptor, handle, fmt, ...) \
+ acpi_handle_printk(KERN_DEBUG, handle, fmt, ##__VA_ARGS__);
+#endif
+
/*
* acpi_handle_<level>: Print message with ACPI prefix and object path
*
@@ -610,11 +627,19 @@ acpi_handle_printk(const char *level, void *handle, const char *fmt, ...) {}
#define acpi_handle_info(handle, fmt, ...) \
acpi_handle_printk(KERN_INFO, handle, fmt, ##__VA_ARGS__)
-/* REVISIT: Support CONFIG_DYNAMIC_DEBUG when necessary */
-#if defined(DEBUG) || defined(CONFIG_DYNAMIC_DEBUG)
+#if defined(DEBUG)
#define acpi_handle_debug(handle, fmt, ...) \
acpi_handle_printk(KERN_DEBUG, handle, fmt, ##__VA_ARGS__)
#else
+#if defined(CONFIG_DYNAMIC_DEBUG)
+#define acpi_handle_debug(handle, fmt, ...) \
+do { \
+ DEFINE_DYNAMIC_DEBUG_METADATA(descriptor, fmt); \
+ if (unlikely(descriptor.flags & _DPRINTK_FLAGS_PRINT)) \
+ __acpi_handle_debug(&descriptor, handle, pr_fmt(fmt), \
+ ##__VA_ARGS__); \
+} while (0)
+#else
#define acpi_handle_debug(handle, fmt, ...) \
({ \
if (0) \
@@ -622,5 +647,6 @@ acpi_handle_printk(const char *level, void *handle, const char *fmt, ...) {}
0; \
})
#endif
+#endif
#endif /*_LINUX_ACPI_H*/
diff --git a/include/linux/ahci_platform.h b/include/linux/ahci_platform.h
index 1f16d502600c..6dfd51a04d77 100644
--- a/include/linux/ahci_platform.h
+++ b/include/linux/ahci_platform.h
@@ -44,6 +44,7 @@ struct ahci_host_priv *ahci_platform_get_resources(
int ahci_platform_init_host(struct platform_device *pdev,
struct ahci_host_priv *hpriv,
const struct ata_port_info *pi_template,
+ unsigned long host_flags,
unsigned int force_port_map,
unsigned int mask_port_map);
diff --git a/include/linux/amba/bus.h b/include/linux/amba/bus.h
index 63b5eff0a80f..fdd7e1b61f60 100644
--- a/include/linux/amba/bus.h
+++ b/include/linux/amba/bus.h
@@ -47,6 +47,7 @@ struct amba_driver {
enum amba_vendor {
AMBA_VENDOR_ARM = 0x41,
AMBA_VENDOR_ST = 0x80,
+ AMBA_VENDOR_QCOM = 0x51,
};
extern struct bus_type amba_bustype;
diff --git a/include/linux/amba/mmci.h b/include/linux/amba/mmci.h
index 32a89cf5ec45..8c98113069ce 100644
--- a/include/linux/amba/mmci.h
+++ b/include/linux/amba/mmci.h
@@ -6,28 +6,9 @@
#include <linux/mmc/host.h>
-
-/*
- * These defines is places here due to access is needed from machine
- * configuration files. The ST Micro version does not have ROD and
- * reuse the voltage registers for direction settings.
- */
-#define MCI_ST_DATA2DIREN (1 << 2)
-#define MCI_ST_CMDDIREN (1 << 3)
-#define MCI_ST_DATA0DIREN (1 << 4)
-#define MCI_ST_DATA31DIREN (1 << 5)
-#define MCI_ST_FBCLKEN (1 << 7)
-#define MCI_ST_DATA74DIREN (1 << 8)
-
-/* Just some dummy forwarding */
-struct dma_chan;
-
/**
* struct mmci_platform_data - platform configuration for the MMCI
* (also known as PL180) block.
- * @f_max: the maximum operational frequency for this host in this
- * platform configuration. When this is specified it takes precedence
- * over the module parameter for the same frequency.
* @ocr_mask: available voltages on the 4 pins from the block, this
* is ignored if a regulator is used, see the MMC_VDD_* masks in
* mmc/host.h
@@ -42,37 +23,14 @@ struct dma_chan;
* @gpio_wp: read this GPIO pin to see if the card is write protected
* @gpio_cd: read this GPIO pin to detect card insertion
* @cd_invert: true if the gpio_cd pin value is active low
- * @capabilities: the capabilities of the block as implemented in
- * this platform, signify anything MMC_CAP_* from mmc/host.h
- * @capabilities2: more capabilities, MMC_CAP2_* from mmc/host.h
- * @sigdir: a bit field indicating for what bits in the MMC bus the host
- * should enable signal direction indication.
- * @dma_filter: function used to select an appropriate RX and TX
- * DMA channel to be used for DMA, if and only if you're deploying the
- * generic DMA engine
- * @dma_rx_param: parameter passed to the DMA allocation
- * filter in order to select an appropriate RX channel. If
- * there is a bidirectional RX+TX channel, then just specify
- * this and leave dma_tx_param set to NULL
- * @dma_tx_param: parameter passed to the DMA allocation
- * filter in order to select an appropriate TX channel. If this
- * is NULL the driver will attempt to use the RX channel as a
- * bidirectional channel
*/
struct mmci_platform_data {
- unsigned int f_max;
unsigned int ocr_mask;
int (*ios_handler)(struct device *, struct mmc_ios *);
unsigned int (*status)(struct device *);
int gpio_wp;
int gpio_cd;
bool cd_invert;
- unsigned long capabilities;
- unsigned long capabilities2;
- u32 sigdir;
- bool (*dma_filter)(struct dma_chan *chan, void *filter_param);
- void *dma_rx_param;
- void *dma_tx_param;
};
#endif
diff --git a/include/linux/amba/xilinx_dma.h b/include/linux/amba/xilinx_dma.h
new file mode 100644
index 000000000000..34b98f276ed0
--- /dev/null
+++ b/include/linux/amba/xilinx_dma.h
@@ -0,0 +1,47 @@
+/*
+ * Xilinx DMA Engine drivers support header file
+ *
+ * Copyright (C) 2010-2014 Xilinx, Inc. All rights reserved.
+ *
+ * This is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __DMA_XILINX_DMA_H
+#define __DMA_XILINX_DMA_H
+
+#include <linux/dma-mapping.h>
+#include <linux/dmaengine.h>
+
+/**
+ * struct xilinx_vdma_config - VDMA Configuration structure
+ * @frm_dly: Frame delay
+ * @gen_lock: Whether in gen-lock mode
+ * @master: Master that it syncs to
+ * @frm_cnt_en: Enable frame count enable
+ * @park: Whether wants to park
+ * @park_frm: Frame to park on
+ * @coalesc: Interrupt coalescing threshold
+ * @delay: Delay counter
+ * @reset: Reset Channel
+ * @ext_fsync: External Frame Sync source
+ */
+struct xilinx_vdma_config {
+ int frm_dly;
+ int gen_lock;
+ int master;
+ int frm_cnt_en;
+ int park;
+ int park_frm;
+ int coalesc;
+ int delay;
+ int reset;
+ int ext_fsync;
+};
+
+int xilinx_vdma_channel_set_config(struct dma_chan *dchan,
+ struct xilinx_vdma_config *cfg);
+
+#endif
diff --git a/include/linux/atomic.h b/include/linux/atomic.h
index 5b08a8540ecf..fef3a809e7cf 100644
--- a/include/linux/atomic.h
+++ b/include/linux/atomic.h
@@ -3,6 +3,42 @@
#define _LINUX_ATOMIC_H
#include <asm/atomic.h>
+/*
+ * Provide __deprecated wrappers for the new interface, avoid flag day changes.
+ * We need the ugly external functions to break header recursion hell.
+ */
+#ifndef smp_mb__before_atomic_inc
+static inline void __deprecated smp_mb__before_atomic_inc(void)
+{
+ extern void __smp_mb__before_atomic(void);
+ __smp_mb__before_atomic();
+}
+#endif
+
+#ifndef smp_mb__after_atomic_inc
+static inline void __deprecated smp_mb__after_atomic_inc(void)
+{
+ extern void __smp_mb__after_atomic(void);
+ __smp_mb__after_atomic();
+}
+#endif
+
+#ifndef smp_mb__before_atomic_dec
+static inline void __deprecated smp_mb__before_atomic_dec(void)
+{
+ extern void __smp_mb__before_atomic(void);
+ __smp_mb__before_atomic();
+}
+#endif
+
+#ifndef smp_mb__after_atomic_dec
+static inline void __deprecated smp_mb__after_atomic_dec(void)
+{
+ extern void __smp_mb__after_atomic(void);
+ __smp_mb__after_atomic();
+}
+#endif
+
/**
* atomic_add_unless - add unless the number is already a given value
* @v: pointer of type atomic_t
diff --git a/include/linux/backlight.h b/include/linux/backlight.h
index 72647429adf6..adb14a8616df 100644
--- a/include/linux/backlight.h
+++ b/include/linux/backlight.h
@@ -40,6 +40,11 @@ enum backlight_type {
BACKLIGHT_TYPE_MAX,
};
+enum backlight_notification {
+ BACKLIGHT_REGISTERED,
+ BACKLIGHT_UNREGISTERED,
+};
+
struct backlight_device;
struct fb_info;
@@ -133,6 +138,8 @@ extern void devm_backlight_device_unregister(struct device *dev,
extern void backlight_force_update(struct backlight_device *bd,
enum backlight_update_reason reason);
extern bool backlight_device_registered(enum backlight_type type);
+extern int backlight_register_notifier(struct notifier_block *nb);
+extern int backlight_unregister_notifier(struct notifier_block *nb);
#define to_backlight_device(obj) container_of(obj, struct backlight_device, dev)
diff --git a/include/linux/bio.h b/include/linux/bio.h
index bba550826921..5a645769f020 100644
--- a/include/linux/bio.h
+++ b/include/linux/bio.h
@@ -333,7 +333,7 @@ static inline struct bio *bio_next_split(struct bio *bio, int sectors,
extern struct bio_set *bioset_create(unsigned int, unsigned int);
extern void bioset_free(struct bio_set *);
-extern mempool_t *biovec_create_pool(struct bio_set *bs, int pool_entries);
+extern mempool_t *biovec_create_pool(int pool_entries);
extern struct bio *bio_alloc_bioset(gfp_t, int, struct bio_set *);
extern void bio_put(struct bio *);
diff --git a/include/linux/bitops.h b/include/linux/bitops.h
index be5fd38bd5a0..cbc5833fb221 100644
--- a/include/linux/bitops.h
+++ b/include/linux/bitops.h
@@ -32,6 +32,26 @@ extern unsigned long __sw_hweight64(__u64 w);
*/
#include <asm/bitops.h>
+/*
+ * Provide __deprecated wrappers for the new interface, avoid flag day changes.
+ * We need the ugly external functions to break header recursion hell.
+ */
+#ifndef smp_mb__before_clear_bit
+static inline void __deprecated smp_mb__before_clear_bit(void)
+{
+ extern void __smp_mb__before_atomic(void);
+ __smp_mb__before_atomic();
+}
+#endif
+
+#ifndef smp_mb__after_clear_bit
+static inline void __deprecated smp_mb__after_clear_bit(void)
+{
+ extern void __smp_mb__after_atomic(void);
+ __smp_mb__after_atomic();
+}
+#endif
+
#define for_each_set_bit(bit, addr, size) \
for ((bit) = find_first_bit((addr), (size)); \
(bit) < (size); \
diff --git a/include/linux/blk-mq.h b/include/linux/blk-mq.h
index 0120451545d8..a002cf191427 100644
--- a/include/linux/blk-mq.h
+++ b/include/linux/blk-mq.h
@@ -8,7 +8,13 @@ struct blk_mq_tags;
struct blk_mq_cpu_notifier {
struct list_head list;
void *data;
- void (*notify)(void *data, unsigned long action, unsigned int cpu);
+ int (*notify)(void *data, unsigned long action, unsigned int cpu);
+};
+
+struct blk_mq_ctxmap {
+ unsigned int map_size;
+ unsigned int bits_per_word;
+ struct blk_align_bitmap *map;
};
struct blk_mq_hw_ctx {
@@ -18,7 +24,11 @@ struct blk_mq_hw_ctx {
} ____cacheline_aligned_in_smp;
unsigned long state; /* BLK_MQ_S_* flags */
- struct delayed_work delayed_work;
+ struct delayed_work run_work;
+ struct delayed_work delay_work;
+ cpumask_var_t cpumask;
+ int next_cpu;
+ int next_cpu_batch;
unsigned long flags; /* BLK_MQ_F_* flags */
@@ -27,13 +37,13 @@ struct blk_mq_hw_ctx {
void *driver_data;
+ struct blk_mq_ctxmap ctx_map;
+
unsigned int nr_ctx;
struct blk_mq_ctx **ctxs;
- unsigned int nr_ctx_map;
- unsigned long *ctx_map;
- struct request **rqs;
- struct list_head page_list;
+ unsigned int wait_index;
+
struct blk_mq_tags *tags;
unsigned long queued;
@@ -41,31 +51,40 @@ struct blk_mq_hw_ctx {
#define BLK_MQ_MAX_DISPATCH_ORDER 10
unsigned long dispatched[BLK_MQ_MAX_DISPATCH_ORDER];
- unsigned int queue_depth;
unsigned int numa_node;
unsigned int cmd_size; /* per-request extra data */
+ atomic_t nr_active;
+
struct blk_mq_cpu_notifier cpu_notifier;
struct kobject kobj;
};
-struct blk_mq_reg {
+struct blk_mq_tag_set {
struct blk_mq_ops *ops;
unsigned int nr_hw_queues;
- unsigned int queue_depth;
+ unsigned int queue_depth; /* max hw supported */
unsigned int reserved_tags;
unsigned int cmd_size; /* per-request extra data */
int numa_node;
unsigned int timeout;
unsigned int flags; /* BLK_MQ_F_* */
+ void *driver_data;
+
+ struct blk_mq_tags **tags;
+
+ struct mutex tag_list_lock;
+ struct list_head tag_list;
};
typedef int (queue_rq_fn)(struct blk_mq_hw_ctx *, struct request *);
typedef struct blk_mq_hw_ctx *(map_queue_fn)(struct request_queue *, const int);
-typedef struct blk_mq_hw_ctx *(alloc_hctx_fn)(struct blk_mq_reg *,unsigned int);
-typedef void (free_hctx_fn)(struct blk_mq_hw_ctx *, unsigned int);
typedef int (init_hctx_fn)(struct blk_mq_hw_ctx *, void *, unsigned int);
typedef void (exit_hctx_fn)(struct blk_mq_hw_ctx *, unsigned int);
+typedef int (init_request_fn)(void *, struct request *, unsigned int,
+ unsigned int, unsigned int);
+typedef void (exit_request_fn)(void *, struct request *, unsigned int,
+ unsigned int);
struct blk_mq_ops {
/*
@@ -86,18 +105,20 @@ struct blk_mq_ops {
softirq_done_fn *complete;
/*
- * Override for hctx allocations (should probably go)
- */
- alloc_hctx_fn *alloc_hctx;
- free_hctx_fn *free_hctx;
-
- /*
* Called when the block layer side of a hardware queue has been
* set up, allowing the driver to allocate/init matching structures.
* Ditto for exit/teardown.
*/
init_hctx_fn *init_hctx;
exit_hctx_fn *exit_hctx;
+
+ /*
+ * Called for every command allocated by the block layer to allow
+ * the driver to set up driver specific data.
+ * Ditto for exit/teardown.
+ */
+ init_request_fn *init_request;
+ exit_request_fn *exit_request;
};
enum {
@@ -107,18 +128,24 @@ enum {
BLK_MQ_F_SHOULD_MERGE = 1 << 0,
BLK_MQ_F_SHOULD_SORT = 1 << 1,
- BLK_MQ_F_SHOULD_IPI = 1 << 2,
+ BLK_MQ_F_TAG_SHARED = 1 << 2,
+ BLK_MQ_F_SG_MERGE = 1 << 3,
+ BLK_MQ_F_SYSFS_UP = 1 << 4,
BLK_MQ_S_STOPPED = 0,
+ BLK_MQ_S_TAG_ACTIVE = 1,
+
+ BLK_MQ_MAX_DEPTH = 10240,
- BLK_MQ_MAX_DEPTH = 2048,
+ BLK_MQ_CPU_WORK_BATCH = 8,
};
-struct request_queue *blk_mq_init_queue(struct blk_mq_reg *, void *);
+struct request_queue *blk_mq_init_queue(struct blk_mq_tag_set *);
int blk_mq_register_disk(struct gendisk *);
void blk_mq_unregister_disk(struct gendisk *);
-int blk_mq_init_commands(struct request_queue *, int (*init)(void *data, struct blk_mq_hw_ctx *, struct request *, unsigned int), void *data);
-void blk_mq_free_commands(struct request_queue *, void (*free)(void *data, struct blk_mq_hw_ctx *, struct request *, unsigned int), void *data);
+
+int blk_mq_alloc_tag_set(struct blk_mq_tag_set *set);
+void blk_mq_free_tag_set(struct blk_mq_tag_set *set);
void blk_mq_flush_plug_list(struct blk_plug *plug, bool from_schedule);
@@ -126,28 +153,28 @@ void blk_mq_insert_request(struct request *, bool, bool, bool);
void blk_mq_run_queues(struct request_queue *q, bool async);
void blk_mq_free_request(struct request *rq);
bool blk_mq_can_queue(struct blk_mq_hw_ctx *);
-struct request *blk_mq_alloc_request(struct request_queue *q, int rw, gfp_t gfp);
-struct request *blk_mq_alloc_reserved_request(struct request_queue *q, int rw, gfp_t gfp);
-struct request *blk_mq_rq_from_tag(struct request_queue *q, unsigned int tag);
+struct request *blk_mq_alloc_request(struct request_queue *q, int rw,
+ gfp_t gfp, bool reserved);
+struct request *blk_mq_tag_to_rq(struct blk_mq_tags *tags, unsigned int tag);
struct blk_mq_hw_ctx *blk_mq_map_queue(struct request_queue *, const int ctx_index);
-struct blk_mq_hw_ctx *blk_mq_alloc_single_hw_queue(struct blk_mq_reg *, unsigned int);
-void blk_mq_free_single_hw_queue(struct blk_mq_hw_ctx *, unsigned int);
+struct blk_mq_hw_ctx *blk_mq_alloc_single_hw_queue(struct blk_mq_tag_set *, unsigned int, int);
-bool blk_mq_end_io_partial(struct request *rq, int error,
- unsigned int nr_bytes);
-static inline void blk_mq_end_io(struct request *rq, int error)
-{
- bool done = !blk_mq_end_io_partial(rq, error, blk_rq_bytes(rq));
- BUG_ON(!done);
-}
+void blk_mq_end_io(struct request *rq, int error);
+void __blk_mq_end_io(struct request *rq, int error);
+void blk_mq_requeue_request(struct request *rq);
+void blk_mq_add_to_requeue_list(struct request *rq, bool at_head);
+void blk_mq_kick_requeue_list(struct request_queue *q);
void blk_mq_complete_request(struct request *rq);
void blk_mq_stop_hw_queue(struct blk_mq_hw_ctx *hctx);
void blk_mq_start_hw_queue(struct blk_mq_hw_ctx *hctx);
void blk_mq_stop_hw_queues(struct request_queue *q);
-void blk_mq_start_stopped_hw_queues(struct request_queue *q);
+void blk_mq_start_hw_queues(struct request_queue *q);
+void blk_mq_start_stopped_hw_queues(struct request_queue *q, bool async);
+void blk_mq_delay_queue(struct blk_mq_hw_ctx *hctx, unsigned long msecs);
+void blk_mq_tag_busy_iter(struct blk_mq_tags *tags, void (*fn)(void *data, unsigned long *), void *data);
/*
* Driver command data is immediately after the request. So subtract request
@@ -162,12 +189,6 @@ static inline void *blk_mq_rq_to_pdu(struct request *rq)
return (void *) rq + sizeof(*rq);
}
-static inline struct request *blk_mq_tag_to_rq(struct blk_mq_hw_ctx *hctx,
- unsigned int tag)
-{
- return hctx->rqs[tag];
-}
-
#define queue_for_each_hw_ctx(q, hctx, i) \
for ((i) = 0; (i) < (q)->nr_hw_queues && \
({ hctx = (q)->queue_hw_ctx[i]; 1; }); (i)++)
diff --git a/include/linux/blk_types.h b/include/linux/blk_types.h
index aa0eaa2d0bd8..66c2167f04a9 100644
--- a/include/linux/blk_types.h
+++ b/include/linux/blk_types.h
@@ -5,8 +5,6 @@
#ifndef __LINUX_BLK_TYPES_H
#define __LINUX_BLK_TYPES_H
-#ifdef CONFIG_BLOCK
-
#include <linux/types.h>
struct bio_set;
@@ -28,6 +26,8 @@ struct bio_vec {
unsigned int bv_offset;
};
+#ifdef CONFIG_BLOCK
+
struct bvec_iter {
sector_t bi_sector; /* device address in 512 byte
sectors */
@@ -190,6 +190,7 @@ enum rq_flag_bits {
__REQ_PM, /* runtime pm request */
__REQ_END, /* last of chain of requests */
__REQ_HASHED, /* on IO scheduler merge hash */
+ __REQ_MQ_INFLIGHT, /* track inflight for MQ */
__REQ_NR_BITS, /* stops here */
};
@@ -243,5 +244,6 @@ enum rq_flag_bits {
#define REQ_PM (1ULL << __REQ_PM)
#define REQ_END (1ULL << __REQ_END)
#define REQ_HASHED (1ULL << __REQ_HASHED)
+#define REQ_MQ_INFLIGHT (1ULL << __REQ_MQ_INFLIGHT)
#endif /* __LINUX_BLK_TYPES_H */
diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h
index 0d84981ee03f..31e11051f1ba 100644
--- a/include/linux/blkdev.h
+++ b/include/linux/blkdev.h
@@ -90,15 +90,15 @@ enum rq_cmd_type_bits {
#define BLK_MAX_CDB 16
/*
- * try to put the fields that are referenced together in the same cacheline.
- * if you modify this structure, be sure to check block/blk-core.c:blk_rq_init()
- * as well!
+ * Try to put the fields that are referenced together in the same cacheline.
+ *
+ * If you modify this structure, make sure to update blk_rq_init() and
+ * especially blk_mq_rq_ctx_init() to take care of the added fields.
*/
struct request {
struct list_head queuelist;
union {
struct call_single_data csd;
- struct work_struct mq_flush_work;
unsigned long fifo_time;
};
@@ -178,7 +178,6 @@ struct request {
unsigned short ioprio;
void *special; /* opaque pointer available for LLD use */
- char *buffer; /* kaddr of the current segment if available */
int tag;
int errors;
@@ -281,6 +280,7 @@ struct queue_limits {
unsigned long seg_boundary_mask;
unsigned int max_hw_sectors;
+ unsigned int chunk_sectors;
unsigned int max_sectors;
unsigned int max_segment_size;
unsigned int physical_block_size;
@@ -336,7 +336,7 @@ struct request_queue {
unsigned int *mq_map;
/* sw queues */
- struct blk_mq_ctx *queue_ctx;
+ struct blk_mq_ctx __percpu *queue_ctx;
unsigned int nr_queues;
/* hw dispatch queues */
@@ -463,6 +463,10 @@ struct request_queue {
struct request *flush_rq;
spinlock_t mq_flush_lock;
+ struct list_head requeue_list;
+ spinlock_t requeue_lock;
+ struct work_struct requeue_work;
+
struct mutex sysfs_lock;
int bypass_depth;
@@ -481,6 +485,9 @@ struct request_queue {
wait_queue_head_t mq_freeze_wq;
struct percpu_counter mq_usage_counter;
struct list_head all_q_node;
+
+ struct blk_mq_tag_set *tag_set;
+ struct list_head tag_set_list;
};
#define QUEUE_FLAG_QUEUED 1 /* uses generic tag queueing */
@@ -504,6 +511,7 @@ struct request_queue {
#define QUEUE_FLAG_SAME_FORCE 18 /* force complete on same CPU */
#define QUEUE_FLAG_DEAD 19 /* queue tear-down finished */
#define QUEUE_FLAG_INIT_DONE 20 /* queue is initialized */
+#define QUEUE_FLAG_NO_SG_MERGE 21 /* don't attempt to merge SG segments*/
#define QUEUE_FLAG_DEFAULT ((1 << QUEUE_FLAG_IO_STAT) | \
(1 << QUEUE_FLAG_STACKABLE) | \
@@ -613,6 +621,15 @@ static inline void queue_flag_clear(unsigned int flag, struct request_queue *q)
#define rq_data_dir(rq) (((rq)->cmd_flags & 1) != 0)
+/*
+ * Driver can handle struct request, if it either has an old style
+ * request_fn defined, or is blk-mq based.
+ */
+static inline bool queue_is_rq_based(struct request_queue *q)
+{
+ return q->request_fn || q->mq_ops;
+}
+
static inline unsigned int blk_queue_cluster(struct request_queue *q)
{
return q->limits.cluster;
@@ -779,6 +796,7 @@ extern void __blk_put_request(struct request_queue *, struct request *);
extern struct request *blk_get_request(struct request_queue *, int, gfp_t);
extern struct request *blk_make_request(struct request_queue *, struct bio *,
gfp_t);
+extern void blk_rq_set_block_pc(struct request *);
extern void blk_requeue_request(struct request_queue *, struct request *);
extern void blk_add_request_payload(struct request *rq, struct page *page,
unsigned int len);
@@ -894,6 +912,20 @@ static inline unsigned int blk_queue_get_max_sectors(struct request_queue *q,
return q->limits.max_sectors;
}
+/*
+ * Return maximum size of a request at given offset. Only valid for
+ * file system requests.
+ */
+static inline unsigned int blk_max_size_offset(struct request_queue *q,
+ sector_t offset)
+{
+ if (!q->limits.chunk_sectors)
+ return q->limits.max_hw_sectors;
+
+ return q->limits.chunk_sectors -
+ (offset & (q->limits.chunk_sectors - 1));
+}
+
static inline unsigned int blk_rq_get_max_sectors(struct request *rq)
{
struct request_queue *q = rq->q;
@@ -901,7 +933,11 @@ static inline unsigned int blk_rq_get_max_sectors(struct request *rq)
if (unlikely(rq->cmd_type == REQ_TYPE_BLOCK_PC))
return q->limits.max_hw_sectors;
- return blk_queue_get_max_sectors(q, rq->cmd_flags);
+ if (!q->limits.chunk_sectors)
+ return blk_queue_get_max_sectors(q, rq->cmd_flags);
+
+ return min(blk_max_size_offset(q, blk_rq_pos(rq)),
+ blk_queue_get_max_sectors(q, rq->cmd_flags));
}
static inline unsigned int blk_rq_count_bios(struct request *rq)
@@ -937,6 +973,7 @@ extern struct request *blk_fetch_request(struct request_queue *q);
*/
extern bool blk_update_request(struct request *rq, int error,
unsigned int nr_bytes);
+extern void blk_finish_request(struct request *rq, int error);
extern bool blk_end_request(struct request *rq, int error,
unsigned int nr_bytes);
extern void blk_end_request_all(struct request *rq, int error);
@@ -966,6 +1003,7 @@ extern void blk_queue_make_request(struct request_queue *, make_request_fn *);
extern void blk_queue_bounce_limit(struct request_queue *, u64);
extern void blk_limits_max_hw_sectors(struct queue_limits *, unsigned int);
extern void blk_queue_max_hw_sectors(struct request_queue *, unsigned int);
+extern void blk_queue_chunk_sectors(struct request_queue *, unsigned int);
extern void blk_queue_max_segments(struct request_queue *, unsigned short);
extern void blk_queue_max_segment_size(struct request_queue *, unsigned int);
extern void blk_queue_max_discard_sectors(struct request_queue *q,
@@ -1053,7 +1091,6 @@ static inline void blk_post_runtime_resume(struct request_queue *q, int err) {}
* schedule() where blk_schedule_flush_plug() is called.
*/
struct blk_plug {
- unsigned long magic; /* detect uninitialized use-cases */
struct list_head list; /* requests */
struct list_head mq_list; /* blk-mq requests */
struct list_head cb_list; /* md requires an unplug callback */
@@ -1102,7 +1139,8 @@ static inline bool blk_needs_flush_plug(struct task_struct *tsk)
/*
* tag stuff
*/
-#define blk_rq_tagged(rq) ((rq)->cmd_flags & REQ_QUEUED)
+#define blk_rq_tagged(rq) \
+ ((rq)->mq_ctx || ((rq)->cmd_flags & REQ_QUEUED))
extern int blk_queue_start_tag(struct request_queue *, struct request *);
extern struct request *blk_queue_find_tag(struct request_queue *, int);
extern void blk_queue_end_tag(struct request_queue *, struct request *);
@@ -1370,8 +1408,9 @@ static inline void put_dev_sector(Sector p)
}
struct work_struct;
-int kblockd_schedule_work(struct request_queue *q, struct work_struct *work);
-int kblockd_schedule_delayed_work(struct request_queue *q, struct delayed_work *dwork, unsigned long delay);
+int kblockd_schedule_work(struct work_struct *work);
+int kblockd_schedule_delayed_work(struct delayed_work *dwork, unsigned long delay);
+int kblockd_schedule_delayed_work_on(int cpu, struct delayed_work *dwork, unsigned long delay);
#ifdef CONFIG_BLK_CGROUP
/*
@@ -1570,6 +1609,7 @@ static inline bool blk_integrity_is_initialized(struct gendisk *g)
struct block_device_operations {
int (*open) (struct block_device *, fmode_t);
void (*release) (struct gendisk *, fmode_t);
+ int (*rw_page)(struct block_device *, sector_t, struct page *, int rw);
int (*ioctl) (struct block_device *, fmode_t, unsigned, unsigned long);
int (*compat_ioctl) (struct block_device *, fmode_t, unsigned, unsigned long);
int (*direct_access) (struct block_device *, sector_t,
@@ -1588,7 +1628,13 @@ struct block_device_operations {
extern int __blkdev_driver_ioctl(struct block_device *, fmode_t, unsigned int,
unsigned long);
+extern int bdev_read_page(struct block_device *, sector_t, struct page *);
+extern int bdev_write_page(struct block_device *, sector_t, struct page *,
+ struct writeback_control *);
#else /* CONFIG_BLOCK */
+
+struct block_device;
+
/*
* stubs for when the block layer is configured out
*/
@@ -1624,6 +1670,12 @@ static inline bool blk_needs_flush_plug(struct task_struct *tsk)
return false;
}
+static inline int blkdev_issue_flush(struct block_device *bdev, gfp_t gfp_mask,
+ sector_t *error_sector)
+{
+ return 0;
+}
+
#endif /* CONFIG_BLOCK */
#endif
diff --git a/include/linux/bootmem.h b/include/linux/bootmem.h
index db51fe4fe317..4e2bd4c95b66 100644
--- a/include/linux/bootmem.h
+++ b/include/linux/bootmem.h
@@ -58,9 +58,9 @@ extern void free_bootmem_late(unsigned long physaddr, unsigned long size);
* Flags for reserve_bootmem (also if CONFIG_HAVE_ARCH_BOOTMEM_NODE,
* the architecture-specific code should honor this).
*
- * If flags is 0, then the return value is always 0 (success). If
- * flags contains BOOTMEM_EXCLUSIVE, then -EBUSY is returned if the
- * memory already was reserved.
+ * If flags is BOOTMEM_DEFAULT, then the return value is always 0 (success).
+ * If flags contains BOOTMEM_EXCLUSIVE, then -EBUSY is returned if the memory
+ * already was reserved.
*/
#define BOOTMEM_DEFAULT 0
#define BOOTMEM_EXCLUSIVE (1<<0)
diff --git a/include/linux/buffer_head.h b/include/linux/buffer_head.h
index c40302f909ce..324329ceea1e 100644
--- a/include/linux/buffer_head.h
+++ b/include/linux/buffer_head.h
@@ -207,8 +207,6 @@ void block_invalidatepage(struct page *page, unsigned int offset,
unsigned int length);
int block_write_full_page(struct page *page, get_block_t *get_block,
struct writeback_control *wbc);
-int block_write_full_page_endio(struct page *page, get_block_t *get_block,
- struct writeback_control *wbc, bh_end_io_t *handler);
int block_read_full_page(struct page*, get_block_t*);
int block_is_partially_uptodate(struct page *page, unsigned long from,
unsigned long count);
@@ -278,7 +276,7 @@ static inline void get_bh(struct buffer_head *bh)
static inline void put_bh(struct buffer_head *bh)
{
- smp_mb__before_atomic_dec();
+ smp_mb__before_atomic();
atomic_dec(&bh->b_count);
}
diff --git a/include/linux/capability.h b/include/linux/capability.h
index a6ee1f9a5018..84b13ad67c1c 100644
--- a/include/linux/capability.h
+++ b/include/linux/capability.h
@@ -210,7 +210,7 @@ extern bool has_ns_capability_noaudit(struct task_struct *t,
struct user_namespace *ns, int cap);
extern bool capable(int cap);
extern bool ns_capable(struct user_namespace *ns, int cap);
-extern bool inode_capable(const struct inode *inode, int cap);
+extern bool capable_wrt_inode_uidgid(const struct inode *inode, int cap);
extern bool file_ns_capable(const struct file *file, struct user_namespace *ns, int cap);
/* audit system wants to get cap info from files as well */
diff --git a/include/linux/ceph/libceph.h b/include/linux/ceph/libceph.h
index 2f49aa4c4f7f..279b0afac1c1 100644
--- a/include/linux/ceph/libceph.h
+++ b/include/linux/ceph/libceph.h
@@ -222,8 +222,6 @@ extern void ceph_copy_to_page_vector(struct page **pages,
extern void ceph_copy_from_page_vector(struct page **pages,
void *data,
loff_t off, size_t len);
-extern int ceph_copy_page_vector_to_user(struct page **pages, void __user *data,
- loff_t off, size_t len);
extern void ceph_zero_page_vector_range(int off, int len, struct page **pages);
diff --git a/include/linux/cgroup.h b/include/linux/cgroup.h
index c2515851c1aa..8a111dd42d7a 100644
--- a/include/linux/cgroup.h
+++ b/include/linux/cgroup.h
@@ -21,6 +21,7 @@
#include <linux/percpu-refcount.h>
#include <linux/seq_file.h>
#include <linux/kernfs.h>
+#include <linux/wait.h>
#ifdef CONFIG_CGROUPS
@@ -47,21 +48,45 @@ enum cgroup_subsys_id {
};
#undef SUBSYS
-/* Per-subsystem/per-cgroup state maintained by the system. */
+/*
+ * Per-subsystem/per-cgroup state maintained by the system. This is the
+ * fundamental structural building block that controllers deal with.
+ *
+ * Fields marked with "PI:" are public and immutable and may be accessed
+ * directly without synchronization.
+ */
struct cgroup_subsys_state {
- /* the cgroup that this css is attached to */
+ /* PI: the cgroup that this css is attached to */
struct cgroup *cgroup;
- /* the cgroup subsystem that this css is attached to */
+ /* PI: the cgroup subsystem that this css is attached to */
struct cgroup_subsys *ss;
/* reference count - access via css_[try]get() and css_put() */
struct percpu_ref refcnt;
- /* the parent css */
+ /* PI: the parent css */
struct cgroup_subsys_state *parent;
- unsigned long flags;
+ /* siblings list anchored at the parent's ->children */
+ struct list_head sibling;
+ struct list_head children;
+
+ /*
+ * PI: Subsys-unique ID. 0 is unused and root is always 1. The
+ * matching css can be looked up using css_from_id().
+ */
+ int id;
+
+ unsigned int flags;
+
+ /*
+ * Monotonically increasing unique serial number which defines a
+ * uniform order among all csses. It's guaranteed that all
+ * ->children lists are in the ascending order of ->serial_nr and
+ * used to allow interrupting and resuming iterations.
+ */
+ u64 serial_nr;
/* percpu_ref killing and RCU release */
struct rcu_head rcu_head;
@@ -70,8 +95,9 @@ struct cgroup_subsys_state {
/* bits in struct cgroup_subsys_state flags field */
enum {
- CSS_ROOT = (1 << 0), /* this CSS is the root of the subsystem */
+ CSS_NO_REF = (1 << 0), /* no reference counting for this css */
CSS_ONLINE = (1 << 1), /* between ->css_online() and ->css_offline() */
+ CSS_RELEASED = (1 << 2), /* refcnt reached zero, released */
};
/**
@@ -82,8 +108,7 @@ enum {
*/
static inline void css_get(struct cgroup_subsys_state *css)
{
- /* We don't need to reference count the root state */
- if (!(css->flags & CSS_ROOT))
+ if (!(css->flags & CSS_NO_REF))
percpu_ref_get(&css->refcnt);
}
@@ -91,35 +116,51 @@ static inline void css_get(struct cgroup_subsys_state *css)
* css_tryget - try to obtain a reference on the specified css
* @css: target css
*
- * Obtain a reference on @css if it's alive. The caller naturally needs to
- * ensure that @css is accessible but doesn't have to be holding a
+ * Obtain a reference on @css unless it already has reached zero and is
+ * being released. This function doesn't care whether @css is on or
+ * offline. The caller naturally needs to ensure that @css is accessible
+ * but doesn't have to be holding a reference on it - IOW, RCU protected
+ * access is good enough for this function. Returns %true if a reference
+ * count was successfully obtained; %false otherwise.
+ */
+static inline bool css_tryget(struct cgroup_subsys_state *css)
+{
+ if (!(css->flags & CSS_NO_REF))
+ return percpu_ref_tryget(&css->refcnt);
+ return true;
+}
+
+/**
+ * css_tryget_online - try to obtain a reference on the specified css if online
+ * @css: target css
+ *
+ * Obtain a reference on @css if it's online. The caller naturally needs
+ * to ensure that @css is accessible but doesn't have to be holding a
* reference on it - IOW, RCU protected access is good enough for this
* function. Returns %true if a reference count was successfully obtained;
* %false otherwise.
*/
-static inline bool css_tryget(struct cgroup_subsys_state *css)
+static inline bool css_tryget_online(struct cgroup_subsys_state *css)
{
- if (css->flags & CSS_ROOT)
- return true;
- return percpu_ref_tryget(&css->refcnt);
+ if (!(css->flags & CSS_NO_REF))
+ return percpu_ref_tryget_live(&css->refcnt);
+ return true;
}
/**
* css_put - put a css reference
* @css: target css
*
- * Put a reference obtained via css_get() and css_tryget().
+ * Put a reference obtained via css_get() and css_tryget_online().
*/
static inline void css_put(struct cgroup_subsys_state *css)
{
- if (!(css->flags & CSS_ROOT))
+ if (!(css->flags & CSS_NO_REF))
percpu_ref_put(&css->refcnt);
}
/* bits in struct cgroup flags field */
enum {
- /* Control Group is dead */
- CGRP_DEAD,
/*
* Control Group has previously had a child cgroup or a task,
* but no longer (only if CGRP_NOTIFY_ON_RELEASE is set)
@@ -133,48 +174,37 @@ enum {
* specified at mount time and thus is implemented here.
*/
CGRP_CPUSET_CLONE_CHILDREN,
- /* see the comment above CGRP_ROOT_SANE_BEHAVIOR for details */
- CGRP_SANE_BEHAVIOR,
};
struct cgroup {
+ /* self css with NULL ->ss, points back to this cgroup */
+ struct cgroup_subsys_state self;
+
unsigned long flags; /* "unsigned long" so bitops work */
/*
* idr allocated in-hierarchy ID.
*
- * The ID of the root cgroup is always 0, and a new cgroup
- * will be assigned with a smallest available ID.
+ * ID 0 is not used, the ID of the root cgroup is always 1, and a
+ * new cgroup will be assigned with a smallest available ID.
*
* Allocating/Removing ID must be protected by cgroup_mutex.
*/
int id;
- /* the number of attached css's */
- int nr_css;
-
- atomic_t refcnt;
-
/*
- * We link our 'sibling' struct into our parent's 'children'.
- * Our children link their 'sibling' into our 'children'.
+ * If this cgroup contains any tasks, it contributes one to
+ * populated_cnt. All children with non-zero popuplated_cnt of
+ * their own contribute one. The count is zero iff there's no task
+ * in this cgroup or its subtree.
*/
- struct list_head sibling; /* my parent's children */
- struct list_head children; /* my children */
+ int populated_cnt;
- struct cgroup *parent; /* my parent */
struct kernfs_node *kn; /* cgroup kernfs entry */
+ struct kernfs_node *populated_kn; /* kn for "cgroup.subtree_populated" */
- /*
- * Monotonically increasing unique serial number which defines a
- * uniform order among all cgroups. It's guaranteed that all
- * ->children lists are in the ascending order of ->serial_nr.
- * It's used to allow interrupting and resuming iterations.
- */
- u64 serial_nr;
-
- /* The bitmask of subsystems attached to this cgroup */
- unsigned long subsys_mask;
+ /* the bitmask of subsystems enabled on the child cgroups */
+ unsigned int child_subsys_mask;
/* Private pointers for each registered subsystem */
struct cgroup_subsys_state __rcu *subsys[CGROUP_SUBSYS_COUNT];
@@ -188,6 +218,15 @@ struct cgroup {
struct list_head cset_links;
/*
+ * On the default hierarchy, a css_set for a cgroup with some
+ * susbsys disabled will point to css's which are associated with
+ * the closest ancestor which has the subsys enabled. The
+ * following lists all css_sets which point to this cgroup's css
+ * for the given subsystem.
+ */
+ struct list_head e_csets[CGROUP_SUBSYS_COUNT];
+
+ /*
* Linked list running through all cgroups that can
* potentially be reaped by the release agent. Protected by
* release_list_lock
@@ -201,12 +240,8 @@ struct cgroup {
struct list_head pidlists;
struct mutex pidlist_mutex;
- /* dummy css with NULL ->ss, points back to this cgroup */
- struct cgroup_subsys_state dummy_css;
-
- /* For css percpu_ref killing and RCU-protected deletion */
- struct rcu_head rcu_head;
- struct work_struct destroy_work;
+ /* used to wait for offlining of csses */
+ wait_queue_head_t offline_waitq;
};
#define MAX_CGROUP_ROOT_NAMELEN 64
@@ -250,6 +285,12 @@ enum {
*
* - "cgroup.clone_children" is removed.
*
+ * - "cgroup.subtree_populated" is available. Its value is 0 if
+ * the cgroup and its descendants contain no task; otherwise, 1.
+ * The file also generates kernfs notification which can be
+ * monitored through poll and [di]notify when the value of the
+ * file changes.
+ *
* - If mount is requested with sane_behavior but without any
* subsystem, the default unified hierarchy is mounted.
*
@@ -264,6 +305,8 @@ enum {
* the flag is not created.
*
* - blkcg: blk-throttle becomes properly hierarchical.
+ *
+ * - debug: disallowed on the default hierarchy.
*/
CGRP_ROOT_SANE_BEHAVIOR = (1 << 0),
@@ -282,6 +325,9 @@ enum {
struct cgroup_root {
struct kernfs_root *kf_root;
+ /* The bitmask of subsystems attached to this hierarchy */
+ unsigned int subsys_mask;
+
/* Unique id for this hierarchy. */
int hierarchy_id;
@@ -295,7 +341,7 @@ struct cgroup_root {
struct list_head root_list;
/* Hierarchy-specific flags */
- unsigned long flags;
+ unsigned int flags;
/* IDs for cgroups in this hierarchy */
struct idr cgroup_idr;
@@ -342,6 +388,9 @@ struct css_set {
*/
struct list_head cgrp_links;
+ /* the default cgroup associated with this css_set */
+ struct cgroup *dfl_cgrp;
+
/*
* Set of subsystem states, one for each subsystem. This array is
* immutable after creation apart from the init_css_set during
@@ -366,6 +415,15 @@ struct css_set {
struct cgroup *mg_src_cgrp;
struct css_set *mg_dst_cset;
+ /*
+ * On the default hierarhcy, ->subsys[ssid] may point to a css
+ * attached to an ancestor instead of the cgroup this css_set is
+ * associated with. The following node is anchored at
+ * ->subsys[ssid]->cgroup->e_csets[ssid] and provides a way to
+ * iterate through all css's attached to a given cgroup.
+ */
+ struct list_head e_cset_node[CGROUP_SUBSYS_COUNT];
+
/* For RCU-protected deletion */
struct rcu_head rcu_head;
};
@@ -405,8 +463,7 @@ struct cftype {
/*
* The maximum length of string, excluding trailing nul, that can
- * be passed to write_string. If < PAGE_SIZE-1, PAGE_SIZE-1 is
- * assumed.
+ * be passed to write. If < PAGE_SIZE-1, PAGE_SIZE-1 is assumed.
*/
size_t max_write_len;
@@ -453,19 +510,13 @@ struct cftype {
s64 val);
/*
- * write_string() is passed a nul-terminated kernelspace
- * buffer of maximum length determined by max_write_len.
- * Returns 0 or -ve error code.
+ * write() is the generic write callback which maps directly to
+ * kernfs write operation and overrides all other operations.
+ * Maximum write size is determined by ->max_write_len. Use
+ * of_css/cft() to access the associated css and cft.
*/
- int (*write_string)(struct cgroup_subsys_state *css, struct cftype *cft,
- char *buffer);
- /*
- * trigger() callback can be used to get some kick from the
- * userspace, when the actual string written is not important
- * at all. The private field can be used to determine the
- * kick type for multiplexing.
- */
- int (*trigger)(struct cgroup_subsys_state *css, unsigned int event);
+ ssize_t (*write)(struct kernfs_open_file *of,
+ char *buf, size_t nbytes, loff_t off);
#ifdef CONFIG_DEBUG_LOCK_ALLOC
struct lock_class_key lockdep_key;
@@ -473,6 +524,7 @@ struct cftype {
};
extern struct cgroup_root cgrp_dfl_root;
+extern struct css_set init_css_set;
static inline bool cgroup_on_dfl(const struct cgroup *cgrp)
{
@@ -503,14 +555,24 @@ static inline ino_t cgroup_ino(struct cgroup *cgrp)
return 0;
}
-static inline struct cftype *seq_cft(struct seq_file *seq)
+/* cft/css accessors for cftype->write() operation */
+static inline struct cftype *of_cft(struct kernfs_open_file *of)
{
- struct kernfs_open_file *of = seq->private;
-
return of->kn->priv;
}
-struct cgroup_subsys_state *seq_css(struct seq_file *seq);
+struct cgroup_subsys_state *of_css(struct kernfs_open_file *of);
+
+/* cft/css accessors for cftype->seq_*() operations */
+static inline struct cftype *seq_cft(struct seq_file *seq)
+{
+ return of_cft(seq->private);
+}
+
+static inline struct cgroup_subsys_state *seq_css(struct seq_file *seq)
+{
+ return of_css(seq->private);
+}
/*
* Name / path handling functions. All are thin wrappers around the kernfs
@@ -611,6 +673,9 @@ struct cgroup_subsys {
/* link to parent, protected by cgroup_lock() */
struct cgroup_root *root;
+ /* idr for css->id */
+ struct idr css_idr;
+
/*
* List of cftypes. Each entry is the first entry of an array
* terminated by zero length name.
@@ -626,19 +691,6 @@ struct cgroup_subsys {
#undef SUBSYS
/**
- * css_parent - find the parent css
- * @css: the target cgroup_subsys_state
- *
- * Return the parent css of @css. This function is guaranteed to return
- * non-NULL parent as long as @css isn't the root.
- */
-static inline
-struct cgroup_subsys_state *css_parent(struct cgroup_subsys_state *css)
-{
- return css->parent;
-}
-
-/**
* task_css_set_check - obtain a task's css_set with extra access conditions
* @task: the task to obtain css_set for
* @__c: extra condition expression to be passed to rcu_dereference_check()
@@ -700,6 +752,20 @@ static inline struct cgroup_subsys_state *task_css(struct task_struct *task,
return task_css_check(task, subsys_id, false);
}
+/**
+ * task_css_is_root - test whether a task belongs to the root css
+ * @task: the target task
+ * @subsys_id: the target subsystem ID
+ *
+ * Test whether @task belongs to the root css on the specified subsystem.
+ * May be invoked in any context.
+ */
+static inline bool task_css_is_root(struct task_struct *task, int subsys_id)
+{
+ return task_css_check(task, subsys_id, true) ==
+ init_css_set.subsys[subsys_id];
+}
+
static inline struct cgroup *task_cgroup(struct task_struct *task,
int subsys_id)
{
@@ -716,14 +782,14 @@ struct cgroup_subsys_state *css_from_id(int id, struct cgroup_subsys *ss);
* @pos: the css * to use as the loop cursor
* @parent: css whose children to walk
*
- * Walk @parent's children. Must be called under rcu_read_lock(). A child
- * css which hasn't finished ->css_online() or already has finished
- * ->css_offline() may show up during traversal and it's each subsystem's
- * responsibility to verify that each @pos is alive.
+ * Walk @parent's children. Must be called under rcu_read_lock().
*
- * If a subsystem synchronizes against the parent in its ->css_online() and
- * before starting iterating, a css which finished ->css_online() is
- * guaranteed to be visible in the future iterations.
+ * If a subsystem synchronizes ->css_online() and the start of iteration, a
+ * css which finished ->css_online() is guaranteed to be visible in the
+ * future iterations and will stay visible until the last reference is put.
+ * A css which hasn't finished ->css_online() or already finished
+ * ->css_offline() may show up during traversal. It's each subsystem's
+ * responsibility to synchronize against on/offlining.
*
* It is allowed to temporarily drop RCU read lock during iteration. The
* caller is responsible for ensuring that @pos remains accessible until
@@ -746,17 +812,16 @@ css_rightmost_descendant(struct cgroup_subsys_state *pos);
* @root: css whose descendants to walk
*
* Walk @root's descendants. @root is included in the iteration and the
- * first node to be visited. Must be called under rcu_read_lock(). A
- * descendant css which hasn't finished ->css_online() or already has
- * finished ->css_offline() may show up during traversal and it's each
- * subsystem's responsibility to verify that each @pos is alive.
+ * first node to be visited. Must be called under rcu_read_lock().
*
- * If a subsystem synchronizes against the parent in its ->css_online() and
- * before starting iterating, and synchronizes against @pos on each
- * iteration, any descendant css which finished ->css_online() is
- * guaranteed to be visible in the future iterations.
+ * If a subsystem synchronizes ->css_online() and the start of iteration, a
+ * css which finished ->css_online() is guaranteed to be visible in the
+ * future iterations and will stay visible until the last reference is put.
+ * A css which hasn't finished ->css_online() or already finished
+ * ->css_offline() may show up during traversal. It's each subsystem's
+ * responsibility to synchronize against on/offlining.
*
- * In other words, the following guarantees that a descendant can't escape
+ * For example, the following guarantees that a descendant can't escape
* state updates of its ancestors.
*
* my_online(@css)
@@ -812,18 +877,34 @@ css_next_descendant_post(struct cgroup_subsys_state *pos,
*
* Similar to css_for_each_descendant_pre() but performs post-order
* traversal instead. @root is included in the iteration and the last
- * node to be visited. Note that the walk visibility guarantee described
- * in pre-order walk doesn't apply the same to post-order walks.
+ * node to be visited.
+ *
+ * If a subsystem synchronizes ->css_online() and the start of iteration, a
+ * css which finished ->css_online() is guaranteed to be visible in the
+ * future iterations and will stay visible until the last reference is put.
+ * A css which hasn't finished ->css_online() or already finished
+ * ->css_offline() may show up during traversal. It's each subsystem's
+ * responsibility to synchronize against on/offlining.
+ *
+ * Note that the walk visibility guarantee example described in pre-order
+ * walk doesn't apply the same to post-order walks.
*/
#define css_for_each_descendant_post(pos, css) \
for ((pos) = css_next_descendant_post(NULL, (css)); (pos); \
(pos) = css_next_descendant_post((pos), (css)))
+bool css_has_online_children(struct cgroup_subsys_state *css);
+
/* A css_task_iter should be treated as an opaque object */
struct css_task_iter {
- struct cgroup_subsys_state *origin_css;
- struct list_head *cset_link;
- struct list_head *task;
+ struct cgroup_subsys *ss;
+
+ struct list_head *cset_pos;
+ struct list_head *cset_head;
+
+ struct list_head *task_pos;
+ struct list_head *tasks_head;
+ struct list_head *mg_tasks_head;
};
void css_task_iter_start(struct cgroup_subsys_state *css,
@@ -834,8 +915,8 @@ void css_task_iter_end(struct css_task_iter *it);
int cgroup_attach_task_all(struct task_struct *from, struct task_struct *);
int cgroup_transfer_tasks(struct cgroup *to, struct cgroup *from);
-struct cgroup_subsys_state *css_tryget_from_dir(struct dentry *dentry,
- struct cgroup_subsys *ss);
+struct cgroup_subsys_state *css_tryget_online_from_dir(struct dentry *dentry,
+ struct cgroup_subsys *ss);
#else /* !CONFIG_CGROUPS */
diff --git a/include/linux/cgroup_subsys.h b/include/linux/cgroup_subsys.h
index 768fe44e19f0..98c4f9b12b03 100644
--- a/include/linux/cgroup_subsys.h
+++ b/include/linux/cgroup_subsys.h
@@ -7,10 +7,6 @@
SUBSYS(cpuset)
#endif
-#if IS_ENABLED(CONFIG_CGROUP_DEBUG)
-SUBSYS(debug)
-#endif
-
#if IS_ENABLED(CONFIG_CGROUP_SCHED)
SUBSYS(cpu)
#endif
@@ -50,6 +46,13 @@ SUBSYS(net_prio)
#if IS_ENABLED(CONFIG_CGROUP_HUGETLB)
SUBSYS(hugetlb)
#endif
+
+/*
+ * The following subsystems are not supported on the default hierarchy.
+ */
+#if IS_ENABLED(CONFIG_CGROUP_DEBUG)
+SUBSYS(debug)
+#endif
/*
* DO NOT ADD ANY SUBSYSTEM WITHOUT EXPLICIT ACKS FROM CGROUP MAINTAINERS.
*/
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 511917416fb0..0c287dbbb144 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -40,14 +40,14 @@ struct dentry;
* through the clk_* api.
*
* @prepare: Prepare the clock for enabling. This must not return until
- * the clock is fully prepared, and it's safe to call clk_enable.
- * This callback is intended to allow clock implementations to
- * do any initialisation that may sleep. Called with
- * prepare_lock held.
+ * the clock is fully prepared, and it's safe to call clk_enable.
+ * This callback is intended to allow clock implementations to
+ * do any initialisation that may sleep. Called with
+ * prepare_lock held.
*
* @unprepare: Release the clock from its prepared state. This will typically
- * undo any work done in the @prepare callback. Called with
- * prepare_lock held.
+ * undo any work done in the @prepare callback. Called with
+ * prepare_lock held.
*
* @is_prepared: Queries the hardware to determine if the clock is prepared.
* This function is allowed to sleep. Optional, if this op is not
@@ -58,16 +58,16 @@ struct dentry;
* Called with prepare mutex held. This function may sleep.
*
* @enable: Enable the clock atomically. This must not return until the
- * clock is generating a valid clock signal, usable by consumer
- * devices. Called with enable_lock held. This function must not
- * sleep.
+ * clock is generating a valid clock signal, usable by consumer
+ * devices. Called with enable_lock held. This function must not
+ * sleep.
*
* @disable: Disable the clock atomically. Called with enable_lock held.
- * This function must not sleep.
+ * This function must not sleep.
*
* @is_enabled: Queries the hardware to determine if the clock is enabled.
- * This function must not sleep. Optional, if this op is not
- * set then the enable count will be used.
+ * This function must not sleep. Optional, if this op is not
+ * set then the enable count will be used.
*
* @disable_unused: Disable the clock atomically. Only called from
* clk_disable_unused for gate clocks with special needs.
@@ -75,34 +75,35 @@ struct dentry;
* sleep.
*
* @recalc_rate Recalculate the rate of this clock, by querying hardware. The
- * parent rate is an input parameter. It is up to the caller to
- * ensure that the prepare_mutex is held across this call.
- * Returns the calculated rate. Optional, but recommended - if
- * this op is not set then clock rate will be initialized to 0.
+ * parent rate is an input parameter. It is up to the caller to
+ * ensure that the prepare_mutex is held across this call.
+ * Returns the calculated rate. Optional, but recommended - if
+ * this op is not set then clock rate will be initialized to 0.
*
* @round_rate: Given a target rate as input, returns the closest rate actually
- * supported by the clock.
+ * supported by the clock. The parent rate is an input/output
+ * parameter.
*
* @determine_rate: Given a target rate as input, returns the closest rate
* actually supported by the clock, and optionally the parent clock
* that should be used to provide the clock rate.
*
- * @get_parent: Queries the hardware to determine the parent of a clock. The
- * return value is a u8 which specifies the index corresponding to
- * the parent clock. This index can be applied to either the
- * .parent_names or .parents arrays. In short, this function
- * translates the parent value read from hardware into an array
- * index. Currently only called when the clock is initialized by
- * __clk_init. This callback is mandatory for clocks with
- * multiple parents. It is optional (and unnecessary) for clocks
- * with 0 or 1 parents.
- *
* @set_parent: Change the input source of this clock; for clocks with multiple
- * possible parents specify a new parent by passing in the index
- * as a u8 corresponding to the parent in either the .parent_names
- * or .parents arrays. This function in affect translates an
- * array index into the value programmed into the hardware.
- * Returns 0 on success, -EERROR otherwise.
+ * possible parents specify a new parent by passing in the index
+ * as a u8 corresponding to the parent in either the .parent_names
+ * or .parents arrays. This function in affect translates an
+ * array index into the value programmed into the hardware.
+ * Returns 0 on success, -EERROR otherwise.
+ *
+ * @get_parent: Queries the hardware to determine the parent of a clock. The
+ * return value is a u8 which specifies the index corresponding to
+ * the parent clock. This index can be applied to either the
+ * .parent_names or .parents arrays. In short, this function
+ * translates the parent value read from hardware into an array
+ * index. Currently only called when the clock is initialized by
+ * __clk_init. This callback is mandatory for clocks with
+ * multiple parents. It is optional (and unnecessary) for clocks
+ * with 0 or 1 parents.
*
* @set_rate: Change the rate of this clock. The requested rate is specified
* by the second argument, which should typically be the return
@@ -110,13 +111,6 @@ struct dentry;
* which is likely helpful for most .set_rate implementation.
* Returns 0 on success, -EERROR otherwise.
*
- * @recalc_accuracy: Recalculate the accuracy of this clock. The clock accuracy
- * is expressed in ppb (parts per billion). The parent accuracy is
- * an input parameter.
- * Returns the calculated accuracy. Optional - if this op is not
- * set then clock accuracy will be initialized to parent accuracy
- * or 0 (perfect clock) if clock has no parent.
- *
* @set_rate_and_parent: Change the rate and the parent of this clock. The
* requested rate is specified by the second argument, which
* should typically be the return of .round_rate call. The
@@ -128,6 +122,18 @@ struct dentry;
* separately via calls to .set_parent and .set_rate.
* Returns 0 on success, -EERROR otherwise.
*
+ * @recalc_accuracy: Recalculate the accuracy of this clock. The clock accuracy
+ * is expressed in ppb (parts per billion). The parent accuracy is
+ * an input parameter.
+ * Returns the calculated accuracy. Optional - if this op is not
+ * set then clock accuracy will be initialized to parent accuracy
+ * or 0 (perfect clock) if clock has no parent.
+ *
+ * @init: Perform platform-specific initialization magic.
+ * This is not not used by any of the basic clock types.
+ * Please consider other ways of solving initialization problems
+ * before using this callback, as its use is discouraged.
+ *
* @debug_init: Set up type-specific debugfs entries for this clock. This
* is called once, after the debugfs directory entry for this
* clock has been created. The dentry pointer representing that
@@ -157,15 +163,15 @@ struct clk_ops {
void (*disable_unused)(struct clk_hw *hw);
unsigned long (*recalc_rate)(struct clk_hw *hw,
unsigned long parent_rate);
- long (*round_rate)(struct clk_hw *hw, unsigned long,
- unsigned long *);
+ long (*round_rate)(struct clk_hw *hw, unsigned long rate,
+ unsigned long *parent_rate);
long (*determine_rate)(struct clk_hw *hw, unsigned long rate,
unsigned long *best_parent_rate,
struct clk **best_parent_clk);
int (*set_parent)(struct clk_hw *hw, u8 index);
u8 (*get_parent)(struct clk_hw *hw);
- int (*set_rate)(struct clk_hw *hw, unsigned long,
- unsigned long);
+ int (*set_rate)(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate);
int (*set_rate_and_parent)(struct clk_hw *hw,
unsigned long rate,
unsigned long parent_rate, u8 index);
@@ -254,12 +260,12 @@ void of_fixed_clk_setup(struct device_node *np);
*
* Flags:
* CLK_GATE_SET_TO_DISABLE - by default this clock sets the bit at bit_idx to
- * enable the clock. Setting this flag does the opposite: setting the bit
- * disable the clock and clearing it enables the clock
+ * enable the clock. Setting this flag does the opposite: setting the bit
+ * disable the clock and clearing it enables the clock
* CLK_GATE_HIWORD_MASK - The gate settings are only in lower 16-bit
- * of this register, and mask of gate bits are in higher 16-bit of this
- * register. While setting the gate bits, higher 16-bit should also be
- * updated to indicate changing gate bits.
+ * of this register, and mask of gate bits are in higher 16-bit of this
+ * register. While setting the gate bits, higher 16-bit should also be
+ * updated to indicate changing gate bits.
*/
struct clk_gate {
struct clk_hw hw;
@@ -298,20 +304,24 @@ struct clk_div_table {
*
* Flags:
* CLK_DIVIDER_ONE_BASED - by default the divisor is the value read from the
- * register plus one. If CLK_DIVIDER_ONE_BASED is set then the divider is
- * the raw value read from the register, with the value of zero considered
+ * register plus one. If CLK_DIVIDER_ONE_BASED is set then the divider is
+ * the raw value read from the register, with the value of zero considered
* invalid, unless CLK_DIVIDER_ALLOW_ZERO is set.
* CLK_DIVIDER_POWER_OF_TWO - clock divisor is 2 raised to the value read from
- * the hardware register
+ * the hardware register
* CLK_DIVIDER_ALLOW_ZERO - Allow zero divisors. For dividers which have
* CLK_DIVIDER_ONE_BASED set, it is possible to end up with a zero divisor.
* Some hardware implementations gracefully handle this case and allow a
* zero divisor by not modifying their input clock
* (divide by one / bypass).
* CLK_DIVIDER_HIWORD_MASK - The divider settings are only in lower 16-bit
- * of this register, and mask of divider bits are in higher 16-bit of this
- * register. While setting the divider bits, higher 16-bit should also be
- * updated to indicate changing divider bits.
+ * of this register, and mask of divider bits are in higher 16-bit of this
+ * register. While setting the divider bits, higher 16-bit should also be
+ * updated to indicate changing divider bits.
+ * CLK_DIVIDER_ROUND_CLOSEST - Makes the best calculated divider to be rounded
+ * to the closest integer instead of the up one.
+ * CLK_DIVIDER_READ_ONLY - The divider settings are preconfigured and should
+ * not be changed by the clock framework.
*/
struct clk_divider {
struct clk_hw hw;
@@ -327,8 +337,11 @@ struct clk_divider {
#define CLK_DIVIDER_POWER_OF_TWO BIT(1)
#define CLK_DIVIDER_ALLOW_ZERO BIT(2)
#define CLK_DIVIDER_HIWORD_MASK BIT(3)
+#define CLK_DIVIDER_ROUND_CLOSEST BIT(4)
+#define CLK_DIVIDER_READ_ONLY BIT(5)
extern const struct clk_ops clk_divider_ops;
+extern const struct clk_ops clk_divider_ro_ops;
struct clk *clk_register_divider(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
void __iomem *reg, u8 shift, u8 width,
@@ -356,9 +369,9 @@ struct clk *clk_register_divider_table(struct device *dev, const char *name,
* CLK_MUX_INDEX_ONE - register index starts at 1, not 0
* CLK_MUX_INDEX_BIT - register index is a single bit (power of two)
* CLK_MUX_HIWORD_MASK - The mux settings are only in lower 16-bit of this
- * register, and mask of mux bits are in higher 16-bit of this register.
- * While setting the mux bits, higher 16-bit should also be updated to
- * indicate changing mux bits.
+ * register, and mask of mux bits are in higher 16-bit of this register.
+ * While setting the mux bits, higher 16-bit should also be updated to
+ * indicate changing mux bits.
*/
struct clk_mux {
struct clk_hw hw;
@@ -413,6 +426,37 @@ struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
unsigned int mult, unsigned int div);
+/**
+ * struct clk_fractional_divider - adjustable fractional divider clock
+ *
+ * @hw: handle between common and hardware-specific interfaces
+ * @reg: register containing the divider
+ * @mshift: shift to the numerator bit field
+ * @mwidth: width of the numerator bit field
+ * @nshift: shift to the denominator bit field
+ * @nwidth: width of the denominator bit field
+ * @lock: register lock
+ *
+ * Clock with adjustable fractional divider affecting its output frequency.
+ */
+
+struct clk_fractional_divider {
+ struct clk_hw hw;
+ void __iomem *reg;
+ u8 mshift;
+ u32 mmask;
+ u8 nshift;
+ u32 nmask;
+ u8 flags;
+ spinlock_t *lock;
+};
+
+extern const struct clk_ops clk_fractional_divider_ops;
+struct clk *clk_register_fractional_divider(struct device *dev,
+ const char *name, const char *parent_name, unsigned long flags,
+ void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth,
+ u8 clk_divider_flags, spinlock_t *lock);
+
/***
* struct clk_composite - aggregate clock of mux, divider and gate clocks
*
@@ -498,10 +542,7 @@ struct clk_onecell_data {
extern struct of_device_id __clk_of_table;
-#define CLK_OF_DECLARE(name, compat, fn) \
- static const struct of_device_id __clk_of_table_##name \
- __used __section(__clk_of_table) \
- = { .compatible = compat, .data = fn };
+#define CLK_OF_DECLARE(name, compat, fn) OF_DECLARE_1(clk, name, compat, fn)
#ifdef CONFIG_OF
int of_clk_add_provider(struct device_node *np,
diff --git a/include/linux/clk/at91_pmc.h b/include/linux/clk/at91_pmc.h
index a6911ebbd02a..de4268d4987a 100644
--- a/include/linux/clk/at91_pmc.h
+++ b/include/linux/clk/at91_pmc.h
@@ -155,6 +155,7 @@ extern void __iomem *at91_pmc_base;
#define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */
#define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */
#define AT91_PMC_LOCKU (1 << 6) /* UPLL Lock [some SAM9] */
+#define AT91_PMC_OSCSEL (1 << 7) /* Slow Oscillator Selection [some SAM9] */
#define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */
#define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */
#define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */
diff --git a/include/linux/clk/shmobile.h b/include/linux/clk/shmobile.h
index f9bf080a1123..9f8a14041dd5 100644
--- a/include/linux/clk/shmobile.h
+++ b/include/linux/clk/shmobile.h
@@ -1,7 +1,9 @@
/*
* Copyright 2013 Ideas On Board SPRL
+ * Copyright 2013, 2014 Horms Solutions Ltd.
*
* Contact: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+ * Contact: Simon Horman <horms@verge.net.au>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -14,6 +16,7 @@
#include <linux/types.h>
+void r8a7779_clocks_init(u32 mode);
void rcar_gen2_clocks_init(u32 mode);
#endif
diff --git a/include/linux/clk/sunxi.h b/include/linux/clk/sunxi.h
new file mode 100644
index 000000000000..aed28c4451d9
--- /dev/null
+++ b/include/linux/clk/sunxi.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright 2013 - Hans de Goede <hdegoede@redhat.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __LINUX_CLK_SUNXI_H_
+#define __LINUX_CLK_SUNXI_H_
+
+#include <linux/clk.h>
+
+void clk_sunxi_mmc_phase_control(struct clk *clk, u8 sample, u8 output);
+
+#endif
diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h
index 67301a405712..a16b497d5159 100644
--- a/include/linux/clocksource.h
+++ b/include/linux/clocksource.h
@@ -339,23 +339,13 @@ extern int clocksource_mmio_init(void __iomem *, const char *,
extern int clocksource_i8253_init(void);
-struct device_node;
-typedef void(*clocksource_of_init_fn)(struct device_node *);
+#define CLOCKSOURCE_OF_DECLARE(name, compat, fn) \
+ OF_DECLARE_1(clksrc, name, compat, fn)
+
#ifdef CONFIG_CLKSRC_OF
extern void clocksource_of_init(void);
-
-#define CLOCKSOURCE_OF_DECLARE(name, compat, fn) \
- static const struct of_device_id __clksrc_of_table_##name \
- __used __section(__clksrc_of_table) \
- = { .compatible = compat, \
- .data = (fn == (clocksource_of_init_fn)NULL) ? fn : fn }
#else
static inline void clocksource_of_init(void) {}
-#define CLOCKSOURCE_OF_DECLARE(name, compat, fn) \
- static const struct of_device_id __clksrc_of_table_##name \
- __attribute__((unused)) \
- = { .compatible = compat, \
- .data = (fn == (clocksource_of_init_fn)NULL) ? fn : fn }
#endif
#endif /* _LINUX_CLOCKSOURCE_H */
diff --git a/include/linux/compaction.h b/include/linux/compaction.h
index 7e1c76e3cd68..01e3132820da 100644
--- a/include/linux/compaction.h
+++ b/include/linux/compaction.h
@@ -22,7 +22,7 @@ extern int sysctl_extfrag_handler(struct ctl_table *table, int write,
extern int fragmentation_index(struct zone *zone, unsigned int order);
extern unsigned long try_to_compact_pages(struct zonelist *zonelist,
int order, gfp_t gfp_mask, nodemask_t *mask,
- bool sync, bool *contended);
+ enum migrate_mode mode, bool *contended);
extern void compact_pgdat(pg_data_t *pgdat, int order);
extern void reset_isolation_suitable(pg_data_t *pgdat);
extern unsigned long compaction_suitable(struct zone *zone, int order);
@@ -91,7 +91,7 @@ static inline bool compaction_restarting(struct zone *zone, int order)
#else
static inline unsigned long try_to_compact_pages(struct zonelist *zonelist,
int order, gfp_t gfp_mask, nodemask_t *nodemask,
- bool sync, bool *contended)
+ enum migrate_mode mode, bool *contended)
{
return COMPACT_CONTINUE;
}
diff --git a/include/linux/compiler-intel.h b/include/linux/compiler-intel.h
index 5529c5239421..ba147a1727e6 100644
--- a/include/linux/compiler-intel.h
+++ b/include/linux/compiler-intel.h
@@ -13,12 +13,9 @@
/* Intel ECC compiler doesn't support gcc specific asm stmts.
* It uses intrinsics to do the equivalent things.
*/
-#undef barrier
#undef RELOC_HIDE
#undef OPTIMIZER_HIDE_VAR
-#define barrier() __memory_barrier()
-
#define RELOC_HIDE(ptr, off) \
({ unsigned long __ptr; \
__ptr = (unsigned long) (ptr); \
diff --git a/include/linux/compiler.h b/include/linux/compiler.h
index ee7239ea1583..64fdfe1cfcf0 100644
--- a/include/linux/compiler.h
+++ b/include/linux/compiler.h
@@ -323,9 +323,18 @@ void ftrace_likely_update(struct ftrace_branch_data *f, int val, int expect);
#endif
#ifndef __compiletime_error
# define __compiletime_error(message)
-# define __compiletime_error_fallback(condition) \
+/*
+ * Sparse complains of variable sized arrays due to the temporary variable in
+ * __compiletime_assert. Unfortunately we can't just expand it out to make
+ * sparse see a constant array size without breaking compiletime_assert on old
+ * versions of GCC (e.g. 4.2.4), so hide the array from sparse altogether.
+ */
+# ifndef __CHECKER__
+# define __compiletime_error_fallback(condition) \
do { ((void)sizeof(char[1 - 2 * condition])); } while (0)
-#else
+# endif
+#endif
+#ifndef __compiletime_error_fallback
# define __compiletime_error_fallback(condition) do { } while (0)
#endif
diff --git a/include/linux/connector.h b/include/linux/connector.h
index be9c4747d511..f8fe8637d771 100644
--- a/include/linux/connector.h
+++ b/include/linux/connector.h
@@ -71,6 +71,7 @@ struct cn_dev {
int cn_add_callback(struct cb_id *id, const char *name,
void (*callback)(struct cn_msg *, struct netlink_skb_parms *));
void cn_del_callback(struct cb_id *);
+int cn_netlink_send_mult(struct cn_msg *msg, u16 len, u32 portid, u32 group, gfp_t gfp_mask);
int cn_netlink_send(struct cn_msg *msg, u32 portid, u32 group, gfp_t gfp_mask);
int cn_queue_add_callback(struct cn_queue_dev *dev, const char *name,
diff --git a/include/linux/console_struct.h b/include/linux/console_struct.h
index 7f0c32908568..e859c98d1767 100644
--- a/include/linux/console_struct.h
+++ b/include/linux/console_struct.h
@@ -17,6 +17,7 @@
#include <linux/workqueue.h>
struct vt_struct;
+struct uni_pagedir;
#define NPAR 16
@@ -104,8 +105,8 @@ struct vc_data {
unsigned int vc_bell_pitch; /* Console bell pitch */
unsigned int vc_bell_duration; /* Console bell duration */
struct vc_data **vc_display_fg; /* [!] Ptr to var holding fg console for this display */
- unsigned long vc_uni_pagedir;
- unsigned long *vc_uni_pagedir_loc; /* [!] Location of uni_pagedir variable for this console */
+ struct uni_pagedir *vc_uni_pagedir;
+ struct uni_pagedir **vc_uni_pagedir_loc; /* [!] Location of uni_pagedir variable for this console */
bool vc_panic_force_write; /* when oops/panic this VC can accept forced output/blanking */
/* additional information is in vt_kern.h */
};
diff --git a/include/linux/cpu.h b/include/linux/cpu.h
index 81887120395c..95978ad7fcdd 100644
--- a/include/linux/cpu.h
+++ b/include/linux/cpu.h
@@ -256,7 +256,6 @@ enum cpuhp_state {
};
void cpu_startup_entry(enum cpuhp_state state);
-void cpu_idle(void);
void cpu_idle_poll_ctrl(bool enable);
diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h
index 5ae5100c1f24..3f458896d45c 100644
--- a/include/linux/cpufreq.h
+++ b/include/linux/cpufreq.h
@@ -110,6 +110,7 @@ struct cpufreq_policy {
bool transition_ongoing; /* Tracks transition status */
spinlock_t transition_lock;
wait_queue_head_t transition_wait;
+ struct task_struct *transition_task; /* Task which is doing the transition */
};
/* Only for ACPI */
@@ -468,6 +469,55 @@ struct cpufreq_frequency_table {
* order */
};
+#if defined(CONFIG_CPU_FREQ) && defined(CONFIG_PM_OPP)
+int dev_pm_opp_init_cpufreq_table(struct device *dev,
+ struct cpufreq_frequency_table **table);
+void dev_pm_opp_free_cpufreq_table(struct device *dev,
+ struct cpufreq_frequency_table **table);
+#else
+static inline int dev_pm_opp_init_cpufreq_table(struct device *dev,
+ struct cpufreq_frequency_table
+ **table)
+{
+ return -EINVAL;
+}
+
+static inline void dev_pm_opp_free_cpufreq_table(struct device *dev,
+ struct cpufreq_frequency_table
+ **table)
+{
+}
+#endif
+
+static inline bool cpufreq_next_valid(struct cpufreq_frequency_table **pos)
+{
+ while ((*pos)->frequency != CPUFREQ_TABLE_END)
+ if ((*pos)->frequency != CPUFREQ_ENTRY_INVALID)
+ return true;
+ else
+ (*pos)++;
+ return false;
+}
+
+/*
+ * cpufreq_for_each_entry - iterate over a cpufreq_frequency_table
+ * @pos: the cpufreq_frequency_table * to use as a loop cursor.
+ * @table: the cpufreq_frequency_table * to iterate over.
+ */
+
+#define cpufreq_for_each_entry(pos, table) \
+ for (pos = table; pos->frequency != CPUFREQ_TABLE_END; pos++)
+
+/*
+ * cpufreq_for_each_valid_entry - iterate over a cpufreq_frequency_table
+ * excluding CPUFREQ_ENTRY_INVALID frequencies.
+ * @pos: the cpufreq_frequency_table * to use as a loop cursor.
+ * @table: the cpufreq_frequency_table * to iterate over.
+ */
+
+#define cpufreq_for_each_valid_entry(pos, table) \
+ for (pos = table; cpufreq_next_valid(&pos); pos++)
+
int cpufreq_frequency_table_cpuinfo(struct cpufreq_policy *policy,
struct cpufreq_frequency_table *table);
diff --git a/include/linux/cpuidle.h b/include/linux/cpuidle.h
index b0238cba440b..25e0df6155a4 100644
--- a/include/linux/cpuidle.h
+++ b/include/linux/cpuidle.h
@@ -84,6 +84,7 @@ struct cpuidle_device {
};
DECLARE_PER_CPU(struct cpuidle_device *, cpuidle_devices);
+DECLARE_PER_CPU(struct cpuidle_device, cpuidle_dev);
/**
* cpuidle_get_last_residency - retrieves the last state's residency time
@@ -120,8 +121,6 @@ struct cpuidle_driver {
#ifdef CONFIG_CPU_IDLE
extern void disable_cpuidle(void);
-extern int cpuidle_enabled(struct cpuidle_driver *drv,
- struct cpuidle_device *dev);
extern int cpuidle_select(struct cpuidle_driver *drv,
struct cpuidle_device *dev);
extern int cpuidle_enter(struct cpuidle_driver *drv,
@@ -145,13 +144,11 @@ extern void cpuidle_resume(void);
extern int cpuidle_enable_device(struct cpuidle_device *dev);
extern void cpuidle_disable_device(struct cpuidle_device *dev);
extern int cpuidle_play_dead(void);
+extern void cpuidle_use_deepest_state(bool enable);
extern struct cpuidle_driver *cpuidle_get_cpu_driver(struct cpuidle_device *dev);
#else
static inline void disable_cpuidle(void) { }
-static inline int cpuidle_enabled(struct cpuidle_driver *drv,
- struct cpuidle_device *dev)
-{return -ENODEV; }
static inline int cpuidle_select(struct cpuidle_driver *drv,
struct cpuidle_device *dev)
{return -ENODEV; }
@@ -180,6 +177,7 @@ static inline int cpuidle_enable_device(struct cpuidle_device *dev)
{return -ENODEV; }
static inline void cpuidle_disable_device(struct cpuidle_device *dev) { }
static inline int cpuidle_play_dead(void) {return -ENODEV; }
+static inline void cpuidle_use_deepest_state(bool enable) {}
static inline struct cpuidle_driver *cpuidle_get_cpu_driver(
struct cpuidle_device *dev) {return NULL; }
#endif
diff --git a/include/linux/cpumask.h b/include/linux/cpumask.h
index d08e4d2a9b92..3557ea7b2049 100644
--- a/include/linux/cpumask.h
+++ b/include/linux/cpumask.h
@@ -600,7 +600,7 @@ static inline int cpulist_scnprintf(char *buf, int len,
static inline int cpumask_parse(const char *buf, struct cpumask *dstp)
{
char *nl = strchr(buf, '\n');
- int len = nl ? nl - buf : strlen(buf);
+ unsigned int len = nl ? (unsigned int)(nl - buf) : strlen(buf);
return bitmap_parse(buf, len, cpumask_bits(dstp), nr_cpumask_bits);
}
diff --git a/include/linux/cpuset.h b/include/linux/cpuset.h
index b19d3dc2e651..ade2390ffe92 100644
--- a/include/linux/cpuset.h
+++ b/include/linux/cpuset.h
@@ -12,10 +12,31 @@
#include <linux/cpumask.h>
#include <linux/nodemask.h>
#include <linux/mm.h>
+#include <linux/jump_label.h>
#ifdef CONFIG_CPUSETS
-extern int number_of_cpusets; /* How many cpusets are defined in system? */
+extern struct static_key cpusets_enabled_key;
+static inline bool cpusets_enabled(void)
+{
+ return static_key_false(&cpusets_enabled_key);
+}
+
+static inline int nr_cpusets(void)
+{
+ /* jump label reference count + the top-level cpuset */
+ return static_key_count(&cpusets_enabled_key) + 1;
+}
+
+static inline void cpuset_inc(void)
+{
+ static_key_slow_inc(&cpusets_enabled_key);
+}
+
+static inline void cpuset_dec(void)
+{
+ static_key_slow_dec(&cpusets_enabled_key);
+}
extern int cpuset_init(void);
extern void cpuset_init_smp(void);
@@ -32,13 +53,13 @@ extern int __cpuset_node_allowed_hardwall(int node, gfp_t gfp_mask);
static inline int cpuset_node_allowed_softwall(int node, gfp_t gfp_mask)
{
- return number_of_cpusets <= 1 ||
+ return nr_cpusets() <= 1 ||
__cpuset_node_allowed_softwall(node, gfp_mask);
}
static inline int cpuset_node_allowed_hardwall(int node, gfp_t gfp_mask)
{
- return number_of_cpusets <= 1 ||
+ return nr_cpusets() <= 1 ||
__cpuset_node_allowed_hardwall(node, gfp_mask);
}
@@ -124,6 +145,8 @@ static inline void set_mems_allowed(nodemask_t nodemask)
#else /* !CONFIG_CPUSETS */
+static inline bool cpusets_enabled(void) { return false; }
+
static inline int cpuset_init(void) { return 0; }
static inline void cpuset_init_smp(void) {}
diff --git a/include/linux/dcache.h b/include/linux/dcache.h
index 3b9bfdb83ba6..3c7ec327ebd2 100644
--- a/include/linux/dcache.h
+++ b/include/linux/dcache.h
@@ -221,6 +221,8 @@ struct dentry_operations {
#define DCACHE_SYMLINK_TYPE 0x00300000 /* Symlink */
#define DCACHE_FILE_TYPE 0x00400000 /* Other file type */
+#define DCACHE_MAY_FREE 0x00800000
+
extern seqlock_t rename_lock;
static inline int dname_external(const struct dentry *dentry)
diff --git a/include/linux/devfreq.h b/include/linux/devfreq.h
index d48dc00232a4..f1863dcd83ea 100644
--- a/include/linux/devfreq.h
+++ b/include/linux/devfreq.h
@@ -181,6 +181,12 @@ extern struct devfreq *devfreq_add_device(struct device *dev,
const char *governor_name,
void *data);
extern int devfreq_remove_device(struct devfreq *devfreq);
+extern struct devfreq *devm_devfreq_add_device(struct device *dev,
+ struct devfreq_dev_profile *profile,
+ const char *governor_name,
+ void *data);
+extern void devm_devfreq_remove_device(struct device *dev,
+ struct devfreq *devfreq);
/* Supposed to be called by PM_SLEEP/PM_RUNTIME callbacks */
extern int devfreq_suspend_device(struct devfreq *devfreq);
@@ -193,6 +199,10 @@ extern int devfreq_register_opp_notifier(struct device *dev,
struct devfreq *devfreq);
extern int devfreq_unregister_opp_notifier(struct device *dev,
struct devfreq *devfreq);
+extern int devm_devfreq_register_opp_notifier(struct device *dev,
+ struct devfreq *devfreq);
+extern void devm_devfreq_unregister_opp_notifier(struct device *dev,
+ struct devfreq *devfreq);
#if IS_ENABLED(CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND)
/**
@@ -220,7 +230,7 @@ static inline struct devfreq *devfreq_add_device(struct device *dev,
const char *governor_name,
void *data)
{
- return NULL;
+ return ERR_PTR(-ENOSYS);
}
static inline int devfreq_remove_device(struct devfreq *devfreq)
@@ -228,6 +238,19 @@ static inline int devfreq_remove_device(struct devfreq *devfreq)
return 0;
}
+static inline struct devfreq *devm_devfreq_add_device(struct device *dev,
+ struct devfreq_dev_profile *profile,
+ const char *governor_name,
+ void *data)
+{
+ return ERR_PTR(-ENOSYS);
+}
+
+static inline void devm_devfreq_remove_device(struct device *dev,
+ struct devfreq *devfreq)
+{
+}
+
static inline int devfreq_suspend_device(struct devfreq *devfreq)
{
return 0;
@@ -256,6 +279,16 @@ static inline int devfreq_unregister_opp_notifier(struct device *dev,
return -EINVAL;
}
+static inline int devm_devfreq_register_opp_notifier(struct device *dev,
+ struct devfreq *devfreq)
+{
+ return -EINVAL;
+}
+
+static inline void devm_devfreq_unregister_opp_notifier(struct device *dev,
+ struct devfreq *devfreq)
+{
+}
#endif /* CONFIG_PM_DEVFREQ */
#endif /* __LINUX_DEVFREQ_H__ */
diff --git a/include/linux/device.h b/include/linux/device.h
index d1d1c055b48e..af424acd393d 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -623,6 +623,12 @@ static inline void *devm_kcalloc(struct device *dev,
}
extern void devm_kfree(struct device *dev, void *p);
extern char *devm_kstrdup(struct device *dev, const char *s, gfp_t gfp);
+extern void *devm_kmemdup(struct device *dev, const void *src, size_t len,
+ gfp_t gfp);
+
+extern unsigned long devm_get_free_pages(struct device *dev,
+ gfp_t gfp_mask, unsigned int order);
+extern void devm_free_pages(struct device *dev, unsigned long addr);
void __iomem *devm_ioremap_resource(struct device *dev, struct resource *res);
void __iomem *devm_request_and_ioremap(struct device *dev,
@@ -673,6 +679,7 @@ struct acpi_dev_node {
* variants, which GPIO pins act in what additional roles, and so
* on. This shrinks the "Board Support Packages" (BSPs) and
* minimizes board-specific #ifdefs in drivers.
+ * @driver_data: Private pointer for driver specific info.
* @power: For device power management.
* See Documentation/power/devices.txt for details.
* @pm_domain: Provide callbacks that are executed during system suspend,
@@ -685,6 +692,7 @@ struct acpi_dev_node {
* @coherent_dma_mask: Like dma_mask, but for alloc_coherent mapping as not all
* hardware supports 64-bit addresses for consistent allocations
* such descriptors.
+ * @dma_pfn_offset: offset of DMA memory range relatively of RAM
* @dma_parms: A low level driver may set these to teach IOMMU code about
* segment limitations.
* @dma_pools: Dma pools (if dma'ble device).
@@ -734,6 +742,8 @@ struct device {
device */
void *platform_data; /* Platform specific data, device
core doesn't touch it */
+ void *driver_data; /* Driver data, set and get with
+ dev_set/get_drvdata */
struct dev_pm_info power;
struct dev_pm_domain *pm_domain;
@@ -750,6 +760,7 @@ struct device {
not all hardware supports
64 bit addresses for consistent
allocations such descriptors. */
+ unsigned long dma_pfn_offset;
struct device_dma_parameters *dma_parms;
@@ -823,6 +834,16 @@ static inline void set_dev_node(struct device *dev, int node)
}
#endif
+static inline void *dev_get_drvdata(const struct device *dev)
+{
+ return dev->driver_data;
+}
+
+static inline void dev_set_drvdata(struct device *dev, void *data)
+{
+ dev->driver_data = data;
+}
+
static inline struct pm_subsys_data *dev_to_psd(struct device *dev)
{
return dev ? dev->power.subsys_data : NULL;
@@ -907,8 +928,6 @@ extern int device_move(struct device *dev, struct device *new_parent,
extern const char *device_get_devnode(struct device *dev,
umode_t *mode, kuid_t *uid, kgid_t *gid,
const char **tmp);
-extern void *dev_get_drvdata(const struct device *dev);
-extern int dev_set_drvdata(struct device *dev, void *data);
static inline bool device_supports_offline(struct device *dev)
{
diff --git a/include/linux/dma-contiguous.h b/include/linux/dma-contiguous.h
index 3b28f937d959..772eab5d524a 100644
--- a/include/linux/dma-contiguous.h
+++ b/include/linux/dma-contiguous.h
@@ -88,7 +88,8 @@ static inline void dma_contiguous_set_default(struct cma *cma)
void dma_contiguous_reserve(phys_addr_t addr_limit);
int __init dma_contiguous_reserve_area(phys_addr_t size, phys_addr_t base,
- phys_addr_t limit, struct cma **res_cma);
+ phys_addr_t limit, struct cma **res_cma,
+ bool fixed);
/**
* dma_declare_contiguous() - reserve area for contiguous memory handling
@@ -108,7 +109,7 @@ static inline int dma_declare_contiguous(struct device *dev, phys_addr_t size,
{
struct cma *cma;
int ret;
- ret = dma_contiguous_reserve_area(size, base, limit, &cma);
+ ret = dma_contiguous_reserve_area(size, base, limit, &cma, true);
if (ret == 0)
dev_set_cma_area(dev, cma);
@@ -136,7 +137,9 @@ static inline void dma_contiguous_set_default(struct cma *cma) { }
static inline void dma_contiguous_reserve(phys_addr_t limit) { }
static inline int dma_contiguous_reserve_area(phys_addr_t size, phys_addr_t base,
- phys_addr_t limit, struct cma **res_cma) {
+ phys_addr_t limit, struct cma **res_cma,
+ bool fixed)
+{
return -ENOSYS;
}
diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h
index fd4aee29ad10..931b70986272 100644
--- a/include/linux/dma-mapping.h
+++ b/include/linux/dma-mapping.h
@@ -8,6 +8,12 @@
#include <linux/dma-direction.h>
#include <linux/scatterlist.h>
+/*
+ * A dma_addr_t can hold any valid DMA or bus address for the platform.
+ * It can be given to a device to use as a DMA source or target. A CPU cannot
+ * reference a dma_addr_t directly because there may be translation between
+ * its physical address space and the bus address space.
+ */
struct dma_map_ops {
void* (*alloc)(struct device *dev, size_t size,
dma_addr_t *dma_handle, gfp_t gfp,
@@ -123,6 +129,13 @@ static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask)
extern u64 dma_get_required_mask(struct device *dev);
+#ifndef set_arch_dma_coherent_ops
+static inline int set_arch_dma_coherent_ops(struct device *dev)
+{
+ return 0;
+}
+#endif
+
static inline unsigned int dma_get_max_seg_size(struct device *dev)
{
return dev->dma_parms ? dev->dma_parms->max_segment_size : 65536;
@@ -186,7 +199,7 @@ static inline int dma_get_cache_alignment(void)
#ifndef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
static inline int
-dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
+dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
dma_addr_t device_addr, size_t size, int flags)
{
return 0;
@@ -217,13 +230,14 @@ extern void *dmam_alloc_noncoherent(struct device *dev, size_t size,
extern void dmam_free_noncoherent(struct device *dev, size_t size, void *vaddr,
dma_addr_t dma_handle);
#ifdef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
-extern int dmam_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
+extern int dmam_declare_coherent_memory(struct device *dev,
+ phys_addr_t phys_addr,
dma_addr_t device_addr, size_t size,
int flags);
extern void dmam_release_declared_memory(struct device *dev);
#else /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
static inline int dmam_declare_coherent_memory(struct device *dev,
- dma_addr_t bus_addr, dma_addr_t device_addr,
+ phys_addr_t phys_addr, dma_addr_t device_addr,
size_t size, gfp_t gfp)
{
return 0;
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index 8300fb87b84a..d2c5cc7c583c 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -292,7 +292,7 @@ struct dma_chan_dev {
};
/**
- * enum dma_slave_buswidth - defines bus with of the DMA slave
+ * enum dma_slave_buswidth - defines bus width of the DMA slave
* device, source or target buses
*/
enum dma_slave_buswidth {
@@ -429,6 +429,7 @@ typedef bool (*dma_filter_fn)(struct dma_chan *chan, void *filter_param);
typedef void (*dma_async_tx_callback)(void *dma_async_param);
struct dmaengine_unmap_data {
+ u8 map_cnt;
u8 to_cnt;
u8 from_cnt;
u8 bidi_cnt;
diff --git a/include/linux/efi.h b/include/linux/efi.h
index 6c100ff0cae4..41bbf8ba4ba8 100644
--- a/include/linux/efi.h
+++ b/include/linux/efi.h
@@ -575,6 +575,9 @@ typedef efi_status_t efi_query_variable_store_t(u32 attributes, unsigned long si
#define EFI_FILE_SYSTEM_GUID \
EFI_GUID( 0x964e5b22, 0x6459, 0x11d2, 0x8e, 0x39, 0x00, 0xa0, 0xc9, 0x69, 0x72, 0x3b )
+#define DEVICE_TREE_GUID \
+ EFI_GUID( 0xb1b621d5, 0xf19c, 0x41a5, 0x83, 0x0b, 0xd9, 0x15, 0x2c, 0x69, 0xaa, 0xe0 )
+
typedef struct {
efi_guid_t guid;
u64 table;
@@ -664,6 +667,14 @@ struct efi_memory_map {
unsigned long desc_size;
};
+struct efi_fdt_params {
+ u64 system_table;
+ u64 mmap;
+ u32 mmap_size;
+ u32 desc_size;
+ u32 desc_ver;
+};
+
typedef struct {
u32 revision;
u32 parent_handle;
@@ -861,8 +872,15 @@ extern void efi_initialize_iomem_resources(struct resource *code_resource,
extern void efi_get_time(struct timespec *now);
extern int efi_set_rtc_mmss(const struct timespec *now);
extern void efi_reserve_boot_services(void);
+extern int efi_get_fdt_params(struct efi_fdt_params *params, int verbose);
extern struct efi_memory_map memmap;
+/* Iterate through an efi_memory_map */
+#define for_each_efi_memory_desc(m, md) \
+ for ((md) = (m)->map; \
+ (md) <= (efi_memory_desc_t *)((m)->map_end - (m)->desc_size); \
+ (md) = (void *)(md) + (m)->desc_size)
+
/**
* efi_range_is_wc - check the WC bit on an address range
* @start: starting kvirt address
@@ -1033,8 +1051,10 @@ struct efivars {
* and we use a page for reading/writing.
*/
+#define EFI_VAR_NAME_LEN 1024
+
struct efi_variable {
- efi_char16_t VariableName[1024/sizeof(efi_char16_t)];
+ efi_char16_t VariableName[EFI_VAR_NAME_LEN/sizeof(efi_char16_t)];
efi_guid_t VendorGuid;
unsigned long DataSize;
__u8 Data[1024];
@@ -1116,7 +1136,7 @@ int efivar_entry_iter(int (*func)(struct efivar_entry *, void *),
struct efivar_entry *efivar_entry_find(efi_char16_t *name, efi_guid_t guid,
struct list_head *head, bool remove);
-bool efivar_validate(struct efi_variable *var, u8 *data, unsigned long len);
+bool efivar_validate(efi_char16_t *var_name, u8 *data, unsigned long len);
extern struct work_struct efivar_work;
void efivar_run_worker(void);
diff --git a/include/linux/elevator.h b/include/linux/elevator.h
index df63bd3a8cf1..4ff262e2bf37 100644
--- a/include/linux/elevator.h
+++ b/include/linux/elevator.h
@@ -144,7 +144,7 @@ extern void elv_drain_elevator(struct request_queue *);
* io scheduler registration
*/
extern void __init load_default_elevator_module(void);
-extern int elv_register(struct elevator_type *);
+extern int __init elv_register(struct elevator_type *);
extern void elv_unregister(struct elevator_type *);
/*
diff --git a/include/linux/extcon.h b/include/linux/extcon.h
index f488145bb2d4..36f49c405dfb 100644
--- a/include/linux/extcon.h
+++ b/include/linux/extcon.h
@@ -185,9 +185,22 @@ struct extcon_specific_cable_nb {
*/
extern int extcon_dev_register(struct extcon_dev *edev);
extern void extcon_dev_unregister(struct extcon_dev *edev);
+extern int devm_extcon_dev_register(struct device *dev,
+ struct extcon_dev *edev);
+extern void devm_extcon_dev_unregister(struct device *dev,
+ struct extcon_dev *edev);
extern struct extcon_dev *extcon_get_extcon_dev(const char *extcon_name);
/*
+ * Following APIs control the memory of extcon device.
+ */
+extern struct extcon_dev *extcon_dev_allocate(const char **cables);
+extern void extcon_dev_free(struct extcon_dev *edev);
+extern struct extcon_dev *devm_extcon_dev_allocate(struct device *dev,
+ const char **cables);
+extern void devm_extcon_dev_free(struct device *dev, struct extcon_dev *edev);
+
+/*
* get/set/update_state access the 32b encoded state value, which represents
* states of all possible cables of the multistate port. For example, if one
* calls extcon_set_state(edev, 0x7), it may mean that all the three cables
@@ -254,6 +267,30 @@ static inline int extcon_dev_register(struct extcon_dev *edev)
static inline void extcon_dev_unregister(struct extcon_dev *edev) { }
+static inline int devm_extcon_dev_register(struct device *dev,
+ struct extcon_dev *edev)
+{
+ return -EINVAL;
+}
+
+static inline void devm_extcon_dev_unregister(struct device *dev,
+ struct extcon_dev *edev) { }
+
+static inline struct extcon_dev *extcon_dev_allocate(const char **cables)
+{
+ return ERR_PTR(-ENOSYS);
+}
+
+static inline void extcon_dev_free(struct extcon_dev *edev) { }
+
+static inline struct extcon_dev *devm_extcon_dev_allocate(struct device *dev,
+ const char **cables)
+{
+ return ERR_PTR(-ENOSYS);
+}
+
+static inline void devm_extcon_dev_free(struct extcon_dev *edev) { }
+
static inline u32 extcon_get_state(struct extcon_dev *edev)
{
return 0;
diff --git a/include/linux/f2fs_fs.h b/include/linux/f2fs_fs.h
index df53e1753a76..6ff0b0b42d47 100644
--- a/include/linux/f2fs_fs.h
+++ b/include/linux/f2fs_fs.h
@@ -19,6 +19,7 @@
#define F2FS_LOG_SECTORS_PER_BLOCK 3 /* 4KB: F2FS_BLKSIZE */
#define F2FS_BLKSIZE 4096 /* support only 4KB block */
#define F2FS_MAX_EXTENSION 64 /* # of extension entries */
+#define F2FS_BLK_ALIGN(x) (((x) + F2FS_BLKSIZE - 1) / F2FS_BLKSIZE)
#define NULL_ADDR ((block_t)0) /* used as block_t addresses */
#define NEW_ADDR ((block_t)-1) /* used as block_t addresses */
@@ -75,6 +76,7 @@ struct f2fs_super_block {
__le16 volume_name[512]; /* volume name */
__le32 extension_count; /* # of extensions below */
__u8 extension_list[F2FS_MAX_EXTENSION][8]; /* extension array */
+ __le32 cp_payload;
} __packed;
/*
@@ -146,6 +148,9 @@ struct f2fs_extent {
#define ADDRS_PER_BLOCK 1018 /* Address Pointers in a Direct Block */
#define NIDS_PER_BLOCK 1018 /* Node IDs in an Indirect Block */
+#define ADDRS_PER_PAGE(page, fi) \
+ (IS_INODE(page) ? ADDRS_PER_INODE(fi) : ADDRS_PER_BLOCK)
+
#define NODE_DIR1_BLOCK (DEF_ADDRS_PER_INODE + 1)
#define NODE_DIR2_BLOCK (DEF_ADDRS_PER_INODE + 2)
#define NODE_IND1_BLOCK (DEF_ADDRS_PER_INODE + 3)
@@ -391,6 +396,9 @@ typedef __le32 f2fs_hash_t;
/* MAX level for dir lookup */
#define MAX_DIR_HASH_DEPTH 63
+/* MAX buckets in one level of dir */
+#define MAX_DIR_BUCKETS (1 << ((MAX_DIR_HASH_DEPTH / 2) - 1))
+
#define SIZE_OF_DIR_ENTRY 11 /* by byte */
#define SIZE_OF_DENTRY_BITMAP ((NR_DENTRY_IN_BLOCK + BITS_PER_BYTE - 1) / \
BITS_PER_BYTE)
diff --git a/include/linux/fb.h b/include/linux/fb.h
index fe6ac956550e..b6bfda99add3 100644
--- a/include/linux/fb.h
+++ b/include/linux/fb.h
@@ -47,6 +47,7 @@ struct device_node;
#define FB_MISC_PRIM_COLOR 1
#define FB_MISC_1ST_DETAIL 2 /* First Detailed Timing is preferred */
+#define FB_MISC_HDMI 4
struct fb_chroma {
__u32 redx; /* in fraction of 1024 */
__u32 greenx;
@@ -641,7 +642,7 @@ static inline void unlock_fb_info(struct fb_info *info)
static inline void __fb_pad_aligned_buffer(u8 *dst, u32 d_pitch,
u8 *src, u32 s_pitch, u32 height)
{
- int i, j;
+ u32 i, j;
d_pitch -= s_pitch;
diff --git a/include/linux/firewire.h b/include/linux/firewire.h
index c3683bdf28fe..d4b7683c722d 100644
--- a/include/linux/firewire.h
+++ b/include/linux/firewire.h
@@ -367,6 +367,9 @@ static inline int fw_stream_packet_destination_id(int tag, int channel, int sy)
return tag << 14 | channel << 8 | sy;
}
+void fw_schedule_bus_reset(struct fw_card *card, bool delayed,
+ bool short_reset);
+
struct fw_descriptor {
struct list_head link;
size_t length;
diff --git a/include/linux/fs.h b/include/linux/fs.h
index 878031227c57..338e6f758c6d 100644
--- a/include/linux/fs.h
+++ b/include/linux/fs.h
@@ -128,6 +128,10 @@ typedef void (dio_iodone_t)(struct kiocb *iocb, loff_t offset,
#define FMODE_ATOMIC_POS ((__force fmode_t)0x8000)
/* Write access to underlying fs */
#define FMODE_WRITER ((__force fmode_t)0x10000)
+/* Has read method(s) */
+#define FMODE_CAN_READ ((__force fmode_t)0x20000)
+/* Has write method(s) */
+#define FMODE_CAN_WRITE ((__force fmode_t)0x40000)
/* File was opened by fanotify and shouldn't generate fanotify events */
#define FMODE_NONOTIFY ((__force fmode_t)0x1000000)
@@ -343,8 +347,7 @@ struct address_space_operations {
void (*invalidatepage) (struct page *, unsigned int, unsigned int);
int (*releasepage) (struct page *, gfp_t);
void (*freepage)(struct page *);
- ssize_t (*direct_IO)(int, struct kiocb *, const struct iovec *iov,
- loff_t offset, unsigned long nr_segs);
+ ssize_t (*direct_IO)(int, struct kiocb *, struct iov_iter *iter, loff_t offset);
int (*get_xip_mem)(struct address_space *, pgoff_t, int,
void **, unsigned long *);
/*
@@ -1448,6 +1451,8 @@ struct block_device_operations;
#define HAVE_COMPAT_IOCTL 1
#define HAVE_UNLOCKED_IOCTL 1
+struct iov_iter;
+
struct file_operations {
struct module *owner;
loff_t (*llseek) (struct file *, loff_t, int);
@@ -1455,6 +1460,8 @@ struct file_operations {
ssize_t (*write) (struct file *, const char __user *, size_t, loff_t *);
ssize_t (*aio_read) (struct kiocb *, const struct iovec *, unsigned long, loff_t);
ssize_t (*aio_write) (struct kiocb *, const struct iovec *, unsigned long, loff_t);
+ ssize_t (*read_iter) (struct kiocb *, struct iov_iter *);
+ ssize_t (*write_iter) (struct kiocb *, struct iov_iter *);
int (*iterate) (struct file *, struct dir_context *);
unsigned int (*poll) (struct file *, struct poll_table_struct *);
long (*unlocked_ioctl) (struct file *, unsigned int, unsigned long);
@@ -2404,20 +2411,18 @@ extern int generic_file_readonly_mmap(struct file *, struct vm_area_struct *);
extern int generic_file_remap_pages(struct vm_area_struct *, unsigned long addr,
unsigned long size, pgoff_t pgoff);
int generic_write_checks(struct file *file, loff_t *pos, size_t *count, int isblk);
-extern ssize_t generic_file_aio_read(struct kiocb *, const struct iovec *, unsigned long, loff_t);
-extern ssize_t __generic_file_aio_write(struct kiocb *, const struct iovec *, unsigned long);
-extern ssize_t generic_file_aio_write(struct kiocb *, const struct iovec *, unsigned long, loff_t);
-extern ssize_t generic_file_direct_write(struct kiocb *, const struct iovec *,
- unsigned long *, loff_t, size_t, size_t);
+extern ssize_t generic_file_read_iter(struct kiocb *, struct iov_iter *);
+extern ssize_t __generic_file_write_iter(struct kiocb *, struct iov_iter *);
+extern ssize_t generic_file_write_iter(struct kiocb *, struct iov_iter *);
+extern ssize_t generic_file_direct_write(struct kiocb *, struct iov_iter *, loff_t);
extern ssize_t generic_perform_write(struct file *, struct iov_iter *, loff_t);
extern ssize_t do_sync_read(struct file *filp, char __user *buf, size_t len, loff_t *ppos);
extern ssize_t do_sync_write(struct file *filp, const char __user *buf, size_t len, loff_t *ppos);
-extern int generic_segment_checks(const struct iovec *iov,
- unsigned long *nr_segs, size_t *count, int access_flags);
+extern ssize_t new_sync_read(struct file *filp, char __user *buf, size_t len, loff_t *ppos);
+extern ssize_t new_sync_write(struct file *filp, const char __user *buf, size_t len, loff_t *ppos);
/* fs/block_dev.c */
-extern ssize_t blkdev_aio_write(struct kiocb *iocb, const struct iovec *iov,
- unsigned long nr_segs, loff_t pos);
+extern ssize_t blkdev_write_iter(struct kiocb *iocb, struct iov_iter *from);
extern int blkdev_fsync(struct file *filp, loff_t start, loff_t end,
int datasync);
extern void block_sync_page(struct page *page);
@@ -2427,7 +2432,7 @@ extern ssize_t generic_file_splice_read(struct file *, loff_t *,
struct pipe_inode_info *, size_t, unsigned int);
extern ssize_t default_file_splice_read(struct file *, loff_t *,
struct pipe_inode_info *, size_t, unsigned int);
-extern ssize_t generic_file_splice_write(struct pipe_inode_info *,
+extern ssize_t iter_file_splice_write(struct pipe_inode_info *,
struct file *, loff_t *, size_t, unsigned int);
extern ssize_t generic_splice_sendpage(struct pipe_inode_info *pipe,
struct file *out, loff_t *, size_t len, unsigned int flags);
@@ -2477,16 +2482,16 @@ enum {
void dio_end_io(struct bio *bio, int error);
ssize_t __blockdev_direct_IO(int rw, struct kiocb *iocb, struct inode *inode,
- struct block_device *bdev, const struct iovec *iov, loff_t offset,
- unsigned long nr_segs, get_block_t get_block, dio_iodone_t end_io,
+ struct block_device *bdev, struct iov_iter *iter, loff_t offset,
+ get_block_t get_block, dio_iodone_t end_io,
dio_submit_t submit_io, int flags);
static inline ssize_t blockdev_direct_IO(int rw, struct kiocb *iocb,
- struct inode *inode, const struct iovec *iov, loff_t offset,
- unsigned long nr_segs, get_block_t get_block)
+ struct inode *inode, struct iov_iter *iter, loff_t offset,
+ get_block_t get_block)
{
- return __blockdev_direct_IO(rw, iocb, inode, inode->i_sb->s_bdev, iov,
- offset, nr_segs, get_block, NULL, NULL,
+ return __blockdev_direct_IO(rw, iocb, inode, inode->i_sb->s_bdev, iter,
+ offset, get_block, NULL, NULL,
DIO_LOCKING | DIO_SKIP_HOLES);
}
#endif
@@ -2590,6 +2595,7 @@ extern ssize_t simple_read_from_buffer(void __user *to, size_t count,
extern ssize_t simple_write_to_buffer(void *to, size_t available, loff_t *ppos,
const void __user *from, size_t count);
+extern int __generic_file_fsync(struct file *, loff_t, loff_t, int);
extern int generic_file_fsync(struct file *, loff_t, loff_t, int);
extern int generic_check_addressable(unsigned, u64);
diff --git a/include/linux/ftrace.h b/include/linux/ftrace.h
index ae9504b4b67d..404a686a3644 100644
--- a/include/linux/ftrace.h
+++ b/include/linux/ftrace.h
@@ -62,9 +62,6 @@ typedef void (*ftrace_func_t)(unsigned long ip, unsigned long parent_ip,
* set in the flags member.
*
* ENABLED - set/unset when ftrace_ops is registered/unregistered
- * GLOBAL - set manualy by ftrace_ops user to denote the ftrace_ops
- * is part of the global tracers sharing the same filter
- * via set_ftrace_* debugfs files.
* DYNAMIC - set when ftrace_ops is registered to denote dynamically
* allocated ftrace_ops which need special care
* CONTROL - set manualy by ftrace_ops user to denote the ftrace_ops
@@ -96,15 +93,14 @@ typedef void (*ftrace_func_t)(unsigned long ip, unsigned long parent_ip,
*/
enum {
FTRACE_OPS_FL_ENABLED = 1 << 0,
- FTRACE_OPS_FL_GLOBAL = 1 << 1,
- FTRACE_OPS_FL_DYNAMIC = 1 << 2,
- FTRACE_OPS_FL_CONTROL = 1 << 3,
- FTRACE_OPS_FL_SAVE_REGS = 1 << 4,
- FTRACE_OPS_FL_SAVE_REGS_IF_SUPPORTED = 1 << 5,
- FTRACE_OPS_FL_RECURSION_SAFE = 1 << 6,
- FTRACE_OPS_FL_STUB = 1 << 7,
- FTRACE_OPS_FL_INITIALIZED = 1 << 8,
- FTRACE_OPS_FL_DELETED = 1 << 9,
+ FTRACE_OPS_FL_DYNAMIC = 1 << 1,
+ FTRACE_OPS_FL_CONTROL = 1 << 2,
+ FTRACE_OPS_FL_SAVE_REGS = 1 << 3,
+ FTRACE_OPS_FL_SAVE_REGS_IF_SUPPORTED = 1 << 4,
+ FTRACE_OPS_FL_RECURSION_SAFE = 1 << 5,
+ FTRACE_OPS_FL_STUB = 1 << 6,
+ FTRACE_OPS_FL_INITIALIZED = 1 << 7,
+ FTRACE_OPS_FL_DELETED = 1 << 8,
};
/*
@@ -366,14 +362,12 @@ enum {
* IGNORE - The function is already what we want it to be
* MAKE_CALL - Start tracing the function
* MODIFY_CALL - Stop saving regs for the function
- * MODIFY_CALL_REGS - Start saving regs for the function
* MAKE_NOP - Stop tracing the function
*/
enum {
FTRACE_UPDATE_IGNORE,
FTRACE_UPDATE_MAKE_CALL,
FTRACE_UPDATE_MODIFY_CALL,
- FTRACE_UPDATE_MODIFY_CALL_REGS,
FTRACE_UPDATE_MAKE_NOP,
};
@@ -404,6 +398,8 @@ int ftrace_update_record(struct dyn_ftrace *rec, int enable);
int ftrace_test_record(struct dyn_ftrace *rec, int enable);
void ftrace_run_stop_machine(int command);
unsigned long ftrace_location(unsigned long ip);
+unsigned long ftrace_get_addr_new(struct dyn_ftrace *rec);
+unsigned long ftrace_get_addr_curr(struct dyn_ftrace *rec);
extern ftrace_func_t ftrace_trace_function;
@@ -616,25 +612,27 @@ static inline void __ftrace_enabled_restore(int enabled)
#endif
}
-#ifndef HAVE_ARCH_CALLER_ADDR
+/* All archs should have this, but we define it for consistency */
+#ifndef ftrace_return_address0
+# define ftrace_return_address0 __builtin_return_address(0)
+#endif
+
+/* Archs may use other ways for ADDR1 and beyond */
+#ifndef ftrace_return_address
# ifdef CONFIG_FRAME_POINTER
-# define CALLER_ADDR0 ((unsigned long)__builtin_return_address(0))
-# define CALLER_ADDR1 ((unsigned long)__builtin_return_address(1))
-# define CALLER_ADDR2 ((unsigned long)__builtin_return_address(2))
-# define CALLER_ADDR3 ((unsigned long)__builtin_return_address(3))
-# define CALLER_ADDR4 ((unsigned long)__builtin_return_address(4))
-# define CALLER_ADDR5 ((unsigned long)__builtin_return_address(5))
-# define CALLER_ADDR6 ((unsigned long)__builtin_return_address(6))
+# define ftrace_return_address(n) __builtin_return_address(n)
# else
-# define CALLER_ADDR0 ((unsigned long)__builtin_return_address(0))
-# define CALLER_ADDR1 0UL
-# define CALLER_ADDR2 0UL
-# define CALLER_ADDR3 0UL
-# define CALLER_ADDR4 0UL
-# define CALLER_ADDR5 0UL
-# define CALLER_ADDR6 0UL
+# define ftrace_return_address(n) 0UL
# endif
-#endif /* ifndef HAVE_ARCH_CALLER_ADDR */
+#endif
+
+#define CALLER_ADDR0 ((unsigned long)ftrace_return_address0)
+#define CALLER_ADDR1 ((unsigned long)ftrace_return_address(1))
+#define CALLER_ADDR2 ((unsigned long)ftrace_return_address(2))
+#define CALLER_ADDR3 ((unsigned long)ftrace_return_address(3))
+#define CALLER_ADDR4 ((unsigned long)ftrace_return_address(4))
+#define CALLER_ADDR5 ((unsigned long)ftrace_return_address(5))
+#define CALLER_ADDR6 ((unsigned long)ftrace_return_address(6))
#ifdef CONFIG_IRQSOFF_TRACER
extern void time_hardirqs_on(unsigned long a0, unsigned long a1);
diff --git a/include/linux/ftrace_event.h b/include/linux/ftrace_event.h
index d16da3e53bc7..cff3106ffe2c 100644
--- a/include/linux/ftrace_event.h
+++ b/include/linux/ftrace_event.h
@@ -38,6 +38,9 @@ const char *ftrace_print_symbols_seq_u64(struct trace_seq *p,
*symbol_array);
#endif
+const char *ftrace_print_bitmask_seq(struct trace_seq *p, void *bitmask_ptr,
+ unsigned int bitmask_size);
+
const char *ftrace_print_hex_seq(struct trace_seq *p,
const unsigned char *buf, int len);
diff --git a/include/linux/genhd.h b/include/linux/genhd.h
index 9f3c275e053e..ec274e0f4ed2 100644
--- a/include/linux/genhd.h
+++ b/include/linux/genhd.h
@@ -649,7 +649,7 @@ static inline void hd_ref_init(struct hd_struct *part)
static inline void hd_struct_get(struct hd_struct *part)
{
atomic_inc(&part->ref);
- smp_mb__after_atomic_inc();
+ smp_mb__after_atomic();
}
static inline int hd_struct_try_get(struct hd_struct *part)
diff --git a/include/linux/gfp.h b/include/linux/gfp.h
index 39b81dc7d01a..6eb1fb37de9a 100644
--- a/include/linux/gfp.h
+++ b/include/linux/gfp.h
@@ -6,7 +6,6 @@
#include <linux/stddef.h>
#include <linux/linkage.h>
#include <linux/topology.h>
-#include <linux/mmdebug.h>
struct vm_area_struct;
@@ -31,7 +30,6 @@ struct vm_area_struct;
#define ___GFP_HARDWALL 0x20000u
#define ___GFP_THISNODE 0x40000u
#define ___GFP_RECLAIMABLE 0x80000u
-#define ___GFP_KMEMCG 0x100000u
#define ___GFP_NOTRACK 0x200000u
#define ___GFP_NO_KSWAPD 0x400000u
#define ___GFP_OTHER_NODE 0x800000u
@@ -91,7 +89,6 @@ struct vm_area_struct;
#define __GFP_NO_KSWAPD ((__force gfp_t)___GFP_NO_KSWAPD)
#define __GFP_OTHER_NODE ((__force gfp_t)___GFP_OTHER_NODE) /* On behalf of other node */
-#define __GFP_KMEMCG ((__force gfp_t)___GFP_KMEMCG) /* Allocation comes from a memcg-accounted resource */
#define __GFP_WRITE ((__force gfp_t)___GFP_WRITE) /* Allocator intends to dirty page */
/*
@@ -353,6 +350,10 @@ extern struct page *alloc_pages_vma(gfp_t gfp_mask, int order,
#define alloc_page_vma_node(gfp_mask, vma, addr, node) \
alloc_pages_vma(gfp_mask, 0, vma, addr, node)
+extern struct page *alloc_kmem_pages(gfp_t gfp_mask, unsigned int order);
+extern struct page *alloc_kmem_pages_node(int nid, gfp_t gfp_mask,
+ unsigned int order);
+
extern unsigned long __get_free_pages(gfp_t gfp_mask, unsigned int order);
extern unsigned long get_zeroed_page(gfp_t gfp_mask);
@@ -369,11 +370,11 @@ void *alloc_pages_exact_nid(int nid, size_t size, gfp_t gfp_mask);
extern void __free_pages(struct page *page, unsigned int order);
extern void free_pages(unsigned long addr, unsigned int order);
-extern void free_hot_cold_page(struct page *page, int cold);
-extern void free_hot_cold_page_list(struct list_head *list, int cold);
+extern void free_hot_cold_page(struct page *page, bool cold);
+extern void free_hot_cold_page_list(struct list_head *list, bool cold);
-extern void __free_memcg_kmem_pages(struct page *page, unsigned int order);
-extern void free_memcg_kmem_pages(unsigned long addr, unsigned int order);
+extern void __free_kmem_pages(struct page *page, unsigned int order);
+extern void free_kmem_pages(unsigned long addr, unsigned int order);
#define __free_page(page) __free_pages((page), 0)
#define free_page(addr) free_pages((addr), 0)
diff --git a/include/linux/goldfish.h b/include/linux/goldfish.h
new file mode 100644
index 000000000000..569236e6b2bc
--- /dev/null
+++ b/include/linux/goldfish.h
@@ -0,0 +1,15 @@
+#ifndef __LINUX_GOLDFISH_H
+#define __LINUX_GOLDFISH_H
+
+/* Helpers for Goldfish virtual platform */
+
+static inline void gf_write64(unsigned long data,
+ void __iomem *portl, void __iomem *porth)
+{
+ writel((u32)data, portl);
+#ifdef CONFIG_64BIT
+ writel(data>>32, porth);
+#endif
+}
+
+#endif /* __LINUX_GOLDFISH_H */
diff --git a/include/linux/gpio/consumer.h b/include/linux/gpio/consumer.h
index bed128e8f4b1..05e53ccb708b 100644
--- a/include/linux/gpio/consumer.h
+++ b/include/linux/gpio/consumer.h
@@ -1,6 +1,7 @@
#ifndef __LINUX_GPIO_CONSUMER_H
#define __LINUX_GPIO_CONSUMER_H
+#include <linux/bug.h>
#include <linux/err.h>
#include <linux/kernel.h>
@@ -23,6 +24,12 @@ struct gpio_desc *__must_check gpiod_get(struct device *dev,
struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
const char *con_id,
unsigned int idx);
+struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
+ const char *con_id);
+struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
+ const char *con_id,
+ unsigned int index);
+
void gpiod_put(struct gpio_desc *desc);
struct gpio_desc *__must_check devm_gpiod_get(struct device *dev,
@@ -30,6 +37,12 @@ struct gpio_desc *__must_check devm_gpiod_get(struct device *dev,
struct gpio_desc *__must_check devm_gpiod_get_index(struct device *dev,
const char *con_id,
unsigned int idx);
+struct gpio_desc *__must_check devm_gpiod_get_optional(struct device *dev,
+ const char *con_id);
+struct gpio_desc *__must_check
+devm_gpiod_get_index_optional(struct device *dev, const char *con_id,
+ unsigned int index);
+
void devm_gpiod_put(struct device *dev, struct gpio_desc *desc);
int gpiod_get_direction(const struct gpio_desc *desc);
@@ -73,6 +86,20 @@ static inline struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
{
return ERR_PTR(-ENOSYS);
}
+
+static inline struct gpio_desc *__must_check
+gpiod_get_optional(struct device *dev, const char *con_id)
+{
+ return ERR_PTR(-ENOSYS);
+}
+
+static inline struct gpio_desc *__must_check
+gpiod_get_index_optional(struct device *dev, const char *con_id,
+ unsigned int index)
+{
+ return ERR_PTR(-ENOSYS);
+}
+
static inline void gpiod_put(struct gpio_desc *desc)
{
might_sleep();
@@ -93,6 +120,20 @@ struct gpio_desc *__must_check devm_gpiod_get_index(struct device *dev,
{
return ERR_PTR(-ENOSYS);
}
+
+static inline struct gpio_desc *__must_check
+devm_gpiod_get_optional(struct device *dev, const char *con_id)
+{
+ return ERR_PTR(-ENOSYS);
+}
+
+static inline struct gpio_desc *__must_check
+devm_gpiod_get_index_optional(struct device *dev, const char *con_id,
+ unsigned int index)
+{
+ return ERR_PTR(-ENOSYS);
+}
+
static inline void devm_gpiod_put(struct device *dev, struct gpio_desc *desc)
{
might_sleep();
diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h
index 1827b43966d9..573e4f3243d0 100644
--- a/include/linux/gpio/driver.h
+++ b/include/linux/gpio/driver.h
@@ -51,7 +51,10 @@ struct seq_file;
* format specifier for an unsigned int. It is substituted by the actual
* number of the gpio.
* @can_sleep: flag must be set iff get()/set() methods sleep, as they
- * must while accessing GPIO expander chips over I2C or SPI
+ * must while accessing GPIO expander chips over I2C or SPI. This
+ * implies that if the chip supports IRQs, these IRQs need to be threaded
+ * as the chip access may sleep when e.g. reading out the IRQ status
+ * registers.
* @exported: flags if the gpiochip is exported for use from sysfs. Private.
*
* A gpio_chip can help platforms abstract various sources of GPIOs so
diff --git a/include/linux/gpio_keys.h b/include/linux/gpio_keys.h
index a7e977ff4abf..8b622468952c 100644
--- a/include/linux/gpio_keys.h
+++ b/include/linux/gpio_keys.h
@@ -3,29 +3,53 @@
struct device;
+/**
+ * struct gpio_keys_button - configuration parameters
+ * @code: input event code (KEY_*, SW_*)
+ * @gpio: %-1 if this key does not support gpio
+ * @active_low: %true indicates that button is considered
+ * depressed when gpio is low
+ * @desc: label that will be attached to button's gpio
+ * @type: input event type (%EV_KEY, %EV_SW, %EV_ABS)
+ * @wakeup: configure the button as a wake-up source
+ * @debounce_interval: debounce ticks interval in msecs
+ * @can_disable: %true indicates that userspace is allowed to
+ * disable button via sysfs
+ * @value: axis value for %EV_ABS
+ * @irq: Irq number in case of interrupt keys
+ */
struct gpio_keys_button {
- /* Configuration parameters */
- unsigned int code; /* input event code (KEY_*, SW_*) */
- int gpio; /* -1 if this key does not support gpio */
+ unsigned int code;
+ int gpio;
int active_low;
const char *desc;
- unsigned int type; /* input event type (EV_KEY, EV_SW, EV_ABS) */
- int wakeup; /* configure the button as a wake-up source */
- int debounce_interval; /* debounce ticks interval in msecs */
+ unsigned int type;
+ int wakeup;
+ int debounce_interval;
bool can_disable;
- int value; /* axis value for EV_ABS */
- unsigned int irq; /* Irq number in case of interrupt keys */
+ int value;
+ unsigned int irq;
};
+/**
+ * struct gpio_keys_platform_data - platform data for gpio_keys driver
+ * @buttons: pointer to array of &gpio_keys_button structures
+ * describing buttons attached to the device
+ * @nbuttons: number of elements in @buttons array
+ * @poll_interval: polling interval in msecs - for polling driver only
+ * @rep: enable input subsystem auto repeat
+ * @enable: platform hook for enabling the device
+ * @disable: platform hook for disabling the device
+ * @name: input device name
+ */
struct gpio_keys_platform_data {
struct gpio_keys_button *buttons;
int nbuttons;
- unsigned int poll_interval; /* polling interval in msecs -
- for polling driver only */
- unsigned int rep:1; /* enable input subsystem auto repeat */
+ unsigned int poll_interval;
+ unsigned int rep:1;
int (*enable)(struct device *dev);
void (*disable)(struct device *dev);
- const char *name; /* input device name */
+ const char *name;
};
#endif
diff --git a/include/linux/hid-sensor-hub.h b/include/linux/hid-sensor-hub.h
index b70cfd7ff29c..51f7ccadf923 100644
--- a/include/linux/hid-sensor-hub.h
+++ b/include/linux/hid-sensor-hub.h
@@ -189,7 +189,7 @@ struct hid_sensor_common {
struct hid_sensor_hub_device *hsdev;
struct platform_device *pdev;
unsigned usage_id;
- bool data_ready;
+ atomic_t data_ready;
struct iio_trigger *trigger;
struct hid_sensor_hub_attribute_info poll;
struct hid_sensor_hub_attribute_info report_state;
@@ -223,4 +223,10 @@ int hid_sensor_read_samp_freq_value(struct hid_sensor_common *st,
int hid_sensor_get_usage_index(struct hid_sensor_hub_device *hsdev,
u32 report_id, int field_index, u32 usage_id);
+int hid_sensor_format_scale(u32 usage_id,
+ struct hid_sensor_hub_attribute_info *attr_info,
+ int *val0, int *val1);
+
+s32 hid_sensor_read_poll_value(struct hid_sensor_common *st);
+
#endif
diff --git a/include/linux/hid-sensor-ids.h b/include/linux/hid-sensor-ids.h
index 14ead9e8eda8..109f0e633e01 100644
--- a/include/linux/hid-sensor-ids.h
+++ b/include/linux/hid-sensor-ids.h
@@ -76,6 +76,7 @@
#define HID_USAGE_SENSOR_ORIENT_TILT_Y 0x200480
#define HID_USAGE_SENSOR_ORIENT_TILT_Z 0x200481
+#define HID_USAGE_SENSOR_DEVICE_ORIENTATION 0x20008A
#define HID_USAGE_SENSOR_ORIENT_ROTATION_MATRIX 0x200482
#define HID_USAGE_SENSOR_ORIENT_QUATERNION 0x200483
#define HID_USAGE_SENSOR_ORIENT_MAGN_FLUX 0x200484
diff --git a/include/linux/hid.h b/include/linux/hid.h
index 720e3a10608c..77632cf159c0 100644
--- a/include/linux/hid.h
+++ b/include/linux/hid.h
@@ -233,11 +233,6 @@ struct hid_item {
#define HID_DG_BARRELSWITCH 0x000d0044
#define HID_DG_ERASER 0x000d0045
#define HID_DG_TABLETPICK 0x000d0046
-/*
- * as of May 20, 2009 the usages below are not yet in the official USB spec
- * but are being pushed by Microsft as described in their paper "Digitizer
- * Drivers for Windows Touch and Pen-Based Computers"
- */
#define HID_DG_CONFIDENCE 0x000d0047
#define HID_DG_WIDTH 0x000d0048
#define HID_DG_HEIGHT 0x000d0049
@@ -246,6 +241,8 @@ struct hid_item {
#define HID_DG_DEVICEINDEX 0x000d0053
#define HID_DG_CONTACTCOUNT 0x000d0054
#define HID_DG_CONTACTMAX 0x000d0055
+#define HID_DG_BARRELSWITCH2 0x000d005a
+#define HID_DG_TOOLSERIALNUMBER 0x000d005b
/*
* HID report types --- Ouch! HID spec says 1 2 3!
@@ -299,6 +296,9 @@ struct hid_item {
/*
* HID device groups
+ *
+ * Note: HID_GROUP_ANY is declared in linux/mod_devicetable.h
+ * and has a value of 0x0000
*/
#define HID_GROUP_GENERIC 0x0001
#define HID_GROUP_MULTITOUCH 0x0002
@@ -306,6 +306,11 @@ struct hid_item {
#define HID_GROUP_MULTITOUCH_WIN_8 0x0004
/*
+ * Vendor specific HID device groups
+ */
+#define HID_GROUP_RMI 0x0100
+
+/*
* This is the global environment of the parser. This information is
* persistent for main-items. The global environment can be saved and
* restored with PUSH/POP statements.
@@ -570,6 +575,8 @@ struct hid_descriptor {
.bus = BUS_USB, .vendor = (ven), .product = (prod)
#define HID_BLUETOOTH_DEVICE(ven, prod) \
.bus = BUS_BLUETOOTH, .vendor = (ven), .product = (prod)
+#define HID_I2C_DEVICE(ven, prod) \
+ .bus = BUS_I2C, .vendor = (ven), .product = (prod)
#define HID_REPORT_ID(rep) \
.report_type = (rep)
diff --git a/include/linux/hsi/hsi.h b/include/linux/hsi/hsi.h
index 39bfd5b89077..3ec06300d535 100644
--- a/include/linux/hsi/hsi.h
+++ b/include/linux/hsi/hsi.h
@@ -68,17 +68,31 @@ enum {
};
/**
+ * struct hsi_channel - channel resource used by the hsi clients
+ * @id: Channel number
+ * @name: Channel name
+ */
+struct hsi_channel {
+ unsigned int id;
+ const char *name;
+};
+
+/**
* struct hsi_config - Configuration for RX/TX HSI modules
* @mode: Bit transmission mode (STREAM or FRAME)
- * @channels: Number of channels to use [1..16]
+ * @channels: Channel resources used by the client
+ * @num_channels: Number of channel resources
+ * @num_hw_channels: Number of channels the transceiver is configured for [1..16]
* @speed: Max bit transmission speed (Kbit/s)
* @flow: RX flow type (SYNCHRONIZED or PIPELINE)
* @arb_mode: Arbitration mode for TX frame (Round robin, priority)
*/
struct hsi_config {
- unsigned int mode;
- unsigned int channels;
- unsigned int speed;
+ unsigned int mode;
+ struct hsi_channel *channels;
+ unsigned int num_channels;
+ unsigned int num_hw_channels;
+ unsigned int speed;
union {
unsigned int flow; /* RX only */
unsigned int arb_mode; /* TX only */
@@ -282,6 +296,21 @@ struct hsi_controller *hsi_alloc_controller(unsigned int n_ports, gfp_t flags);
void hsi_put_controller(struct hsi_controller *hsi);
int hsi_register_controller(struct hsi_controller *hsi);
void hsi_unregister_controller(struct hsi_controller *hsi);
+struct hsi_client *hsi_new_client(struct hsi_port *port,
+ struct hsi_board_info *info);
+int hsi_remove_client(struct device *dev, void *data);
+void hsi_port_unregister_clients(struct hsi_port *port);
+
+#ifdef CONFIG_OF
+void hsi_add_clients_from_dt(struct hsi_port *port,
+ struct device_node *clients);
+#else
+static inline void hsi_add_clients_from_dt(struct hsi_port *port,
+ struct device_node *clients)
+{
+ return;
+}
+#endif
static inline void hsi_controller_set_drvdata(struct hsi_controller *hsi,
void *data)
@@ -305,6 +334,8 @@ static inline struct hsi_port *hsi_find_port_num(struct hsi_controller *hsi,
*/
int hsi_async(struct hsi_client *cl, struct hsi_msg *msg);
+int hsi_get_channel_id_by_name(struct hsi_client *cl, char *name);
+
/**
* hsi_id - Get HSI controller ID associated to a client
* @cl: Pointer to a HSI client
diff --git a/include/linux/hsi/ssi_protocol.h b/include/linux/hsi/ssi_protocol.h
new file mode 100644
index 000000000000..1433651be0dc
--- /dev/null
+++ b/include/linux/hsi/ssi_protocol.h
@@ -0,0 +1,42 @@
+/*
+ * ssip_slave.h
+ *
+ * SSIP slave support header file
+ *
+ * Copyright (C) 2010 Nokia Corporation. All rights reserved.
+ *
+ * Contact: Carlos Chinea <carlos.chinea@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ */
+
+#ifndef __LINUX_SSIP_SLAVE_H__
+#define __LINUX_SSIP_SLAVE_H__
+
+#include <linux/hsi/hsi.h>
+
+static inline void ssip_slave_put_master(struct hsi_client *master)
+{
+}
+
+struct hsi_client *ssip_slave_get_master(struct hsi_client *slave);
+int ssip_slave_start_tx(struct hsi_client *master);
+int ssip_slave_stop_tx(struct hsi_client *master);
+void ssip_reset_event(struct hsi_client *master);
+
+int ssip_slave_running(struct hsi_client *master);
+
+#endif /* __LINUX_SSIP_SLAVE_H__ */
+
diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h
index 5b337cf8fb86..255cd5cc0754 100644
--- a/include/linux/hugetlb.h
+++ b/include/linux/hugetlb.h
@@ -343,6 +343,11 @@ static inline unsigned huge_page_shift(struct hstate *h)
return h->order + PAGE_SHIFT;
}
+static inline bool hstate_is_gigantic(struct hstate *h)
+{
+ return huge_page_order(h) >= MAX_ORDER;
+}
+
static inline unsigned int pages_per_huge_page(struct hstate *h)
{
return 1 << h->order;
@@ -392,15 +397,13 @@ static inline pgoff_t basepage_index(struct page *page)
extern void dissolve_free_huge_pages(unsigned long start_pfn,
unsigned long end_pfn);
-int pmd_huge_support(void);
-/*
- * Currently hugepage migration is enabled only for pmd-based hugepage.
- * This function will be updated when hugepage migration is more widely
- * supported.
- */
-static inline int hugepage_migration_support(struct hstate *h)
+static inline int hugepage_migration_supported(struct hstate *h)
{
- return pmd_huge_support() && (huge_page_shift(h) == PMD_SHIFT);
+#ifdef CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION
+ return huge_page_shift(h) == PMD_SHIFT;
+#else
+ return 0;
+#endif
}
static inline spinlock_t *huge_pte_lockptr(struct hstate *h,
@@ -412,6 +415,16 @@ static inline spinlock_t *huge_pte_lockptr(struct hstate *h,
return &mm->page_table_lock;
}
+static inline bool hugepages_supported(void)
+{
+ /*
+ * Some platform decide whether they support huge pages at boot
+ * time. On these, such as powerpc, HPAGE_SHIFT is set to 0 when
+ * there is no such support
+ */
+ return HPAGE_SHIFT != 0;
+}
+
#else /* CONFIG_HUGETLB_PAGE */
struct hstate {};
#define alloc_huge_page_node(h, nid) NULL
@@ -440,8 +453,7 @@ static inline pgoff_t basepage_index(struct page *page)
return page->index;
}
#define dissolve_free_huge_pages(s, e) do {} while (0)
-#define pmd_huge_support() 0
-#define hugepage_migration_support(h) 0
+#define hugepage_migration_supported(h) 0
static inline spinlock_t *huge_pte_lockptr(struct hstate *h,
struct mm_struct *mm, pte_t *pte)
diff --git a/include/linux/hyperv.h b/include/linux/hyperv.h
index 2d7b4f139c32..08cfaff8a072 100644
--- a/include/linux/hyperv.h
+++ b/include/linux/hyperv.h
@@ -696,6 +696,8 @@ struct vmbus_channel {
* preserve the earlier behavior.
*/
u32 target_vp;
+ /* The corresponding CPUID in the guest */
+ u32 target_cpu;
/*
* Support for sub-channels. For high performance devices,
* it will be useful to have multiple sub-channels to support
@@ -732,6 +734,11 @@ struct vmbus_channel {
* Support per-channel state for use by vmbus drivers.
*/
void *per_channel_state;
+ /*
+ * To support per-cpu lookup mapping of relid to channel,
+ * link up channels based on their CPU affinity.
+ */
+ struct list_head percpu_list;
};
static inline void set_channel_read_state(struct vmbus_channel *c, bool state)
diff --git a/include/linux/i2c/atmel_mxt_ts.h b/include/linux/i2c/atmel_mxt_ts.h
index 99e379b74398..3891dc1de21c 100644
--- a/include/linux/i2c/atmel_mxt_ts.h
+++ b/include/linux/i2c/atmel_mxt_ts.h
@@ -15,35 +15,14 @@
#include <linux/types.h>
-/* For key_map array */
-#define MXT_NUM_GPIO 4
-
-/* Orient */
-#define MXT_NORMAL 0x0
-#define MXT_DIAGONAL 0x1
-#define MXT_HORIZONTAL_FLIP 0x2
-#define MXT_ROTATED_90_COUNTER 0x3
-#define MXT_VERTICAL_FLIP 0x4
-#define MXT_ROTATED_90 0x5
-#define MXT_ROTATED_180 0x6
-#define MXT_DIAGONAL_COUNTER 0x7
-
/* The platform data for the Atmel maXTouch touchscreen driver */
struct mxt_platform_data {
const u8 *config;
size_t config_length;
-
- unsigned int x_line;
- unsigned int y_line;
- unsigned int x_size;
- unsigned int y_size;
- unsigned int blen;
- unsigned int threshold;
- unsigned int voltage;
- unsigned char orient;
+ u32 config_crc;
unsigned long irqflags;
- bool is_tp;
- const unsigned int key_map[MXT_NUM_GPIO];
+ u8 t19_num_keys;
+ const unsigned int *t19_keymap;
};
#endif /* __LINUX_ATMEL_MXT_TS_H */
diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h
index d2b16704624c..8cfb50f38529 100644
--- a/include/linux/i2c/twl.h
+++ b/include/linux/i2c/twl.h
@@ -498,7 +498,10 @@ static inline int twl6030_mmc_card_detect(struct device *dev, int slot)
#define RES_GRP_ALL 0x7 /* All resource groups */
#define RES_TYPE2_R0 0x0
+#define RES_TYPE2_R1 0x1
+#define RES_TYPE2_R2 0x2
+#define RES_TYPE_R0 0x0
#define RES_TYPE_ALL 0x7
/* Resource states */
@@ -671,6 +674,7 @@ struct twl4030_power_data {
struct twl4030_script **scripts;
unsigned num;
struct twl4030_resconfig *resource_config;
+ struct twl4030_resconfig *board_config;
#define TWL4030_RESCONFIG_UNDEF ((u8)-1)
bool use_poweroff; /* Board is wired for TWL poweroff */
};
diff --git a/include/linux/idr.h b/include/linux/idr.h
index 6af3400b9b2f..013fd9bc4cb6 100644
--- a/include/linux/idr.h
+++ b/include/linux/idr.h
@@ -29,21 +29,24 @@
struct idr_layer {
int prefix; /* the ID prefix of this idr_layer */
- DECLARE_BITMAP(bitmap, IDR_SIZE); /* A zero bit means "space here" */
+ int layer; /* distance from leaf */
struct idr_layer __rcu *ary[1<<IDR_BITS];
int count; /* When zero, we can release it */
- int layer; /* distance from leaf */
- struct rcu_head rcu_head;
+ union {
+ /* A zero bit means "space here" */
+ DECLARE_BITMAP(bitmap, IDR_SIZE);
+ struct rcu_head rcu_head;
+ };
};
struct idr {
struct idr_layer __rcu *hint; /* the last layer allocated from */
struct idr_layer __rcu *top;
- struct idr_layer *id_free;
int layers; /* only valid w/o concurrent changes */
- int id_free_cnt;
int cur; /* current pos for cyclic allocation */
spinlock_t lock;
+ int id_free_cnt;
+ struct idr_layer *id_free;
};
#define IDR_INIT(name) \
diff --git a/include/linux/if_macvlan.h b/include/linux/if_macvlan.h
index 7c8b20b120ea..a9a53b12397b 100644
--- a/include/linux/if_macvlan.h
+++ b/include/linux/if_macvlan.h
@@ -56,6 +56,7 @@ struct macvlan_dev {
int numqueues;
netdev_features_t tap_features;
int minor;
+ int nest_level;
};
static inline void macvlan_count_rx(const struct macvlan_dev *vlan,
diff --git a/include/linux/if_team.h b/include/linux/if_team.h
index a899dc24be15..a6aa970758a2 100644
--- a/include/linux/if_team.h
+++ b/include/linux/if_team.h
@@ -194,6 +194,7 @@ struct team {
bool user_carrier_enabled;
bool queue_override_enabled;
struct list_head *qom_lists; /* array of queue override mapping lists */
+ bool port_mtu_change_allowed;
struct {
unsigned int count;
unsigned int interval; /* in ms */
diff --git a/include/linux/if_vlan.h b/include/linux/if_vlan.h
index 13bbbde00e68..b2acc4a1b13c 100644
--- a/include/linux/if_vlan.h
+++ b/include/linux/if_vlan.h
@@ -73,7 +73,7 @@ static inline struct vlan_ethhdr *vlan_eth_hdr(const struct sk_buff *skb)
/* found in socket.c */
extern void vlan_ioctl_set(int (*hook)(struct net *, void __user *));
-static inline int is_vlan_dev(struct net_device *dev)
+static inline bool is_vlan_dev(struct net_device *dev)
{
return dev->priv_flags & IFF_802_1Q_VLAN;
}
@@ -159,6 +159,7 @@ struct vlan_dev_priv {
#ifdef CONFIG_NET_POLL_CONTROLLER
struct netpoll *netpoll;
#endif
+ unsigned int nest_level;
};
static inline struct vlan_dev_priv *vlan_dev_priv(const struct net_device *dev)
@@ -197,6 +198,12 @@ extern void vlan_vids_del_by_dev(struct net_device *dev,
const struct net_device *by_dev);
extern bool vlan_uses_dev(const struct net_device *dev);
+
+static inline int vlan_get_encap_level(struct net_device *dev)
+{
+ BUG_ON(!is_vlan_dev(dev));
+ return vlan_dev_priv(dev)->nest_level;
+}
#else
static inline struct net_device *
__vlan_find_dev_deep(struct net_device *real_dev,
@@ -263,6 +270,11 @@ static inline bool vlan_uses_dev(const struct net_device *dev)
{
return false;
}
+static inline int vlan_get_encap_level(struct net_device *dev)
+{
+ BUG();
+ return 0;
+}
#endif
static inline bool vlan_hw_offload_capable(netdev_features_t features,
@@ -483,4 +495,5 @@ static inline void vlan_set_encap_proto(struct sk_buff *skb,
*/
skb->protocol = htons(ETH_P_802_2);
}
+
#endif /* !(_LINUX_IF_VLAN_H_) */
diff --git a/include/linux/iio/common/st_sensors.h b/include/linux/iio/common/st_sensors.h
index 3c005eb3a0a4..96f51f0e0096 100644
--- a/include/linux/iio/common/st_sensors.h
+++ b/include/linux/iio/common/st_sensors.h
@@ -269,6 +269,10 @@ int st_sensors_set_enable(struct iio_dev *indio_dev, bool enable);
int st_sensors_set_axis_enable(struct iio_dev *indio_dev, u8 axis_enable);
+void st_sensors_power_enable(struct iio_dev *indio_dev);
+
+void st_sensors_power_disable(struct iio_dev *indio_dev);
+
int st_sensors_set_odr(struct iio_dev *indio_dev, unsigned int odr);
int st_sensors_set_dataready_irq(struct iio_dev *indio_dev, bool enable);
diff --git a/include/linux/iio/consumer.h b/include/linux/iio/consumer.h
index 2752b1fd12be..651f9a0e2765 100644
--- a/include/linux/iio/consumer.h
+++ b/include/linux/iio/consumer.h
@@ -123,6 +123,19 @@ int iio_read_channel_raw(struct iio_channel *chan,
int *val);
/**
+ * iio_read_channel_average_raw() - read from a given channel
+ * @chan: The channel being queried.
+ * @val: Value read back.
+ *
+ * Note raw reads from iio channels are in adc counts and hence
+ * scale will need to be applied if standard units required.
+ *
+ * In opposit to the normal iio_read_channel_raw this function
+ * returns the average of multiple reads.
+ */
+int iio_read_channel_average_raw(struct iio_channel *chan, int *val);
+
+/**
* iio_read_channel_processed() - read processed value from a given channel
* @chan: The channel being queried.
* @val: Value read back.
diff --git a/include/linux/iio/iio.h b/include/linux/iio/iio.h
index 5f2d00e7e488..ccde91725f98 100644
--- a/include/linux/iio/iio.h
+++ b/include/linux/iio/iio.h
@@ -177,6 +177,12 @@ struct iio_event_spec {
* shift: Shift right by this before masking out
* realbits.
* endianness: little or big endian
+ * repeat: Number of times real/storage bits
+ * repeats. When the repeat element is
+ * more than 1, then the type element in
+ * sysfs will show a repeat value.
+ * Otherwise, the number of repetitions is
+ * omitted.
* @info_mask_separate: What information is to be exported that is specific to
* this channel.
* @info_mask_shared_by_type: What information is to be exported that is shared
@@ -219,6 +225,7 @@ struct iio_chan_spec {
u8 realbits;
u8 storagebits;
u8 shift;
+ u8 repeat;
enum iio_endian endianness;
} scan_type;
long info_mask_separate;
@@ -288,6 +295,8 @@ static inline s64 iio_get_time_ns(void)
#define INDIO_ALL_BUFFER_MODES \
(INDIO_BUFFER_TRIGGERED | INDIO_BUFFER_HARDWARE)
+#define INDIO_MAX_RAW_ELEMENTS 4
+
struct iio_trigger; /* forward declaration */
struct iio_dev;
@@ -302,6 +311,14 @@ struct iio_dev;
* the channel in question. Return value will specify the
* type of value returned by the device. val and val2 will
* contain the elements making up the returned value.
+ * @read_raw_multi: function to return values from the device.
+ * mask specifies which value. Note 0 means a reading of
+ * the channel in question. Return value will specify the
+ * type of value returned by the device. vals pointer
+ * contain the elements making up the returned value.
+ * max_len specifies maximum number of elements
+ * vals pointer can contain. val_len is used to return
+ * length of valid elements in vals.
* @write_raw: function to write a value to the device.
* Parameters are the same as for read_raw.
* @write_raw_get_fmt: callback function to query the expected
@@ -328,6 +345,13 @@ struct iio_info {
int *val2,
long mask);
+ int (*read_raw_multi)(struct iio_dev *indio_dev,
+ struct iio_chan_spec const *chan,
+ int max_len,
+ int *vals,
+ int *val_len,
+ long mask);
+
int (*write_raw)(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val,
diff --git a/include/linux/iio/types.h b/include/linux/iio/types.h
index 084d882fe01b..d480631eabc2 100644
--- a/include/linux/iio/types.h
+++ b/include/linux/iio/types.h
@@ -53,6 +53,9 @@ enum iio_modifier {
IIO_MOD_LIGHT_RED,
IIO_MOD_LIGHT_GREEN,
IIO_MOD_LIGHT_BLUE,
+ IIO_MOD_QUATERNION,
+ IIO_MOD_TEMP_AMBIENT,
+ IIO_MOD_TEMP_OBJECT,
};
enum iio_event_type {
@@ -79,6 +82,7 @@ enum iio_event_direction {
#define IIO_VAL_INT_PLUS_MICRO 2
#define IIO_VAL_INT_PLUS_NANO 3
#define IIO_VAL_INT_PLUS_MICRO_DB 4
+#define IIO_VAL_INT_MULTIPLE 5
#define IIO_VAL_FRACTIONAL 10
#define IIO_VAL_FRACTIONAL_LOG2 11
diff --git a/include/linux/init.h b/include/linux/init.h
index a3ba27076342..2df8e8dd10a4 100644
--- a/include/linux/init.h
+++ b/include/linux/init.h
@@ -297,16 +297,28 @@ void __init parse_early_options(char *cmdline);
#else /* MODULE */
-/* Don't use these in loadable modules, but some people do... */
+/*
+ * In most cases loadable modules do not need custom
+ * initcall levels. There are still some valid cases where
+ * a driver may be needed early if built in, and does not
+ * matter when built as a loadable module. Like bus
+ * snooping debug drivers.
+ */
#define early_initcall(fn) module_init(fn)
#define core_initcall(fn) module_init(fn)
+#define core_initcall_sync(fn) module_init(fn)
#define postcore_initcall(fn) module_init(fn)
+#define postcore_initcall_sync(fn) module_init(fn)
#define arch_initcall(fn) module_init(fn)
#define subsys_initcall(fn) module_init(fn)
+#define subsys_initcall_sync(fn) module_init(fn)
#define fs_initcall(fn) module_init(fn)
+#define fs_initcall_sync(fn) module_init(fn)
#define rootfs_initcall(fn) module_init(fn)
#define device_initcall(fn) module_init(fn)
+#define device_initcall_sync(fn) module_init(fn)
#define late_initcall(fn) module_init(fn)
+#define late_initcall_sync(fn) module_init(fn)
#define console_initcall(fn) module_init(fn)
#define security_initcall(fn) module_init(fn)
diff --git a/include/linux/input-polldev.h b/include/linux/input-polldev.h
index ce0b72464eb8..2465182670db 100644
--- a/include/linux/input-polldev.h
+++ b/include/linux/input-polldev.h
@@ -48,9 +48,12 @@ struct input_polled_dev {
/* private: */
struct delayed_work work;
+
+ bool devres_managed;
};
struct input_polled_dev *input_allocate_polled_device(void);
+struct input_polled_dev *devm_input_allocate_polled_device(struct device *dev);
void input_free_polled_device(struct input_polled_dev *dev);
int input_register_polled_device(struct input_polled_dev *dev);
void input_unregister_polled_device(struct input_polled_dev *dev);
diff --git a/include/linux/input/pixcir_ts.h b/include/linux/input/pixcir_ts.h
index 7163d91c0373..160cf353aa39 100644
--- a/include/linux/input/pixcir_ts.h
+++ b/include/linux/input/pixcir_ts.h
@@ -1,10 +1,52 @@
#ifndef _PIXCIR_I2C_TS_H
#define _PIXCIR_I2C_TS_H
+/*
+ * Register map
+ */
+#define PIXCIR_REG_POWER_MODE 51
+#define PIXCIR_REG_INT_MODE 52
+
+/*
+ * Power modes:
+ * active: max scan speed
+ * idle: lower scan speed with automatic transition to active on touch
+ * halt: datasheet says sleep but this is more like halt as the chip
+ * clocks are cut and it can only be brought out of this mode
+ * using the RESET pin.
+ */
+enum pixcir_power_mode {
+ PIXCIR_POWER_ACTIVE,
+ PIXCIR_POWER_IDLE,
+ PIXCIR_POWER_HALT,
+};
+
+#define PIXCIR_POWER_MODE_MASK 0x03
+#define PIXCIR_POWER_ALLOW_IDLE (1UL << 2)
+
+/*
+ * Interrupt modes:
+ * periodical: interrupt is asserted periodicaly
+ * diff coordinates: interrupt is asserted when coordinates change
+ * level on touch: interrupt level asserted during touch
+ * pulse on touch: interrupt pulse asserted druing touch
+ *
+ */
+enum pixcir_int_mode {
+ PIXCIR_INT_PERIODICAL,
+ PIXCIR_INT_DIFF_COORD,
+ PIXCIR_INT_LEVEL_TOUCH,
+ PIXCIR_INT_PULSE_TOUCH,
+};
+
+#define PIXCIR_INT_MODE_MASK 0x03
+#define PIXCIR_INT_ENABLE (1UL << 3)
+#define PIXCIR_INT_POL_HIGH (1UL << 2)
+
struct pixcir_ts_platform_data {
- int (*attb_read_val)(void);
int x_max;
int y_max;
+ int gpio_attb; /* GPIO connected to ATTB line */
};
#endif
diff --git a/include/linux/input/touchscreen.h b/include/linux/input/touchscreen.h
new file mode 100644
index 000000000000..08a5ef6e8f25
--- /dev/null
+++ b/include/linux/input/touchscreen.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (c) 2014 Sebastian Reichel <sre@kernel.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+
+#ifndef _TOUCHSCREEN_H
+#define _TOUCHSCREEN_H
+
+#include <linux/input.h>
+
+#ifdef CONFIG_OF
+void touchscreen_parse_of_params(struct input_dev *dev);
+#else
+static inline void touchscreen_parse_of_params(struct input_dev *dev)
+{
+}
+#endif
+
+#endif
diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h
index 97ac926c78a7..698ad053d064 100644
--- a/include/linux/interrupt.h
+++ b/include/linux/interrupt.h
@@ -199,6 +199,26 @@ extern int check_wakeup_irqs(void);
static inline int check_wakeup_irqs(void) { return 0; }
#endif
+/**
+ * struct irq_affinity_notify - context for notification of IRQ affinity changes
+ * @irq: Interrupt to which notification applies
+ * @kref: Reference count, for internal use
+ * @work: Work item, for internal use
+ * @notify: Function to be called on change. This will be
+ * called in process context.
+ * @release: Function to be called on release. This will be
+ * called in process context. Once registered, the
+ * structure must only be freed when this function is
+ * called or later.
+ */
+struct irq_affinity_notify {
+ unsigned int irq;
+ struct kref kref;
+ struct work_struct work;
+ void (*notify)(struct irq_affinity_notify *, const cpumask_t *mask);
+ void (*release)(struct kref *ref);
+};
+
#if defined(CONFIG_SMP)
extern cpumask_var_t irq_default_affinity;
@@ -242,26 +262,6 @@ extern int irq_select_affinity(unsigned int irq);
extern int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m);
-/**
- * struct irq_affinity_notify - context for notification of IRQ affinity changes
- * @irq: Interrupt to which notification applies
- * @kref: Reference count, for internal use
- * @work: Work item, for internal use
- * @notify: Function to be called on change. This will be
- * called in process context.
- * @release: Function to be called on release. This will be
- * called in process context. Once registered, the
- * structure must only be freed when this function is
- * called or later.
- */
-struct irq_affinity_notify {
- unsigned int irq;
- struct kref kref;
- struct work_struct work;
- void (*notify)(struct irq_affinity_notify *, const cpumask_t *mask);
- void (*release)(struct kref *ref);
-};
-
extern int
irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify);
@@ -272,6 +272,11 @@ static inline int irq_set_affinity(unsigned int irq, const struct cpumask *m)
return -EINVAL;
}
+static inline int irq_force_affinity(unsigned int irq, const struct cpumask *cpumask)
+{
+ return 0;
+}
+
static inline int irq_can_set_affinity(unsigned int irq)
{
return 0;
@@ -284,6 +289,12 @@ static inline int irq_set_affinity_hint(unsigned int irq,
{
return -EINVAL;
}
+
+static inline int
+irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify)
+{
+ return 0;
+}
#endif /* CONFIG_SMP */
/*
@@ -486,7 +497,7 @@ static inline int tasklet_trylock(struct tasklet_struct *t)
static inline void tasklet_unlock(struct tasklet_struct *t)
{
- smp_mb__before_clear_bit();
+ smp_mb__before_atomic();
clear_bit(TASKLET_STATE_RUN, &(t)->state);
}
@@ -534,7 +545,7 @@ static inline void tasklet_hi_schedule_first(struct tasklet_struct *t)
static inline void tasklet_disable_nosync(struct tasklet_struct *t)
{
atomic_inc(&t->count);
- smp_mb__after_atomic_inc();
+ smp_mb__after_atomic();
}
static inline void tasklet_disable(struct tasklet_struct *t)
@@ -546,13 +557,13 @@ static inline void tasklet_disable(struct tasklet_struct *t)
static inline void tasklet_enable(struct tasklet_struct *t)
{
- smp_mb__before_atomic_dec();
+ smp_mb__before_atomic();
atomic_dec(&t->count);
}
static inline void tasklet_hi_enable(struct tasklet_struct *t)
{
- smp_mb__before_atomic_dec();
+ smp_mb__before_atomic();
atomic_dec(&t->count);
}
diff --git a/include/linux/irq.h b/include/linux/irq.h
index 5c57efb863d0..0d998d8b01d8 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -525,24 +525,6 @@ static inline void irq_set_percpu_devid_flags(unsigned int irq)
IRQ_NOPROBE | IRQ_PER_CPU_DEVID);
}
-/* Handle dynamic irq creation and destruction */
-extern unsigned int create_irq_nr(unsigned int irq_want, int node);
-extern unsigned int __create_irqs(unsigned int from, unsigned int count,
- int node);
-extern int create_irq(void);
-extern void destroy_irq(unsigned int irq);
-extern void destroy_irqs(unsigned int irq, unsigned int count);
-
-/*
- * Dynamic irq helper functions. Obsolete. Use irq_alloc_desc* and
- * irq_free_desc instead.
- */
-extern void dynamic_irq_cleanup(unsigned int irq);
-static inline void dynamic_irq_init(unsigned int irq)
-{
- dynamic_irq_cleanup(irq);
-}
-
/* Set/get chip/data for an IRQ: */
extern int irq_set_chip(unsigned int irq, struct irq_chip *chip);
extern int irq_set_handler_data(unsigned int irq, void *data);
@@ -625,17 +607,29 @@ int __irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node,
irq_alloc_descs(-1, from, cnt, node)
void irq_free_descs(unsigned int irq, unsigned int cnt);
-int irq_reserve_irqs(unsigned int from, unsigned int cnt);
-
static inline void irq_free_desc(unsigned int irq)
{
irq_free_descs(irq, 1);
}
-static inline int irq_reserve_irq(unsigned int irq)
+#ifdef CONFIG_GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
+unsigned int irq_alloc_hwirqs(int cnt, int node);
+static inline unsigned int irq_alloc_hwirq(int node)
+{
+ return irq_alloc_hwirqs(1, node);
+}
+void irq_free_hwirqs(unsigned int from, int cnt);
+static inline void irq_free_hwirq(unsigned int irq)
{
- return irq_reserve_irqs(irq, 1);
+ return irq_free_hwirqs(irq, 1);
}
+int arch_setup_hwirq(unsigned int irq, int node);
+void arch_teardown_hwirq(unsigned int irq);
+#endif
+
+#ifdef CONFIG_GENERIC_IRQ_LEGACY
+void irq_init_desc(unsigned int irq);
+#endif
#ifndef irq_reg_writel
# define irq_reg_writel(val, addr) writel(val, addr)
diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h
index 7ed92d0560d5..45e2d8c15bd2 100644
--- a/include/linux/irqchip/arm-gic.h
+++ b/include/linux/irqchip/arm-gic.h
@@ -21,6 +21,8 @@
#define GIC_CPU_ACTIVEPRIO 0xd0
#define GIC_CPU_IDENT 0xfc
+#define GICC_IAR_INT_ID_MASK 0x3ff
+
#define GIC_DIST_CTRL 0x000
#define GIC_DIST_CTR 0x004
#define GIC_DIST_IGROUP 0x080
diff --git a/include/linux/irqdesc.h b/include/linux/irqdesc.h
index 26e2661d3935..472c021a2d4f 100644
--- a/include/linux/irqdesc.h
+++ b/include/linux/irqdesc.h
@@ -27,6 +27,8 @@ struct irq_desc;
* @irq_count: stats field to detect stalled irqs
* @last_unhandled: aging timer for unhandled count
* @irqs_unhandled: stats field for spurious unhandled interrupts
+ * @threads_handled: stats field for deferred spurious detection of threaded handlers
+ * @threads_handled_last: comparator field for deferred spurious detection of theraded handlers
* @lock: locking for SMP
* @affinity_hint: hint to user space for preferred irq affinity
* @affinity_notify: context for notification of affinity changes
@@ -52,6 +54,8 @@ struct irq_desc {
unsigned int irq_count; /* For detecting broken IRQs */
unsigned long last_unhandled; /* Aging timer for unhandled count */
unsigned int irqs_unhandled;
+ atomic_t threads_handled;
+ int threads_handled_last;
raw_spinlock_t lock;
struct cpumask *percpu_enabled;
#ifdef CONFIG_SMP
diff --git a/include/linux/jump_label.h b/include/linux/jump_label.h
index 5c1dfb2a9e73..784304b222b3 100644
--- a/include/linux/jump_label.h
+++ b/include/linux/jump_label.h
@@ -69,6 +69,10 @@ struct static_key {
# include <asm/jump_label.h>
# define HAVE_JUMP_LABEL
+#else
+struct static_key {
+ atomic_t enabled;
+};
#endif /* CC_HAVE_ASM_GOTO && CONFIG_JUMP_LABEL */
enum jump_label_type {
@@ -79,6 +83,12 @@ enum jump_label_type {
struct module;
#include <linux/atomic.h>
+
+static inline int static_key_count(struct static_key *key)
+{
+ return atomic_read(&key->enabled);
+}
+
#ifdef HAVE_JUMP_LABEL
#define JUMP_LABEL_TYPE_FALSE_BRANCH 0UL
@@ -134,10 +144,6 @@ extern void jump_label_apply_nops(struct module *mod);
#else /* !HAVE_JUMP_LABEL */
-struct static_key {
- atomic_t enabled;
-};
-
static __always_inline void jump_label_init(void)
{
static_key_initialized = true;
@@ -145,14 +151,14 @@ static __always_inline void jump_label_init(void)
static __always_inline bool static_key_false(struct static_key *key)
{
- if (unlikely(atomic_read(&key->enabled) > 0))
+ if (unlikely(static_key_count(key) > 0))
return true;
return false;
}
static __always_inline bool static_key_true(struct static_key *key)
{
- if (likely(atomic_read(&key->enabled) > 0))
+ if (likely(static_key_count(key) > 0))
return true;
return false;
}
@@ -194,7 +200,7 @@ static inline int jump_label_apply_nops(struct module *mod)
static inline bool static_key_enabled(struct static_key *key)
{
- return (atomic_read(&key->enabled) > 0);
+ return static_key_count(key) > 0;
}
#endif /* _LINUX_JUMP_LABEL_H */
diff --git a/include/linux/kernfs.h b/include/linux/kernfs.h
index b0122dc6f96a..17aa1cce6f8e 100644
--- a/include/linux/kernfs.h
+++ b/include/linux/kernfs.h
@@ -50,7 +50,24 @@ enum kernfs_node_flag {
/* @flags for kernfs_create_root() */
enum kernfs_root_flag {
- KERNFS_ROOT_CREATE_DEACTIVATED = 0x0001,
+ /*
+ * kernfs_nodes are created in the deactivated state and invisible.
+ * They require explicit kernfs_activate() to become visible. This
+ * can be used to make related nodes become visible atomically
+ * after all nodes are created successfully.
+ */
+ KERNFS_ROOT_CREATE_DEACTIVATED = 0x0001,
+
+ /*
+ * For regular flies, if the opener has CAP_DAC_OVERRIDE, open(2)
+ * succeeds regardless of the RW permissions. sysfs had an extra
+ * layer of enforcement where open(2) fails with -EACCES regardless
+ * of CAP_DAC_OVERRIDE if the permission doesn't have the
+ * respective read or write access at all (none of S_IRUGO or
+ * S_IWUGO) or the respective operation isn't implemented. The
+ * following flag enables that behavior.
+ */
+ KERNFS_ROOT_EXTRA_OPEN_PERM_CHECK = 0x0002,
};
/* type-specific structures for kernfs_node union members */
@@ -144,6 +161,10 @@ struct kernfs_root {
/* private fields, do not use outside kernfs proper */
struct ida ino_ida;
struct kernfs_syscall_ops *syscall_ops;
+
+ /* list of kernfs_super_info of this root, protected by kernfs_mutex */
+ struct list_head supers;
+
wait_queue_head_t deactivate_waitq;
};
@@ -280,8 +301,8 @@ void kernfs_notify(struct kernfs_node *kn);
const void *kernfs_super_ns(struct super_block *sb);
struct dentry *kernfs_mount_ns(struct file_system_type *fs_type, int flags,
- struct kernfs_root *root, bool *new_sb_created,
- const void *ns);
+ struct kernfs_root *root, unsigned long magic,
+ bool *new_sb_created, const void *ns);
void kernfs_kill_sb(struct super_block *sb);
void kernfs_init(void);
@@ -374,7 +395,8 @@ static inline const void *kernfs_super_ns(struct super_block *sb)
static inline struct dentry *
kernfs_mount_ns(struct file_system_type *fs_type, int flags,
- struct kernfs_root *root, bool *new_sb_created, const void *ns)
+ struct kernfs_root *root, unsigned long magic,
+ bool *new_sb_created, const void *ns)
{ return ERR_PTR(-ENOSYS); }
static inline void kernfs_kill_sb(struct super_block *sb) { }
@@ -432,9 +454,11 @@ static inline int kernfs_rename(struct kernfs_node *kn,
static inline struct dentry *
kernfs_mount(struct file_system_type *fs_type, int flags,
- struct kernfs_root *root, bool *new_sb_created)
+ struct kernfs_root *root, unsigned long magic,
+ bool *new_sb_created)
{
- return kernfs_mount_ns(fs_type, flags, root, new_sb_created, NULL);
+ return kernfs_mount_ns(fs_type, flags, root,
+ magic, new_sb_created, NULL);
}
#endif /* __LINUX_KERNFS_H */
diff --git a/include/linux/key.h b/include/linux/key.h
index 80d677483e31..017b0826642f 100644
--- a/include/linux/key.h
+++ b/include/linux/key.h
@@ -309,6 +309,17 @@ static inline key_serial_t key_serial(const struct key *key)
extern void key_set_timeout(struct key *, unsigned);
+/*
+ * The permissions required on a key that we're looking up.
+ */
+#define KEY_NEED_VIEW 0x01 /* Require permission to view attributes */
+#define KEY_NEED_READ 0x02 /* Require permission to read content */
+#define KEY_NEED_WRITE 0x04 /* Require permission to update / modify */
+#define KEY_NEED_SEARCH 0x08 /* Require permission to search (keyring) or find (key) */
+#define KEY_NEED_LINK 0x10 /* Require permission to link */
+#define KEY_NEED_SETATTR 0x20 /* Require permission to change attributes */
+#define KEY_NEED_ALL 0x3f /* All the above permissions */
+
/**
* key_is_instantiated - Determine if a key has been positively instantiated
* @key: The key to check.
@@ -332,7 +343,7 @@ do { \
} while (0)
#ifdef CONFIG_SYSCTL
-extern ctl_table key_sysctls[];
+extern struct ctl_table key_sysctls[];
#endif
/*
* the userspace interface
diff --git a/include/linux/kmemleak.h b/include/linux/kmemleak.h
index 5bb424659c04..057e95971014 100644
--- a/include/linux/kmemleak.h
+++ b/include/linux/kmemleak.h
@@ -30,6 +30,7 @@ extern void kmemleak_alloc_percpu(const void __percpu *ptr, size_t size) __ref;
extern void kmemleak_free(const void *ptr) __ref;
extern void kmemleak_free_part(const void *ptr, size_t size) __ref;
extern void kmemleak_free_percpu(const void __percpu *ptr) __ref;
+extern void kmemleak_update_trace(const void *ptr) __ref;
extern void kmemleak_not_leak(const void *ptr) __ref;
extern void kmemleak_ignore(const void *ptr) __ref;
extern void kmemleak_scan_area(const void *ptr, size_t size, gfp_t gfp) __ref;
@@ -83,6 +84,9 @@ static inline void kmemleak_free_recursive(const void *ptr, unsigned long flags)
static inline void kmemleak_free_percpu(const void __percpu *ptr)
{
}
+static inline void kmemleak_update_trace(const void *ptr)
+{
+}
static inline void kmemleak_not_leak(const void *ptr)
{
}
diff --git a/include/linux/kobject.h b/include/linux/kobject.h
index f896a33e8341..2d61b909f414 100644
--- a/include/linux/kobject.h
+++ b/include/linux/kobject.h
@@ -32,8 +32,10 @@
#define UEVENT_NUM_ENVP 32 /* number of env pointers */
#define UEVENT_BUFFER_SIZE 2048 /* buffer for the variables */
+#ifdef CONFIG_UEVENT_HELPER
/* path to the userspace helper executed on an event */
extern char uevent_helper[];
+#endif
/* counter to tag the uevent, read only except for the kobject core */
extern u64 uevent_seqnum;
diff --git a/include/linux/kprobes.h b/include/linux/kprobes.h
index 925eaf28fca9..7bd2ad01e39c 100644
--- a/include/linux/kprobes.h
+++ b/include/linux/kprobes.h
@@ -355,7 +355,7 @@ static inline void reset_current_kprobe(void)
static inline struct kprobe_ctlblk *get_kprobe_ctlblk(void)
{
- return (&__get_cpu_var(kprobe_ctlblk));
+ return this_cpu_ptr(&kprobe_ctlblk);
}
int register_kprobe(struct kprobe *p);
diff --git a/include/linux/kvm_host.h b/include/linux/kvm_host.h
index 7d21cf9f4380..970c68197c69 100644
--- a/include/linux/kvm_host.h
+++ b/include/linux/kvm_host.h
@@ -134,6 +134,8 @@ static inline bool is_error_page(struct page *page)
#define KVM_REQ_EPR_EXIT 20
#define KVM_REQ_SCAN_IOAPIC 21
#define KVM_REQ_GLOBAL_CLOCK_UPDATE 22
+#define KVM_REQ_ENABLE_IBS 23
+#define KVM_REQ_DISABLE_IBS 24
#define KVM_USERSPACE_IRQ_SOURCE_ID 0
#define KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID 1
@@ -163,6 +165,7 @@ enum kvm_bus {
KVM_MMIO_BUS,
KVM_PIO_BUS,
KVM_VIRTIO_CCW_NOTIFY_BUS,
+ KVM_FAST_MMIO_BUS,
KVM_NR_BUSES
};
@@ -367,6 +370,7 @@ struct kvm {
struct mm_struct *mm; /* userspace tied to this vm */
struct kvm_memslots *memslots;
struct srcu_struct srcu;
+ struct srcu_struct irq_srcu;
#ifdef CONFIG_KVM_APIC_ARCHITECTURE
u32 bsp_vcpu_id;
#endif
@@ -410,9 +414,7 @@ struct kvm {
unsigned long mmu_notifier_seq;
long mmu_notifier_count;
#endif
- /* Protected by mmu_lock */
- bool tlbs_dirty;
-
+ long tlbs_dirty;
struct list_head devices;
};
@@ -879,6 +881,13 @@ static inline hpa_t pfn_to_hpa(pfn_t pfn)
return (hpa_t)pfn << PAGE_SHIFT;
}
+static inline bool kvm_is_error_gpa(struct kvm *kvm, gpa_t gpa)
+{
+ unsigned long hva = gfn_to_hva(kvm, gpa_to_gfn(gpa));
+
+ return kvm_is_error_hva(hva);
+}
+
static inline void kvm_migrate_timers(struct kvm_vcpu *vcpu)
{
set_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests);
diff --git a/include/linux/linkage.h b/include/linux/linkage.h
index 34a513a2727b..a6a42dd02466 100644
--- a/include/linux/linkage.h
+++ b/include/linux/linkage.h
@@ -12,9 +12,9 @@
#endif
#ifdef __cplusplus
-#define CPP_ASMLINKAGE extern "C" __visible
+#define CPP_ASMLINKAGE extern "C"
#else
-#define CPP_ASMLINKAGE __visible
+#define CPP_ASMLINKAGE
#endif
#ifndef asmlinkage
diff --git a/include/linux/lockd/lockd.h b/include/linux/lockd/lockd.h
index dcaad79f54ed..219d79627c05 100644
--- a/include/linux/lockd/lockd.h
+++ b/include/linux/lockd/lockd.h
@@ -17,13 +17,13 @@
#include <linux/fs.h>
#include <linux/kref.h>
#include <linux/utsname.h>
-#include <linux/nfsd/nfsfh.h>
#include <linux/lockd/bind.h>
#include <linux/lockd/xdr.h>
#ifdef CONFIG_LOCKD_V4
#include <linux/lockd/xdr4.h>
#endif
#include <linux/lockd/debug.h>
+#include <linux/sunrpc/svc.h>
/*
* Version string
diff --git a/include/linux/mbus.h b/include/linux/mbus.h
index 345b8c53b897..550c88fb0267 100644
--- a/include/linux/mbus.h
+++ b/include/linux/mbus.h
@@ -73,6 +73,6 @@ int mvebu_mbus_del_window(phys_addr_t base, size_t size);
int mvebu_mbus_init(const char *soc, phys_addr_t mbus_phys_base,
size_t mbus_size, phys_addr_t sdram_phys_base,
size_t sdram_size);
-int mvebu_mbus_dt_init(void);
+int mvebu_mbus_dt_init(bool is_coherent);
#endif /* __LINUX_MBUS_H */
diff --git a/include/linux/mc146818rtc.h b/include/linux/mc146818rtc.h
index 2f4e957af656..433e0c74d643 100644
--- a/include/linux/mc146818rtc.h
+++ b/include/linux/mc146818rtc.h
@@ -31,6 +31,10 @@ struct cmos_rtc_board_info {
void (*wake_on)(struct device *dev);
void (*wake_off)(struct device *dev);
+ u32 flags;
+#define CMOS_RTC_FLAGS_NOFREQ (1 << 0)
+ int address_space;
+
u8 rtc_day_alarm; /* zero, or register index */
u8 rtc_mon_alarm; /* zero, or register index */
u8 rtc_century; /* zero, or register index */
diff --git a/include/linux/mcb.h b/include/linux/mcb.h
index 2db284d14064..ed06e15a36aa 100644
--- a/include/linux/mcb.h
+++ b/include/linux/mcb.h
@@ -16,6 +16,7 @@
#include <linux/irqreturn.h>
struct mcb_driver;
+struct mcb_device;
/**
* struct mcb_bus - MEN Chameleon Bus
@@ -23,11 +24,14 @@ struct mcb_driver;
* @dev: pointer to carrier device
* @children: the child busses
* @bus_nr: mcb bus number
+ * @get_irq: callback to get IRQ number
*/
struct mcb_bus {
struct list_head children;
struct device dev;
+ struct device *carrier;
int bus_nr;
+ int (*get_irq)(struct mcb_device *dev);
};
#define to_mcb_bus(b) container_of((b), struct mcb_bus, dev)
@@ -105,7 +109,7 @@ extern void mcb_unregister_driver(struct mcb_driver *driver);
module_driver(__mcb_driver, mcb_register_driver, mcb_unregister_driver);
extern void mcb_bus_add_devices(const struct mcb_bus *bus);
extern int mcb_device_register(struct mcb_bus *bus, struct mcb_device *dev);
-extern struct mcb_bus *mcb_alloc_bus(void);
+extern struct mcb_bus *mcb_alloc_bus(struct device *carrier);
extern struct mcb_bus *mcb_bus_get(struct mcb_bus *bus);
extern void mcb_bus_put(struct mcb_bus *bus);
extern struct mcb_device *mcb_alloc_dev(struct mcb_bus *bus);
diff --git a/include/linux/memblock.h b/include/linux/memblock.h
index 8a20a51ed42d..b660e05b63d4 100644
--- a/include/linux/memblock.h
+++ b/include/linux/memblock.h
@@ -18,6 +18,7 @@
#include <linux/mm.h>
#define INIT_MEMBLOCK_REGIONS 128
+#define INIT_PHYSMEM_REGIONS 4
/* Definition of memblock flags. */
#define MEMBLOCK_HOTPLUG 0x1 /* hotpluggable region */
@@ -43,6 +44,9 @@ struct memblock {
phys_addr_t current_limit;
struct memblock_type memory;
struct memblock_type reserved;
+#ifdef CONFIG_HAVE_MEMBLOCK_PHYS_MAP
+ struct memblock_type physmem;
+#endif
};
extern struct memblock memblock;
@@ -71,6 +75,63 @@ int memblock_reserve(phys_addr_t base, phys_addr_t size);
void memblock_trim_memory(phys_addr_t align);
int memblock_mark_hotplug(phys_addr_t base, phys_addr_t size);
int memblock_clear_hotplug(phys_addr_t base, phys_addr_t size);
+
+/* Low level functions */
+int memblock_add_range(struct memblock_type *type,
+ phys_addr_t base, phys_addr_t size,
+ int nid, unsigned long flags);
+
+int memblock_remove_range(struct memblock_type *type,
+ phys_addr_t base,
+ phys_addr_t size);
+
+void __next_mem_range(u64 *idx, int nid, struct memblock_type *type_a,
+ struct memblock_type *type_b, phys_addr_t *out_start,
+ phys_addr_t *out_end, int *out_nid);
+
+void __next_mem_range_rev(u64 *idx, int nid, struct memblock_type *type_a,
+ struct memblock_type *type_b, phys_addr_t *out_start,
+ phys_addr_t *out_end, int *out_nid);
+
+/**
+ * for_each_mem_range - iterate through memblock areas from type_a and not
+ * included in type_b. Or just type_a if type_b is NULL.
+ * @i: u64 used as loop variable
+ * @type_a: ptr to memblock_type to iterate
+ * @type_b: ptr to memblock_type which excludes from the iteration
+ * @nid: node selector, %NUMA_NO_NODE for all nodes
+ * @p_start: ptr to phys_addr_t for start address of the range, can be %NULL
+ * @p_end: ptr to phys_addr_t for end address of the range, can be %NULL
+ * @p_nid: ptr to int for nid of the range, can be %NULL
+ */
+#define for_each_mem_range(i, type_a, type_b, nid, \
+ p_start, p_end, p_nid) \
+ for (i = 0, __next_mem_range(&i, nid, type_a, type_b, \
+ p_start, p_end, p_nid); \
+ i != (u64)ULLONG_MAX; \
+ __next_mem_range(&i, nid, type_a, type_b, \
+ p_start, p_end, p_nid))
+
+/**
+ * for_each_mem_range_rev - reverse iterate through memblock areas from
+ * type_a and not included in type_b. Or just type_a if type_b is NULL.
+ * @i: u64 used as loop variable
+ * @type_a: ptr to memblock_type to iterate
+ * @type_b: ptr to memblock_type which excludes from the iteration
+ * @nid: node selector, %NUMA_NO_NODE for all nodes
+ * @p_start: ptr to phys_addr_t for start address of the range, can be %NULL
+ * @p_end: ptr to phys_addr_t for end address of the range, can be %NULL
+ * @p_nid: ptr to int for nid of the range, can be %NULL
+ */
+#define for_each_mem_range_rev(i, type_a, type_b, nid, \
+ p_start, p_end, p_nid) \
+ for (i = (u64)ULLONG_MAX, \
+ __next_mem_range_rev(&i, nid, type_a, type_b, \
+ p_start, p_end, p_nid); \
+ i != (u64)ULLONG_MAX; \
+ __next_mem_range_rev(&i, nid, type_a, type_b, \
+ p_start, p_end, p_nid))
+
#ifdef CONFIG_MOVABLE_NODE
static inline bool memblock_is_hotpluggable(struct memblock_region *m)
{
@@ -113,9 +174,6 @@ void __next_mem_pfn_range(int *idx, int nid, unsigned long *out_start_pfn,
i >= 0; __next_mem_pfn_range(&i, nid, p_start, p_end, p_nid))
#endif /* CONFIG_HAVE_MEMBLOCK_NODE_MAP */
-void __next_free_mem_range(u64 *idx, int nid, phys_addr_t *out_start,
- phys_addr_t *out_end, int *out_nid);
-
/**
* for_each_free_mem_range - iterate through free memblock areas
* @i: u64 used as loop variable
@@ -128,13 +186,8 @@ void __next_free_mem_range(u64 *idx, int nid, phys_addr_t *out_start,
* soon as memblock is initialized.
*/
#define for_each_free_mem_range(i, nid, p_start, p_end, p_nid) \
- for (i = 0, \
- __next_free_mem_range(&i, nid, p_start, p_end, p_nid); \
- i != (u64)ULLONG_MAX; \
- __next_free_mem_range(&i, nid, p_start, p_end, p_nid))
-
-void __next_free_mem_range_rev(u64 *idx, int nid, phys_addr_t *out_start,
- phys_addr_t *out_end, int *out_nid);
+ for_each_mem_range(i, &memblock.memory, &memblock.reserved, \
+ nid, p_start, p_end, p_nid)
/**
* for_each_free_mem_range_reverse - rev-iterate through free memblock areas
@@ -148,10 +201,8 @@ void __next_free_mem_range_rev(u64 *idx, int nid, phys_addr_t *out_start,
* order. Available as soon as memblock is initialized.
*/
#define for_each_free_mem_range_reverse(i, nid, p_start, p_end, p_nid) \
- for (i = (u64)ULLONG_MAX, \
- __next_free_mem_range_rev(&i, nid, p_start, p_end, p_nid); \
- i != (u64)ULLONG_MAX; \
- __next_free_mem_range_rev(&i, nid, p_start, p_end, p_nid))
+ for_each_mem_range_rev(i, &memblock.memory, &memblock.reserved, \
+ nid, p_start, p_end, p_nid)
static inline void memblock_set_region_flags(struct memblock_region *r,
unsigned long flags)
@@ -221,6 +272,8 @@ static inline bool memblock_bottom_up(void) { return false; }
#define MEMBLOCK_ALLOC_ANYWHERE (~(phys_addr_t)0)
#define MEMBLOCK_ALLOC_ACCESSIBLE 0
+phys_addr_t __init memblock_alloc_range(phys_addr_t size, phys_addr_t align,
+ phys_addr_t start, phys_addr_t end);
phys_addr_t memblock_alloc_base(phys_addr_t size, phys_addr_t align,
phys_addr_t max_addr);
phys_addr_t __memblock_alloc_base(phys_addr_t size, phys_addr_t align,
diff --git a/include/linux/memcontrol.h b/include/linux/memcontrol.h
index b569b8be5c5a..eb65d29516ca 100644
--- a/include/linux/memcontrol.h
+++ b/include/linux/memcontrol.h
@@ -492,13 +492,9 @@ void __memcg_kmem_uncharge_pages(struct page *page, int order);
int memcg_cache_id(struct mem_cgroup *memcg);
-char *memcg_create_cache_name(struct mem_cgroup *memcg,
- struct kmem_cache *root_cache);
int memcg_alloc_cache_params(struct mem_cgroup *memcg, struct kmem_cache *s,
struct kmem_cache *root_cache);
void memcg_free_cache_params(struct kmem_cache *s);
-void memcg_register_cache(struct kmem_cache *s);
-void memcg_unregister_cache(struct kmem_cache *s);
int memcg_update_cache_size(struct kmem_cache *s, int num_groups);
void memcg_update_array_size(int num_groups);
@@ -506,8 +502,10 @@ void memcg_update_array_size(int num_groups);
struct kmem_cache *
__memcg_kmem_get_cache(struct kmem_cache *cachep, gfp_t gfp);
-void mem_cgroup_destroy_cache(struct kmem_cache *cachep);
-int __kmem_cache_destroy_memcg_children(struct kmem_cache *s);
+int __memcg_charge_slab(struct kmem_cache *cachep, gfp_t gfp, int order);
+void __memcg_uncharge_slab(struct kmem_cache *cachep, int order);
+
+int __memcg_cleanup_cache_params(struct kmem_cache *s);
/**
* memcg_kmem_newpage_charge: verify if a new kmem allocation is allowed.
@@ -534,7 +532,7 @@ memcg_kmem_newpage_charge(gfp_t gfp, struct mem_cgroup **memcg, int order)
* res_counter_charge_nofail, but we hope those allocations are rare,
* and won't be worth the trouble.
*/
- if (!(gfp & __GFP_KMEMCG) || (gfp & __GFP_NOFAIL))
+ if (gfp & __GFP_NOFAIL)
return true;
if (in_interrupt() || (!current->mm) || (current->flags & PF_KTHREAD))
return true;
@@ -583,17 +581,7 @@ memcg_kmem_commit_charge(struct page *page, struct mem_cgroup *memcg, int order)
* @cachep: the original global kmem cache
* @gfp: allocation flags.
*
- * This function assumes that the task allocating, which determines the memcg
- * in the page allocator, belongs to the same cgroup throughout the whole
- * process. Misacounting can happen if the task calls memcg_kmem_get_cache()
- * while belonging to a cgroup, and later on changes. This is considered
- * acceptable, and should only happen upon task migration.
- *
- * Before the cache is created by the memcg core, there is also a possible
- * imbalance: the task belongs to a memcg, but the cache being allocated from
- * is the global cache, since the child cache is not yet guaranteed to be
- * ready. This case is also fine, since in this case the GFP_KMEMCG will not be
- * passed and the page allocator will not attempt any cgroup accounting.
+ * All memory allocated from a per-memcg cache is charged to the owner memcg.
*/
static __always_inline struct kmem_cache *
memcg_kmem_get_cache(struct kmem_cache *cachep, gfp_t gfp)
@@ -648,14 +636,6 @@ static inline void memcg_free_cache_params(struct kmem_cache *s)
{
}
-static inline void memcg_register_cache(struct kmem_cache *s)
-{
-}
-
-static inline void memcg_unregister_cache(struct kmem_cache *s)
-{
-}
-
static inline struct kmem_cache *
memcg_kmem_get_cache(struct kmem_cache *cachep, gfp_t gfp)
{
diff --git a/include/linux/memory_hotplug.h b/include/linux/memory_hotplug.h
index 4ca3d951fe91..010d125bffbf 100644
--- a/include/linux/memory_hotplug.h
+++ b/include/linux/memory_hotplug.h
@@ -187,14 +187,8 @@ extern void put_page_bootmem(struct page *page);
extern void get_page_bootmem(unsigned long ingo, struct page *page,
unsigned long type);
-/*
- * Lock for memory hotplug guarantees 1) all callbacks for memory hotplug
- * notifier will be called under this. 2) offline/online/add/remove memory
- * will not run simultaneously.
- */
-
-void lock_memory_hotplug(void);
-void unlock_memory_hotplug(void);
+void get_online_mems(void);
+void put_online_mems(void);
#else /* ! CONFIG_MEMORY_HOTPLUG */
/*
@@ -232,8 +226,8 @@ static inline int try_online_node(int nid)
return 0;
}
-static inline void lock_memory_hotplug(void) {}
-static inline void unlock_memory_hotplug(void) {}
+static inline void get_online_mems(void) {}
+static inline void put_online_mems(void) {}
#endif /* ! CONFIG_MEMORY_HOTPLUG */
diff --git a/include/linux/mempolicy.h b/include/linux/mempolicy.h
index 3c1b968da0ca..f230a978e6ba 100644
--- a/include/linux/mempolicy.h
+++ b/include/linux/mempolicy.h
@@ -175,6 +175,12 @@ static inline int vma_migratable(struct vm_area_struct *vma)
{
if (vma->vm_flags & (VM_IO | VM_PFNMAP))
return 0;
+
+#ifndef CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION
+ if (vma->vm_flags & VM_HUGETLB)
+ return 0;
+#endif
+
/*
* Migration allocates pages in the highest zone. If we cannot
* do so then migration (at least from node to node) is not
diff --git a/include/linux/mfd/abx500.h b/include/linux/mfd/abx500.h
index 3301b2031c8d..552cc1d61cc7 100644
--- a/include/linux/mfd/abx500.h
+++ b/include/linux/mfd/abx500.h
@@ -330,7 +330,6 @@ int abx500_mask_and_set_register_interruptible(struct device *dev, u8 bank,
int abx500_get_chip_id(struct device *dev);
int abx500_event_registers_startup_state_get(struct device *dev, u8 *event);
int abx500_startup_irq_enabled(struct device *dev, unsigned int irq);
-void abx500_dump_all_banks(void);
struct abx500_ops {
int (*get_chip_id) (struct device *);
diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h
index 5cf8b91ce996..6d9371f88875 100644
--- a/include/linux/mfd/arizona/core.h
+++ b/include/linux/mfd/arizona/core.h
@@ -124,4 +124,7 @@ int wm5102_patch(struct arizona *arizona);
int wm5110_patch(struct arizona *arizona);
int wm8997_patch(struct arizona *arizona);
+extern int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop,
+ bool mandatory);
+
#endif
diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h
index 7b35c21170d5..7204d8138b24 100644
--- a/include/linux/mfd/arizona/registers.h
+++ b/include/linux/mfd/arizona/registers.h
@@ -42,12 +42,14 @@
#define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_2 0x62
#define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_3 0x63
#define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_4 0x64
-#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1 0x68
-#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2 0x69
-#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_3 0x6A
-#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_4 0x6B
-#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_5 0x6C
-#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_6 0x6D
+#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1 0x66
+#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2 0x67
+#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_3 0x68
+#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_4 0x69
+#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_5 0x6A
+#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_6 0x6B
+#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_7 0x6C
+#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_8 0x6D
#define ARIZONA_COMFORT_NOISE_GENERATOR 0x70
#define ARIZONA_HAPTICS_CONTROL_1 0x90
#define ARIZONA_HAPTICS_CONTROL_2 0x91
diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h
new file mode 100644
index 000000000000..d0e31a2287ac
--- /dev/null
+++ b/include/linux/mfd/axp20x.h
@@ -0,0 +1,180 @@
+/*
+ * Functions and registers to access AXP20X power management chip.
+ *
+ * Copyright (C) 2013, Carlo Caione <carlo@caione.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __LINUX_MFD_AXP20X_H
+#define __LINUX_MFD_AXP20X_H
+
+enum {
+ AXP202_ID = 0,
+ AXP209_ID,
+};
+
+#define AXP20X_DATACACHE(m) (0x04 + (m))
+
+/* Power supply */
+#define AXP20X_PWR_INPUT_STATUS 0x00
+#define AXP20X_PWR_OP_MODE 0x01
+#define AXP20X_USB_OTG_STATUS 0x02
+#define AXP20X_PWR_OUT_CTRL 0x12
+#define AXP20X_DCDC2_V_OUT 0x23
+#define AXP20X_DCDC2_LDO3_V_SCAL 0x25
+#define AXP20X_DCDC3_V_OUT 0x27
+#define AXP20X_LDO24_V_OUT 0x28
+#define AXP20X_LDO3_V_OUT 0x29
+#define AXP20X_VBUS_IPSOUT_MGMT 0x30
+#define AXP20X_V_OFF 0x31
+#define AXP20X_OFF_CTRL 0x32
+#define AXP20X_CHRG_CTRL1 0x33
+#define AXP20X_CHRG_CTRL2 0x34
+#define AXP20X_CHRG_BAK_CTRL 0x35
+#define AXP20X_PEK_KEY 0x36
+#define AXP20X_DCDC_FREQ 0x37
+#define AXP20X_V_LTF_CHRG 0x38
+#define AXP20X_V_HTF_CHRG 0x39
+#define AXP20X_APS_WARN_L1 0x3a
+#define AXP20X_APS_WARN_L2 0x3b
+#define AXP20X_V_LTF_DISCHRG 0x3c
+#define AXP20X_V_HTF_DISCHRG 0x3d
+
+/* Interrupt */
+#define AXP20X_IRQ1_EN 0x40
+#define AXP20X_IRQ2_EN 0x41
+#define AXP20X_IRQ3_EN 0x42
+#define AXP20X_IRQ4_EN 0x43
+#define AXP20X_IRQ5_EN 0x44
+#define AXP20X_IRQ1_STATE 0x48
+#define AXP20X_IRQ2_STATE 0x49
+#define AXP20X_IRQ3_STATE 0x4a
+#define AXP20X_IRQ4_STATE 0x4b
+#define AXP20X_IRQ5_STATE 0x4c
+
+/* ADC */
+#define AXP20X_ACIN_V_ADC_H 0x56
+#define AXP20X_ACIN_V_ADC_L 0x57
+#define AXP20X_ACIN_I_ADC_H 0x58
+#define AXP20X_ACIN_I_ADC_L 0x59
+#define AXP20X_VBUS_V_ADC_H 0x5a
+#define AXP20X_VBUS_V_ADC_L 0x5b
+#define AXP20X_VBUS_I_ADC_H 0x5c
+#define AXP20X_VBUS_I_ADC_L 0x5d
+#define AXP20X_TEMP_ADC_H 0x5e
+#define AXP20X_TEMP_ADC_L 0x5f
+#define AXP20X_TS_IN_H 0x62
+#define AXP20X_TS_IN_L 0x63
+#define AXP20X_GPIO0_V_ADC_H 0x64
+#define AXP20X_GPIO0_V_ADC_L 0x65
+#define AXP20X_GPIO1_V_ADC_H 0x66
+#define AXP20X_GPIO1_V_ADC_L 0x67
+#define AXP20X_PWR_BATT_H 0x70
+#define AXP20X_PWR_BATT_M 0x71
+#define AXP20X_PWR_BATT_L 0x72
+#define AXP20X_BATT_V_H 0x78
+#define AXP20X_BATT_V_L 0x79
+#define AXP20X_BATT_CHRG_I_H 0x7a
+#define AXP20X_BATT_CHRG_I_L 0x7b
+#define AXP20X_BATT_DISCHRG_I_H 0x7c
+#define AXP20X_BATT_DISCHRG_I_L 0x7d
+#define AXP20X_IPSOUT_V_HIGH_H 0x7e
+#define AXP20X_IPSOUT_V_HIGH_L 0x7f
+
+/* Power supply */
+#define AXP20X_DCDC_MODE 0x80
+#define AXP20X_ADC_EN1 0x82
+#define AXP20X_ADC_EN2 0x83
+#define AXP20X_ADC_RATE 0x84
+#define AXP20X_GPIO10_IN_RANGE 0x85
+#define AXP20X_GPIO1_ADC_IRQ_RIS 0x86
+#define AXP20X_GPIO1_ADC_IRQ_FAL 0x87
+#define AXP20X_TIMER_CTRL 0x8a
+#define AXP20X_VBUS_MON 0x8b
+#define AXP20X_OVER_TMP 0x8f
+
+/* GPIO */
+#define AXP20X_GPIO0_CTRL 0x90
+#define AXP20X_LDO5_V_OUT 0x91
+#define AXP20X_GPIO1_CTRL 0x92
+#define AXP20X_GPIO2_CTRL 0x93
+#define AXP20X_GPIO20_SS 0x94
+#define AXP20X_GPIO3_CTRL 0x95
+
+/* Battery */
+#define AXP20X_CHRG_CC_31_24 0xb0
+#define AXP20X_CHRG_CC_23_16 0xb1
+#define AXP20X_CHRG_CC_15_8 0xb2
+#define AXP20X_CHRG_CC_7_0 0xb3
+#define AXP20X_DISCHRG_CC_31_24 0xb4
+#define AXP20X_DISCHRG_CC_23_16 0xb5
+#define AXP20X_DISCHRG_CC_15_8 0xb6
+#define AXP20X_DISCHRG_CC_7_0 0xb7
+#define AXP20X_CC_CTRL 0xb8
+#define AXP20X_FG_RES 0xb9
+
+/* Regulators IDs */
+enum {
+ AXP20X_LDO1 = 0,
+ AXP20X_LDO2,
+ AXP20X_LDO3,
+ AXP20X_LDO4,
+ AXP20X_LDO5,
+ AXP20X_DCDC2,
+ AXP20X_DCDC3,
+ AXP20X_REG_ID_MAX,
+};
+
+/* IRQs */
+enum {
+ AXP20X_IRQ_ACIN_OVER_V = 1,
+ AXP20X_IRQ_ACIN_PLUGIN,
+ AXP20X_IRQ_ACIN_REMOVAL,
+ AXP20X_IRQ_VBUS_OVER_V,
+ AXP20X_IRQ_VBUS_PLUGIN,
+ AXP20X_IRQ_VBUS_REMOVAL,
+ AXP20X_IRQ_VBUS_V_LOW,
+ AXP20X_IRQ_BATT_PLUGIN,
+ AXP20X_IRQ_BATT_REMOVAL,
+ AXP20X_IRQ_BATT_ENT_ACT_MODE,
+ AXP20X_IRQ_BATT_EXIT_ACT_MODE,
+ AXP20X_IRQ_CHARG,
+ AXP20X_IRQ_CHARG_DONE,
+ AXP20X_IRQ_BATT_TEMP_HIGH,
+ AXP20X_IRQ_BATT_TEMP_LOW,
+ AXP20X_IRQ_DIE_TEMP_HIGH,
+ AXP20X_IRQ_CHARG_I_LOW,
+ AXP20X_IRQ_DCDC1_V_LONG,
+ AXP20X_IRQ_DCDC2_V_LONG,
+ AXP20X_IRQ_DCDC3_V_LONG,
+ AXP20X_IRQ_PEK_SHORT = 22,
+ AXP20X_IRQ_PEK_LONG,
+ AXP20X_IRQ_N_OE_PWR_ON,
+ AXP20X_IRQ_N_OE_PWR_OFF,
+ AXP20X_IRQ_VBUS_VALID,
+ AXP20X_IRQ_VBUS_NOT_VALID,
+ AXP20X_IRQ_VBUS_SESS_VALID,
+ AXP20X_IRQ_VBUS_SESS_END,
+ AXP20X_IRQ_LOW_PWR_LVL1,
+ AXP20X_IRQ_LOW_PWR_LVL2,
+ AXP20X_IRQ_TIMER,
+ AXP20X_IRQ_PEK_RIS_EDGE,
+ AXP20X_IRQ_PEK_FAL_EDGE,
+ AXP20X_IRQ_GPIO3_INPUT,
+ AXP20X_IRQ_GPIO2_INPUT,
+ AXP20X_IRQ_GPIO1_INPUT,
+ AXP20X_IRQ_GPIO0_INPUT,
+};
+
+struct axp20x_dev {
+ struct device *dev;
+ struct i2c_client *i2c_client;
+ struct regmap *regmap;
+ struct regmap_irq_chip_data *regmap_irqc;
+ long variant;
+};
+
+#endif /* __LINUX_MFD_AXP20X_H */
diff --git a/include/linux/mfd/bcm590xx.h b/include/linux/mfd/bcm590xx.h
index 434df2d4e587..267aedee1c7a 100644
--- a/include/linux/mfd/bcm590xx.h
+++ b/include/linux/mfd/bcm590xx.h
@@ -19,12 +19,15 @@
#include <linux/regmap.h>
/* max register address */
-#define BCM590XX_MAX_REGISTER 0xe7
+#define BCM590XX_MAX_REGISTER_PRI 0xe7
+#define BCM590XX_MAX_REGISTER_SEC 0xf0
struct bcm590xx {
struct device *dev;
- struct i2c_client *i2c_client;
- struct regmap *regmap;
+ struct i2c_client *i2c_pri;
+ struct i2c_client *i2c_sec;
+ struct regmap *regmap_pri;
+ struct regmap *regmap_sec;
unsigned int id;
};
diff --git a/include/linux/mfd/core.h b/include/linux/mfd/core.h
index bdba8c61207b..f543de91ce19 100644
--- a/include/linux/mfd/core.h
+++ b/include/linux/mfd/core.h
@@ -63,7 +63,7 @@ struct mfd_cell {
/* A list of regulator supplies that should be mapped to the MFD
* device rather than the child device when requested
*/
- const char **parent_supplies;
+ const char * const *parent_supplies;
int num_parent_supplies;
};
diff --git a/include/linux/mfd/cros_ec.h b/include/linux/mfd/cros_ec.h
index 032af7fc5b2e..887ef4f7bef7 100644
--- a/include/linux/mfd/cros_ec.h
+++ b/include/linux/mfd/cros_ec.h
@@ -29,8 +29,8 @@ enum {
EC_MSG_RX_PROTO_BYTES = 3,
/* Max length of messages */
- EC_MSG_BYTES = EC_HOST_PARAM_SIZE + EC_MSG_TX_PROTO_BYTES,
-
+ EC_MSG_BYTES = EC_PROTO2_MAX_PARAM_SIZE +
+ EC_MSG_TX_PROTO_BYTES,
};
/**
diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h
index 86fd06953bcd..7853a6410d14 100644
--- a/include/linux/mfd/cros_ec_commands.h
+++ b/include/linux/mfd/cros_ec_commands.h
@@ -24,25 +24,12 @@
#define __CROS_EC_COMMANDS_H
/*
- * Protocol overview
+ * Current version of this protocol
*
- * request: CMD [ P0 P1 P2 ... Pn S ]
- * response: ERR [ P0 P1 P2 ... Pn S ]
- *
- * where the bytes are defined as follow :
- * - CMD is the command code. (defined by EC_CMD_ constants)
- * - ERR is the error code. (defined by EC_RES_ constants)
- * - Px is the optional payload.
- * it is not sent if the error code is not success.
- * (defined by ec_params_ and ec_response_ structures)
- * - S is the checksum which is the sum of all payload bytes.
- *
- * On LPC, CMD and ERR are sent/received at EC_LPC_ADDR_KERNEL|USER_CMD
- * and the payloads are sent/received at EC_LPC_ADDR_KERNEL|USER_PARAM.
- * On I2C, all bytes are sent serially in the same message.
+ * TODO(crosbug.com/p/11223): This is effectively useless; protocol is
+ * determined in other ways. Remove this once the kernel code no longer
+ * depends on it.
*/
-
-/* Current version of this protocol */
#define EC_PROTO_VERSION 0x00000002
/* Command version mask */
@@ -57,13 +44,19 @@
#define EC_LPC_ADDR_HOST_CMD 0x204
/* I/O addresses for host command args and params */
-#define EC_LPC_ADDR_HOST_ARGS 0x800
-#define EC_LPC_ADDR_HOST_PARAM 0x804
-#define EC_HOST_PARAM_SIZE 0x0fc /* Size of param area in bytes */
-
-/* I/O addresses for host command params, old interface */
-#define EC_LPC_ADDR_OLD_PARAM 0x880
-#define EC_OLD_PARAM_SIZE 0x080 /* Size of param area in bytes */
+/* Protocol version 2 */
+#define EC_LPC_ADDR_HOST_ARGS 0x800 /* And 0x801, 0x802, 0x803 */
+#define EC_LPC_ADDR_HOST_PARAM 0x804 /* For version 2 params; size is
+ * EC_PROTO2_MAX_PARAM_SIZE */
+/* Protocol version 3 */
+#define EC_LPC_ADDR_HOST_PACKET 0x800 /* Offset of version 3 packet */
+#define EC_LPC_HOST_PACKET_SIZE 0x100 /* Max size of version 3 packet */
+
+/* The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff
+ * and they tell the kernel that so we have to think of it as two parts. */
+#define EC_HOST_CMD_REGION0 0x800
+#define EC_HOST_CMD_REGION1 0x880
+#define EC_HOST_CMD_REGION_SIZE 0x80
/* EC command register bit functions */
#define EC_LPC_CMDR_DATA (1 << 0) /* Data ready for host to read */
@@ -79,18 +72,22 @@
#define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */
/* The offset address of each type of data in mapped memory. */
-#define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors */
-#define EC_MEMMAP_FAN 0x10 /* Fan speeds */
-#define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* Temp sensors (second set) */
-#define EC_MEMMAP_ID 0x20 /* 'E' 'C' */
+#define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */
+#define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */
+#define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */
+#define EC_MEMMAP_ID 0x20 /* 0x20 == 'E', 0x21 == 'C' */
#define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */
#define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */
#define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */
#define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */
#define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */
-#define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host command interface flags */
-#define EC_MEMMAP_SWITCHES 0x30
-#define EC_MEMMAP_HOST_EVENTS 0x34
+#define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host cmd interface flags (8 bits) */
+/* Unused 0x28 - 0x2f */
+#define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */
+/* Unused 0x31 - 0x33 */
+#define EC_MEMMAP_HOST_EVENTS 0x34 /* 32 bits */
+/* Reserve 0x38 - 0x3f for additional host event-related stuff */
+/* Battery values are all 32 bits */
#define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */
#define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */
#define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */
@@ -99,10 +96,24 @@
#define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */
#define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */
#define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */
+/* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */
#define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */
#define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */
#define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */
#define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */
+#define EC_MEMMAP_ALS 0x80 /* ALS readings in lux (2 X 16 bits) */
+/* Unused 0x84 - 0x8f */
+#define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/
+/* Unused 0x91 */
+#define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometer data 0x92 - 0x9f */
+#define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */
+/* Unused 0xa6 - 0xfe (remember, 0xff is NOT part of the memmap region) */
+
+
+/* Define the format of the accelerometer mapped memory status byte. */
+#define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f
+#define EC_MEMMAP_ACC_STATUS_BUSY_BIT (1 << 4)
+#define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT (1 << 7)
/* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */
#define EC_TEMP_SENSOR_ENTRIES 16
@@ -112,6 +123,8 @@
* Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2.
*/
#define EC_TEMP_SENSOR_B_ENTRIES 8
+
+/* Special values for mapped temperature sensors */
#define EC_TEMP_SENSOR_NOT_PRESENT 0xff
#define EC_TEMP_SENSOR_ERROR 0xfe
#define EC_TEMP_SENSOR_NOT_POWERED 0xfd
@@ -122,6 +135,18 @@
*/
#define EC_TEMP_SENSOR_OFFSET 200
+/*
+ * Number of ALS readings at EC_MEMMAP_ALS
+ */
+#define EC_ALS_ENTRIES 2
+
+/*
+ * The default value a temperature sensor will return when it is present but
+ * has not been read this boot. This is a reasonable number to avoid
+ * triggering alarms on the host.
+ */
+#define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET)
+
#define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */
#define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */
#define EC_FAN_SPEED_STALLED 0xfffe /* Fan stalled */
@@ -137,8 +162,8 @@
#define EC_SWITCH_LID_OPEN 0x01
#define EC_SWITCH_POWER_BUTTON_PRESSED 0x02
#define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04
-/* Recovery requested via keyboard */
-#define EC_SWITCH_KEYBOARD_RECOVERY 0x08
+/* Was recovery requested via keyboard; now unused. */
+#define EC_SWITCH_IGNORE1 0x08
/* Recovery requested via dedicated signal (from servo board) */
#define EC_SWITCH_DEDICATED_RECOVERY 0x10
/* Was fake developer mode switch; now unused. Remove in next refactor. */
@@ -147,10 +172,15 @@
/* Host command interface flags */
/* Host command interface supports LPC args (LPC interface only) */
#define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01
+/* Host command interface supports version 3 protocol */
+#define EC_HOST_CMD_FLAG_VERSION_3 0x02
/* Wireless switch flags */
-#define EC_WIRELESS_SWITCH_WLAN 0x01
-#define EC_WIRELESS_SWITCH_BLUETOOTH 0x02
+#define EC_WIRELESS_SWITCH_ALL ~0x00 /* All flags */
+#define EC_WIRELESS_SWITCH_WLAN 0x01 /* WLAN radio */
+#define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 /* Bluetooth radio */
+#define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */
+#define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */
/*
* This header file is used in coreboot both in C and ACPI code. The ACPI code
@@ -159,6 +189,14 @@
*/
#ifndef __ACPI__
+/*
+ * Define __packed if someone hasn't beat us to it. Linux kernel style
+ * checking prefers __packed over __attribute__((packed)).
+ */
+#ifndef __packed
+#define __packed __attribute__((packed))
+#endif
+
/* LPC command status byte masks */
/* EC has written a byte in the data register and host hasn't read it yet */
#define EC_LPC_STATUS_TO_HOST 0x01
@@ -198,6 +236,9 @@ enum ec_status {
EC_RES_UNAVAILABLE = 9, /* No response available */
EC_RES_TIMEOUT = 10, /* We got a timeout */
EC_RES_OVERFLOW = 11, /* Table / data overflow */
+ EC_RES_INVALID_HEADER = 12, /* Header contains invalid data */
+ EC_RES_REQUEST_TRUNCATED = 13, /* Didn't get the entire request */
+ EC_RES_RESPONSE_TOO_BIG = 14 /* Response was too big to handle */
};
/*
@@ -235,6 +276,16 @@ enum host_event_code {
/* Shutdown due to battery level too low */
EC_HOST_EVENT_BATTERY_SHUTDOWN = 17,
+ /* Suggest that the AP throttle itself */
+ EC_HOST_EVENT_THROTTLE_START = 18,
+ /* Suggest that the AP resume normal speed */
+ EC_HOST_EVENT_THROTTLE_STOP = 19,
+
+ /* Hang detect logic detected a hang and host event timeout expired */
+ EC_HOST_EVENT_HANG_DETECT = 20,
+ /* Hang detect logic detected a hang and warm rebooted the AP */
+ EC_HOST_EVENT_HANG_REBOOT = 21,
+
/*
* The high bit of the event mask is not used as a host event code. If
* it reads back as set, then the entire event mask should be
@@ -279,6 +330,188 @@ struct ec_lpc_host_args {
*/
#define EC_HOST_ARGS_FLAG_TO_HOST 0x02
+/*****************************************************************************/
+/*
+ * Byte codes returned by EC over SPI interface.
+ *
+ * These can be used by the AP to debug the EC interface, and to determine
+ * when the EC is not in a state where it will ever get around to responding
+ * to the AP.
+ *
+ * Example of sequence of bytes read from EC for a current good transfer:
+ * 1. - - AP asserts chip select (CS#)
+ * 2. EC_SPI_OLD_READY - AP sends first byte(s) of request
+ * 3. - - EC starts handling CS# interrupt
+ * 4. EC_SPI_RECEIVING - AP sends remaining byte(s) of request
+ * 5. EC_SPI_PROCESSING - EC starts processing request; AP is clocking in
+ * bytes looking for EC_SPI_FRAME_START
+ * 6. - - EC finishes processing and sets up response
+ * 7. EC_SPI_FRAME_START - AP reads frame byte
+ * 8. (response packet) - AP reads response packet
+ * 9. EC_SPI_PAST_END - Any additional bytes read by AP
+ * 10 - - AP deasserts chip select
+ * 11 - - EC processes CS# interrupt and sets up DMA for
+ * next request
+ *
+ * If the AP is waiting for EC_SPI_FRAME_START and sees any value other than
+ * the following byte values:
+ * EC_SPI_OLD_READY
+ * EC_SPI_RX_READY
+ * EC_SPI_RECEIVING
+ * EC_SPI_PROCESSING
+ *
+ * Then the EC found an error in the request, or was not ready for the request
+ * and lost data. The AP should give up waiting for EC_SPI_FRAME_START,
+ * because the EC is unable to tell when the AP is done sending its request.
+ */
+
+/*
+ * Framing byte which precedes a response packet from the EC. After sending a
+ * request, the AP will clock in bytes until it sees the framing byte, then
+ * clock in the response packet.
+ */
+#define EC_SPI_FRAME_START 0xec
+
+/*
+ * Padding bytes which are clocked out after the end of a response packet.
+ */
+#define EC_SPI_PAST_END 0xed
+
+/*
+ * EC is ready to receive, and has ignored the byte sent by the AP. EC expects
+ * that the AP will send a valid packet header (starting with
+ * EC_COMMAND_PROTOCOL_3) in the next 32 bytes.
+ */
+#define EC_SPI_RX_READY 0xf8
+
+/*
+ * EC has started receiving the request from the AP, but hasn't started
+ * processing it yet.
+ */
+#define EC_SPI_RECEIVING 0xf9
+
+/* EC has received the entire request from the AP and is processing it. */
+#define EC_SPI_PROCESSING 0xfa
+
+/*
+ * EC received bad data from the AP, such as a packet header with an invalid
+ * length. EC will ignore all data until chip select deasserts.
+ */
+#define EC_SPI_RX_BAD_DATA 0xfb
+
+/*
+ * EC received data from the AP before it was ready. That is, the AP asserted
+ * chip select and started clocking data before the EC was ready to receive it.
+ * EC will ignore all data until chip select deasserts.
+ */
+#define EC_SPI_NOT_READY 0xfc
+
+/*
+ * EC was ready to receive a request from the AP. EC has treated the byte sent
+ * by the AP as part of a request packet, or (for old-style ECs) is processing
+ * a fully received packet but is not ready to respond yet.
+ */
+#define EC_SPI_OLD_READY 0xfd
+
+/*****************************************************************************/
+
+/*
+ * Protocol version 2 for I2C and SPI send a request this way:
+ *
+ * 0 EC_CMD_VERSION0 + (command version)
+ * 1 Command number
+ * 2 Length of params = N
+ * 3..N+2 Params, if any
+ * N+3 8-bit checksum of bytes 0..N+2
+ *
+ * The corresponding response is:
+ *
+ * 0 Result code (EC_RES_*)
+ * 1 Length of params = M
+ * 2..M+1 Params, if any
+ * M+2 8-bit checksum of bytes 0..M+1
+ */
+#define EC_PROTO2_REQUEST_HEADER_BYTES 3
+#define EC_PROTO2_REQUEST_TRAILER_BYTES 1
+#define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES + \
+ EC_PROTO2_REQUEST_TRAILER_BYTES)
+
+#define EC_PROTO2_RESPONSE_HEADER_BYTES 2
+#define EC_PROTO2_RESPONSE_TRAILER_BYTES 1
+#define EC_PROTO2_RESPONSE_OVERHEAD (EC_PROTO2_RESPONSE_HEADER_BYTES + \
+ EC_PROTO2_RESPONSE_TRAILER_BYTES)
+
+/* Parameter length was limited by the LPC interface */
+#define EC_PROTO2_MAX_PARAM_SIZE 0xfc
+
+/* Maximum request and response packet sizes for protocol version 2 */
+#define EC_PROTO2_MAX_REQUEST_SIZE (EC_PROTO2_REQUEST_OVERHEAD + \
+ EC_PROTO2_MAX_PARAM_SIZE)
+#define EC_PROTO2_MAX_RESPONSE_SIZE (EC_PROTO2_RESPONSE_OVERHEAD + \
+ EC_PROTO2_MAX_PARAM_SIZE)
+
+/*****************************************************************************/
+
+/*
+ * Value written to legacy command port / prefix byte to indicate protocol
+ * 3+ structs are being used. Usage is bus-dependent.
+ */
+#define EC_COMMAND_PROTOCOL_3 0xda
+
+#define EC_HOST_REQUEST_VERSION 3
+
+/* Version 3 request from host */
+struct ec_host_request {
+ /* Struct version (=3)
+ *
+ * EC will return EC_RES_INVALID_HEADER if it receives a header with a
+ * version it doesn't know how to parse.
+ */
+ uint8_t struct_version;
+
+ /*
+ * Checksum of request and data; sum of all bytes including checksum
+ * should total to 0.
+ */
+ uint8_t checksum;
+
+ /* Command code */
+ uint16_t command;
+
+ /* Command version */
+ uint8_t command_version;
+
+ /* Unused byte in current protocol version; set to 0 */
+ uint8_t reserved;
+
+ /* Length of data which follows this header */
+ uint16_t data_len;
+} __packed;
+
+#define EC_HOST_RESPONSE_VERSION 3
+
+/* Version 3 response from EC */
+struct ec_host_response {
+ /* Struct version (=3) */
+ uint8_t struct_version;
+
+ /*
+ * Checksum of response and data; sum of all bytes including checksum
+ * should total to 0.
+ */
+ uint8_t checksum;
+
+ /* Result code (EC_RES_*) */
+ uint16_t result;
+
+ /* Length of data which follows this header */
+ uint16_t data_len;
+
+ /* Unused bytes in current protocol version; set to 0 */
+ uint16_t reserved;
+} __packed;
+
+/*****************************************************************************/
/*
* Notes on commands:
*
@@ -418,6 +651,68 @@ struct ec_response_get_comms_status {
uint32_t flags; /* Mask of enum ec_comms_status */
} __packed;
+/* Fake a variety of responses, purely for testing purposes. */
+#define EC_CMD_TEST_PROTOCOL 0x0a
+
+/* Tell the EC what to send back to us. */
+struct ec_params_test_protocol {
+ uint32_t ec_result;
+ uint32_t ret_len;
+ uint8_t buf[32];
+} __packed;
+
+/* Here it comes... */
+struct ec_response_test_protocol {
+ uint8_t buf[32];
+} __packed;
+
+/* Get prococol information */
+#define EC_CMD_GET_PROTOCOL_INFO 0x0b
+
+/* Flags for ec_response_get_protocol_info.flags */
+/* EC_RES_IN_PROGRESS may be returned if a command is slow */
+#define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED (1 << 0)
+
+struct ec_response_get_protocol_info {
+ /* Fields which exist if at least protocol version 3 supported */
+
+ /* Bitmask of protocol versions supported (1 << n means version n)*/
+ uint32_t protocol_versions;
+
+ /* Maximum request packet size, in bytes */
+ uint16_t max_request_packet_size;
+
+ /* Maximum response packet size, in bytes */
+ uint16_t max_response_packet_size;
+
+ /* Flags; see EC_PROTOCOL_INFO_* */
+ uint32_t flags;
+} __packed;
+
+
+/*****************************************************************************/
+/* Get/Set miscellaneous values */
+
+/* The upper byte of .flags tells what to do (nothing means "get") */
+#define EC_GSV_SET 0x80000000
+
+/* The lower three bytes of .flags identifies the parameter, if that has
+ meaning for an individual command. */
+#define EC_GSV_PARAM_MASK 0x00ffffff
+
+struct ec_params_get_set_value {
+ uint32_t flags;
+ uint32_t value;
+} __packed;
+
+struct ec_response_get_set_value {
+ uint32_t flags;
+ uint32_t value;
+} __packed;
+
+/* More than one command can use these structs to get/set paramters. */
+#define EC_CMD_GSV_PAUSE_IN_S5 0x0c
+
/*****************************************************************************/
/* Flash commands */
@@ -425,6 +720,7 @@ struct ec_response_get_comms_status {
/* Get flash info */
#define EC_CMD_FLASH_INFO 0x10
+/* Version 0 returns these fields */
struct ec_response_flash_info {
/* Usable flash size, in bytes */
uint32_t flash_size;
@@ -445,6 +741,37 @@ struct ec_response_flash_info {
uint32_t protect_block_size;
} __packed;
+/* Flags for version 1+ flash info command */
+/* EC flash erases bits to 0 instead of 1 */
+#define EC_FLASH_INFO_ERASE_TO_0 (1 << 0)
+
+/*
+ * Version 1 returns the same initial fields as version 0, with additional
+ * fields following.
+ *
+ * gcc anonymous structs don't seem to get along with the __packed directive;
+ * if they did we'd define the version 0 struct as a sub-struct of this one.
+ */
+struct ec_response_flash_info_1 {
+ /* Version 0 fields; see above for description */
+ uint32_t flash_size;
+ uint32_t write_block_size;
+ uint32_t erase_block_size;
+ uint32_t protect_block_size;
+
+ /* Version 1 adds these fields: */
+ /*
+ * Ideal write size in bytes. Writes will be fastest if size is
+ * exactly this and offset is a multiple of this. For example, an EC
+ * may have a write buffer which can do half-page operations if data is
+ * aligned, and a slower word-at-a-time write mode.
+ */
+ uint32_t write_ideal_size;
+
+ /* Flags; see EC_FLASH_INFO_* */
+ uint32_t flags;
+} __packed;
+
/*
* Read flash
*
@@ -459,15 +786,15 @@ struct ec_params_flash_read {
/* Write flash */
#define EC_CMD_FLASH_WRITE 0x12
+#define EC_VER_FLASH_WRITE 1
+
+/* Version 0 of the flash command supported only 64 bytes of data */
+#define EC_FLASH_WRITE_VER0_SIZE 64
struct ec_params_flash_write {
uint32_t offset; /* Byte offset to write */
uint32_t size; /* Size to write in bytes */
- /*
- * Data to write. Could really use EC_PARAM_SIZE - 8, but tidiest to
- * use a power of 2 so writes stay aligned.
- */
- uint8_t data[64];
+ /* Followed by data to write */
} __packed;
/* Erase flash */
@@ -543,7 +870,7 @@ struct ec_response_flash_protect {
enum ec_flash_region {
/* Region which holds read-only EC image */
- EC_FLASH_REGION_RO,
+ EC_FLASH_REGION_RO = 0,
/* Region which holds rewritable EC image */
EC_FLASH_REGION_RW,
/*
@@ -551,6 +878,8 @@ enum ec_flash_region {
* EC_FLASH_REGION_RO)
*/
EC_FLASH_REGION_WP_RO,
+ /* Number of regions */
+ EC_FLASH_REGION_COUNT,
};
struct ec_params_flash_region_info {
@@ -639,15 +968,15 @@ struct rgb_s {
*/
struct lightbar_params {
/* Timing */
- int google_ramp_up;
- int google_ramp_down;
- int s3s0_ramp_up;
- int s0_tick_delay[2]; /* AC=0/1 */
- int s0a_tick_delay[2]; /* AC=0/1 */
- int s0s3_ramp_down;
- int s3_sleep_for;
- int s3_ramp_up;
- int s3_ramp_down;
+ int32_t google_ramp_up;
+ int32_t google_ramp_down;
+ int32_t s3s0_ramp_up;
+ int32_t s0_tick_delay[2]; /* AC=0/1 */
+ int32_t s0a_tick_delay[2]; /* AC=0/1 */
+ int32_t s0s3_ramp_down;
+ int32_t s3_sleep_for;
+ int32_t s3_ramp_up;
+ int32_t s3_ramp_down;
/* Oscillation */
uint8_t new_s0;
@@ -676,7 +1005,7 @@ struct ec_params_lightbar {
union {
struct {
/* no args */
- } dump, off, on, init, get_seq, get_params;
+ } dump, off, on, init, get_seq, get_params, version;
struct num {
uint8_t num;
@@ -710,6 +1039,11 @@ struct ec_response_lightbar {
struct lightbar_params get_params;
+ struct version {
+ uint32_t num;
+ uint32_t flags;
+ } version;
+
struct {
/* no return params */
} off, on, init, brightness, seq, reg, rgb, demo, set_params;
@@ -730,10 +1064,62 @@ enum lightbar_command {
LIGHTBAR_CMD_DEMO = 9,
LIGHTBAR_CMD_GET_PARAMS = 10,
LIGHTBAR_CMD_SET_PARAMS = 11,
+ LIGHTBAR_CMD_VERSION = 12,
LIGHTBAR_NUM_CMDS
};
/*****************************************************************************/
+/* LED control commands */
+
+#define EC_CMD_LED_CONTROL 0x29
+
+enum ec_led_id {
+ /* LED to indicate battery state of charge */
+ EC_LED_ID_BATTERY_LED = 0,
+ /*
+ * LED to indicate system power state (on or in suspend).
+ * May be on power button or on C-panel.
+ */
+ EC_LED_ID_POWER_LED,
+ /* LED on power adapter or its plug */
+ EC_LED_ID_ADAPTER_LED,
+
+ EC_LED_ID_COUNT
+};
+
+/* LED control flags */
+#define EC_LED_FLAGS_QUERY (1 << 0) /* Query LED capability only */
+#define EC_LED_FLAGS_AUTO (1 << 1) /* Switch LED back to automatic control */
+
+enum ec_led_colors {
+ EC_LED_COLOR_RED = 0,
+ EC_LED_COLOR_GREEN,
+ EC_LED_COLOR_BLUE,
+ EC_LED_COLOR_YELLOW,
+ EC_LED_COLOR_WHITE,
+
+ EC_LED_COLOR_COUNT
+};
+
+struct ec_params_led_control {
+ uint8_t led_id; /* Which LED to control */
+ uint8_t flags; /* Control flags */
+
+ uint8_t brightness[EC_LED_COLOR_COUNT];
+} __packed;
+
+struct ec_response_led_control {
+ /*
+ * Available brightness value range.
+ *
+ * Range 0 means color channel not present.
+ * Range 1 means on/off control.
+ * Other values means the LED is control by PWM.
+ */
+ uint8_t brightness_range[EC_LED_COLOR_COUNT];
+} __packed;
+
+/*****************************************************************************/
/* Verified boot commands */
/*
@@ -790,6 +1176,181 @@ enum ec_vboot_hash_status {
#define EC_VBOOT_HASH_OFFSET_RW 0xfffffffd
/*****************************************************************************/
+/*
+ * Motion sense commands. We'll make separate structs for sub-commands with
+ * different input args, so that we know how much to expect.
+ */
+#define EC_CMD_MOTION_SENSE_CMD 0x2B
+
+/* Motion sense commands */
+enum motionsense_command {
+ /*
+ * Dump command returns all motion sensor data including motion sense
+ * module flags and individual sensor flags.
+ */
+ MOTIONSENSE_CMD_DUMP = 0,
+
+ /*
+ * Info command returns data describing the details of a given sensor,
+ * including enum motionsensor_type, enum motionsensor_location, and
+ * enum motionsensor_chip.
+ */
+ MOTIONSENSE_CMD_INFO = 1,
+
+ /*
+ * EC Rate command is a setter/getter command for the EC sampling rate
+ * of all motion sensors in milliseconds.
+ */
+ MOTIONSENSE_CMD_EC_RATE = 2,
+
+ /*
+ * Sensor ODR command is a setter/getter command for the output data
+ * rate of a specific motion sensor in millihertz.
+ */
+ MOTIONSENSE_CMD_SENSOR_ODR = 3,
+
+ /*
+ * Sensor range command is a setter/getter command for the range of
+ * a specified motion sensor in +/-G's or +/- deg/s.
+ */
+ MOTIONSENSE_CMD_SENSOR_RANGE = 4,
+
+ /*
+ * Setter/getter command for the keyboard wake angle. When the lid
+ * angle is greater than this value, keyboard wake is disabled in S3,
+ * and when the lid angle goes less than this value, keyboard wake is
+ * enabled. Note, the lid angle measurement is an approximate,
+ * un-calibrated value, hence the wake angle isn't exact.
+ */
+ MOTIONSENSE_CMD_KB_WAKE_ANGLE = 5,
+
+ /* Number of motionsense sub-commands. */
+ MOTIONSENSE_NUM_CMDS
+};
+
+enum motionsensor_id {
+ EC_MOTION_SENSOR_ACCEL_BASE = 0,
+ EC_MOTION_SENSOR_ACCEL_LID = 1,
+ EC_MOTION_SENSOR_GYRO = 2,
+
+ /*
+ * Note, if more sensors are added and this count changes, the padding
+ * in ec_response_motion_sense dump command must be modified.
+ */
+ EC_MOTION_SENSOR_COUNT = 3
+};
+
+/* List of motion sensor types. */
+enum motionsensor_type {
+ MOTIONSENSE_TYPE_ACCEL = 0,
+ MOTIONSENSE_TYPE_GYRO = 1,
+};
+
+/* List of motion sensor locations. */
+enum motionsensor_location {
+ MOTIONSENSE_LOC_BASE = 0,
+ MOTIONSENSE_LOC_LID = 1,
+};
+
+/* List of motion sensor chips. */
+enum motionsensor_chip {
+ MOTIONSENSE_CHIP_KXCJ9 = 0,
+};
+
+/* Module flag masks used for the dump sub-command. */
+#define MOTIONSENSE_MODULE_FLAG_ACTIVE (1<<0)
+
+/* Sensor flag masks used for the dump sub-command. */
+#define MOTIONSENSE_SENSOR_FLAG_PRESENT (1<<0)
+
+/*
+ * Send this value for the data element to only perform a read. If you
+ * send any other value, the EC will interpret it as data to set and will
+ * return the actual value set.
+ */
+#define EC_MOTION_SENSE_NO_VALUE -1
+
+struct ec_params_motion_sense {
+ uint8_t cmd;
+ union {
+ /* Used for MOTIONSENSE_CMD_DUMP. */
+ struct {
+ /* no args */
+ } dump;
+
+ /*
+ * Used for MOTIONSENSE_CMD_EC_RATE and
+ * MOTIONSENSE_CMD_KB_WAKE_ANGLE.
+ */
+ struct {
+ /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */
+ int16_t data;
+ } ec_rate, kb_wake_angle;
+
+ /* Used for MOTIONSENSE_CMD_INFO. */
+ struct {
+ /* Should be element of enum motionsensor_id. */
+ uint8_t sensor_num;
+ } info;
+
+ /*
+ * Used for MOTIONSENSE_CMD_SENSOR_ODR and
+ * MOTIONSENSE_CMD_SENSOR_RANGE.
+ */
+ struct {
+ /* Should be element of enum motionsensor_id. */
+ uint8_t sensor_num;
+
+ /* Rounding flag, true for round-up, false for down. */
+ uint8_t roundup;
+
+ uint16_t reserved;
+
+ /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */
+ int32_t data;
+ } sensor_odr, sensor_range;
+ };
+} __packed;
+
+struct ec_response_motion_sense {
+ union {
+ /* Used for MOTIONSENSE_CMD_DUMP. */
+ struct {
+ /* Flags representing the motion sensor module. */
+ uint8_t module_flags;
+
+ /* Flags for each sensor in enum motionsensor_id. */
+ uint8_t sensor_flags[EC_MOTION_SENSOR_COUNT];
+
+ /* Array of all sensor data. Each sensor is 3-axis. */
+ int16_t data[3*EC_MOTION_SENSOR_COUNT];
+ } dump;
+
+ /* Used for MOTIONSENSE_CMD_INFO. */
+ struct {
+ /* Should be element of enum motionsensor_type. */
+ uint8_t type;
+
+ /* Should be element of enum motionsensor_location. */
+ uint8_t location;
+
+ /* Should be element of enum motionsensor_chip. */
+ uint8_t chip;
+ } info;
+
+ /*
+ * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR,
+ * MOTIONSENSE_CMD_SENSOR_RANGE, and
+ * MOTIONSENSE_CMD_KB_WAKE_ANGLE.
+ */
+ struct {
+ /* Current value of the parameter queried. */
+ int32_t ret;
+ } ec_rate, sensor_odr, sensor_range, kb_wake_angle;
+ };
+} __packed;
+
+/*****************************************************************************/
/* USB charging control commands */
/* Set USB port charging mode */
@@ -868,20 +1429,27 @@ struct ec_response_port80_last_boot {
} __packed;
/*****************************************************************************/
-/* Thermal engine commands */
+/* Thermal engine commands. Note that there are two implementations. We'll
+ * reuse the command number, but the data and behavior is incompatible.
+ * Version 0 is what originally shipped on Link.
+ * Version 1 separates the CPU thermal limits from the fan control.
+ */
-/* Set thershold value */
#define EC_CMD_THERMAL_SET_THRESHOLD 0x50
+#define EC_CMD_THERMAL_GET_THRESHOLD 0x51
+
+/* The version 0 structs are opaque. You have to know what they are for
+ * the get/set commands to make any sense.
+ */
+/* Version 0 - set */
struct ec_params_thermal_set_threshold {
uint8_t sensor_type;
uint8_t threshold_id;
uint16_t value;
} __packed;
-/* Get threshold value */
-#define EC_CMD_THERMAL_GET_THRESHOLD 0x51
-
+/* Version 0 - get */
struct ec_params_thermal_get_threshold {
uint8_t sensor_type;
uint8_t threshold_id;
@@ -891,6 +1459,41 @@ struct ec_response_thermal_get_threshold {
uint16_t value;
} __packed;
+
+/* The version 1 structs are visible. */
+enum ec_temp_thresholds {
+ EC_TEMP_THRESH_WARN = 0,
+ EC_TEMP_THRESH_HIGH,
+ EC_TEMP_THRESH_HALT,
+
+ EC_TEMP_THRESH_COUNT
+};
+
+/* Thermal configuration for one temperature sensor. Temps are in degrees K.
+ * Zero values will be silently ignored by the thermal task.
+ */
+struct ec_thermal_config {
+ uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */
+ uint32_t temp_fan_off; /* no active cooling needed */
+ uint32_t temp_fan_max; /* max active cooling needed */
+} __packed;
+
+/* Version 1 - get config for one sensor. */
+struct ec_params_thermal_get_threshold_v1 {
+ uint32_t sensor_num;
+} __packed;
+/* This returns a struct ec_thermal_config */
+
+/* Version 1 - set config for one sensor.
+ * Use read-modify-write for best results! */
+struct ec_params_thermal_set_threshold_v1 {
+ uint32_t sensor_num;
+ struct ec_thermal_config cfg;
+} __packed;
+/* This returns no data */
+
+/****************************************************************************/
+
/* Toggle automatic fan control */
#define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x52
@@ -920,6 +1523,18 @@ struct ec_params_tmp006_set_calibration {
float b2;
} __packed;
+/* Read raw TMP006 data */
+#define EC_CMD_TMP006_GET_RAW 0x55
+
+struct ec_params_tmp006_get_raw {
+ uint8_t index;
+} __packed;
+
+struct ec_response_tmp006_get_raw {
+ int32_t t; /* In 1/100 K */
+ int32_t v; /* In nV */
+};
+
/*****************************************************************************/
/* MKBP - Matrix KeyBoard Protocol */
@@ -1118,11 +1733,41 @@ struct ec_params_switch_enable_backlight {
/* Enable/disable WLAN/Bluetooth */
#define EC_CMD_SWITCH_ENABLE_WIRELESS 0x91
+#define EC_VER_SWITCH_ENABLE_WIRELESS 1
-struct ec_params_switch_enable_wireless {
+/* Version 0 params; no response */
+struct ec_params_switch_enable_wireless_v0 {
uint8_t enabled;
} __packed;
+/* Version 1 params */
+struct ec_params_switch_enable_wireless_v1 {
+ /* Flags to enable now */
+ uint8_t now_flags;
+
+ /* Which flags to copy from now_flags */
+ uint8_t now_mask;
+
+ /*
+ * Flags to leave enabled in S3, if they're on at the S0->S3
+ * transition. (Other flags will be disabled by the S0->S3
+ * transition.)
+ */
+ uint8_t suspend_flags;
+
+ /* Which flags to copy from suspend_flags */
+ uint8_t suspend_mask;
+} __packed;
+
+/* Version 1 response */
+struct ec_response_switch_enable_wireless_v1 {
+ /* Flags to enable now */
+ uint8_t now_flags;
+
+ /* Flags to leave enabled in S3 */
+ uint8_t suspend_flags;
+} __packed;
+
/*****************************************************************************/
/* GPIO commands. Only available on EC if write protect has been disabled. */
@@ -1147,11 +1792,16 @@ struct ec_response_gpio_get {
/*****************************************************************************/
/* I2C commands. Only available when flash write protect is unlocked. */
+/*
+ * TODO(crosbug.com/p/23570): These commands are deprecated, and will be
+ * removed soon. Use EC_CMD_I2C_XFER instead.
+ */
+
/* Read I2C bus */
#define EC_CMD_I2C_READ 0x94
struct ec_params_i2c_read {
- uint16_t addr;
+ uint16_t addr; /* 8-bit address (7-bit shifted << 1) */
uint8_t read_size; /* Either 8 or 16. */
uint8_t port;
uint8_t offset;
@@ -1165,7 +1815,7 @@ struct ec_response_i2c_read {
struct ec_params_i2c_write {
uint16_t data;
- uint16_t addr;
+ uint16_t addr; /* 8-bit address (7-bit shifted << 1) */
uint8_t write_size; /* Either 8 or 16. */
uint8_t port;
uint8_t offset;
@@ -1174,11 +1824,20 @@ struct ec_params_i2c_write {
/*****************************************************************************/
/* Charge state commands. Only available when flash write protect unlocked. */
-/* Force charge state machine to stop in idle mode */
-#define EC_CMD_CHARGE_FORCE_IDLE 0x96
+/* Force charge state machine to stop charging the battery or force it to
+ * discharge the battery.
+ */
+#define EC_CMD_CHARGE_CONTROL 0x96
+#define EC_VER_CHARGE_CONTROL 1
-struct ec_params_force_idle {
- uint8_t enabled;
+enum ec_charge_control_mode {
+ CHARGE_CONTROL_NORMAL = 0,
+ CHARGE_CONTROL_IDLE,
+ CHARGE_CONTROL_DISCHARGE,
+};
+
+struct ec_params_charge_control {
+ uint32_t mode; /* enum charge_control_mode */
} __packed;
/*****************************************************************************/
@@ -1206,14 +1865,231 @@ struct ec_params_force_idle {
#define EC_CMD_BATTERY_CUT_OFF 0x99
/*****************************************************************************/
-/* Temporary debug commands. TODO: remove this crosbug.com/p/13849 */
+/* USB port mux control. */
/*
- * Dump charge state machine context.
- *
- * Response is a binary dump of charge state machine context.
+ * Switch USB mux or return to automatic switching.
+ */
+#define EC_CMD_USB_MUX 0x9a
+
+struct ec_params_usb_mux {
+ uint8_t mux;
+} __packed;
+
+/*****************************************************************************/
+/* LDOs / FETs control. */
+
+enum ec_ldo_state {
+ EC_LDO_STATE_OFF = 0, /* the LDO / FET is shut down */
+ EC_LDO_STATE_ON = 1, /* the LDO / FET is ON / providing power */
+};
+
+/*
+ * Switch on/off a LDO.
+ */
+#define EC_CMD_LDO_SET 0x9b
+
+struct ec_params_ldo_set {
+ uint8_t index;
+ uint8_t state;
+} __packed;
+
+/*
+ * Get LDO state.
+ */
+#define EC_CMD_LDO_GET 0x9c
+
+struct ec_params_ldo_get {
+ uint8_t index;
+} __packed;
+
+struct ec_response_ldo_get {
+ uint8_t state;
+} __packed;
+
+/*****************************************************************************/
+/* Power info. */
+
+/*
+ * Get power info.
+ */
+#define EC_CMD_POWER_INFO 0x9d
+
+struct ec_response_power_info {
+ uint32_t usb_dev_type;
+ uint16_t voltage_ac;
+ uint16_t voltage_system;
+ uint16_t current_system;
+ uint16_t usb_current_limit;
+} __packed;
+
+/*****************************************************************************/
+/* I2C passthru command */
+
+#define EC_CMD_I2C_PASSTHRU 0x9e
+
+/* Slave address is 10 (not 7) bit */
+#define EC_I2C_FLAG_10BIT (1 << 16)
+
+/* Read data; if not present, message is a write */
+#define EC_I2C_FLAG_READ (1 << 15)
+
+/* Mask for address */
+#define EC_I2C_ADDR_MASK 0x3ff
+
+#define EC_I2C_STATUS_NAK (1 << 0) /* Transfer was not acknowledged */
+#define EC_I2C_STATUS_TIMEOUT (1 << 1) /* Timeout during transfer */
+
+/* Any error */
+#define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT)
+
+struct ec_params_i2c_passthru_msg {
+ uint16_t addr_flags; /* I2C slave address (7 or 10 bits) and flags */
+ uint16_t len; /* Number of bytes to read or write */
+} __packed;
+
+struct ec_params_i2c_passthru {
+ uint8_t port; /* I2C port number */
+ uint8_t num_msgs; /* Number of messages */
+ struct ec_params_i2c_passthru_msg msg[];
+ /* Data to write for all messages is concatenated here */
+} __packed;
+
+struct ec_response_i2c_passthru {
+ uint8_t i2c_status; /* Status flags (EC_I2C_STATUS_...) */
+ uint8_t num_msgs; /* Number of messages processed */
+ uint8_t data[]; /* Data read by messages concatenated here */
+} __packed;
+
+/*****************************************************************************/
+/* Power button hang detect */
+
+#define EC_CMD_HANG_DETECT 0x9f
+
+/* Reasons to start hang detection timer */
+/* Power button pressed */
+#define EC_HANG_START_ON_POWER_PRESS (1 << 0)
+
+/* Lid closed */
+#define EC_HANG_START_ON_LID_CLOSE (1 << 1)
+
+ /* Lid opened */
+#define EC_HANG_START_ON_LID_OPEN (1 << 2)
+
+/* Start of AP S3->S0 transition (booting or resuming from suspend) */
+#define EC_HANG_START_ON_RESUME (1 << 3)
+
+/* Reasons to cancel hang detection */
+
+/* Power button released */
+#define EC_HANG_STOP_ON_POWER_RELEASE (1 << 8)
+
+/* Any host command from AP received */
+#define EC_HANG_STOP_ON_HOST_COMMAND (1 << 9)
+
+/* Stop on end of AP S0->S3 transition (suspending or shutting down) */
+#define EC_HANG_STOP_ON_SUSPEND (1 << 10)
+
+/*
+ * If this flag is set, all the other fields are ignored, and the hang detect
+ * timer is started. This provides the AP a way to start the hang timer
+ * without reconfiguring any of the other hang detect settings. Note that
+ * you must previously have configured the timeouts.
+ */
+#define EC_HANG_START_NOW (1 << 30)
+
+/*
+ * If this flag is set, all the other fields are ignored (including
+ * EC_HANG_START_NOW). This provides the AP a way to stop the hang timer
+ * without reconfiguring any of the other hang detect settings.
*/
-#define EC_CMD_CHARGE_DUMP 0xa0
+#define EC_HANG_STOP_NOW (1 << 31)
+
+struct ec_params_hang_detect {
+ /* Flags; see EC_HANG_* */
+ uint32_t flags;
+
+ /* Timeout in msec before generating host event, if enabled */
+ uint16_t host_event_timeout_msec;
+
+ /* Timeout in msec before generating warm reboot, if enabled */
+ uint16_t warm_reboot_timeout_msec;
+} __packed;
+
+/*****************************************************************************/
+/* Commands for battery charging */
+
+/*
+ * This is the single catch-all host command to exchange data regarding the
+ * charge state machine (v2 and up).
+ */
+#define EC_CMD_CHARGE_STATE 0xa0
+
+/* Subcommands for this host command */
+enum charge_state_command {
+ CHARGE_STATE_CMD_GET_STATE,
+ CHARGE_STATE_CMD_GET_PARAM,
+ CHARGE_STATE_CMD_SET_PARAM,
+ CHARGE_STATE_NUM_CMDS
+};
+
+/*
+ * Known param numbers are defined here. Ranges are reserved for board-specific
+ * params, which are handled by the particular implementations.
+ */
+enum charge_state_params {
+ CS_PARAM_CHG_VOLTAGE, /* charger voltage limit */
+ CS_PARAM_CHG_CURRENT, /* charger current limit */
+ CS_PARAM_CHG_INPUT_CURRENT, /* charger input current limit */
+ CS_PARAM_CHG_STATUS, /* charger-specific status */
+ CS_PARAM_CHG_OPTION, /* charger-specific options */
+ /* How many so far? */
+ CS_NUM_BASE_PARAMS,
+
+ /* Range for CONFIG_CHARGER_PROFILE_OVERRIDE params */
+ CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000,
+ CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff,
+
+ /* Other custom param ranges go here... */
+};
+
+struct ec_params_charge_state {
+ uint8_t cmd; /* enum charge_state_command */
+ union {
+ struct {
+ /* no args */
+ } get_state;
+
+ struct {
+ uint32_t param; /* enum charge_state_param */
+ } get_param;
+
+ struct {
+ uint32_t param; /* param to set */
+ uint32_t value; /* value to set */
+ } set_param;
+ };
+} __packed;
+
+struct ec_response_charge_state {
+ union {
+ struct {
+ int ac;
+ int chg_voltage;
+ int chg_current;
+ int chg_input_current;
+ int batt_state_of_charge;
+ } get_state;
+
+ struct {
+ uint32_t value;
+ } get_param;
+ struct {
+ /* no return values */
+ } set_param;
+ };
+} __packed;
+
/*
* Set maximum battery charging current.
@@ -1221,15 +2097,59 @@ struct ec_params_force_idle {
#define EC_CMD_CHARGE_CURRENT_LIMIT 0xa1
struct ec_params_current_limit {
- uint32_t limit;
+ uint32_t limit; /* in mA */
+} __packed;
+
+/*
+ * Set maximum external power current.
+ */
+#define EC_CMD_EXT_POWER_CURRENT_LIMIT 0xa2
+
+struct ec_params_ext_power_current_limit {
+ uint32_t limit; /* in mA */
+} __packed;
+
+/*****************************************************************************/
+/* Smart battery pass-through */
+
+/* Get / Set 16-bit smart battery registers */
+#define EC_CMD_SB_READ_WORD 0xb0
+#define EC_CMD_SB_WRITE_WORD 0xb1
+
+/* Get / Set string smart battery parameters
+ * formatted as SMBUS "block".
+ */
+#define EC_CMD_SB_READ_BLOCK 0xb2
+#define EC_CMD_SB_WRITE_BLOCK 0xb3
+
+struct ec_params_sb_rd {
+ uint8_t reg;
+} __packed;
+
+struct ec_response_sb_rd_word {
+ uint16_t value;
+} __packed;
+
+struct ec_params_sb_wr_word {
+ uint8_t reg;
+ uint16_t value;
+} __packed;
+
+struct ec_response_sb_rd_block {
+ uint8_t data[32];
+} __packed;
+
+struct ec_params_sb_wr_block {
+ uint8_t reg;
+ uint16_t data[32];
} __packed;
/*****************************************************************************/
/* System commands */
/*
- * TODO: this is a confusing name, since it doesn't necessarily reboot the EC.
- * Rename to "set image" or something similar.
+ * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't
+ * necessarily reboot the EC. Rename to "image" or something similar?
*/
#define EC_CMD_REBOOT_EC 0xd2
@@ -1308,6 +2228,7 @@ struct ec_params_reboot_ec {
#define EC_CMD_ACPI_QUERY_EVENT 0x84
/* Valid addresses in ACPI memory space, for read/write commands */
+
/* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */
#define EC_ACPI_MEM_VERSION 0x00
/*
@@ -1317,8 +2238,60 @@ struct ec_params_reboot_ec {
#define EC_ACPI_MEM_TEST 0x01
/* Test compliment; writes here are ignored. */
#define EC_ACPI_MEM_TEST_COMPLIMENT 0x02
+
/* Keyboard backlight brightness percent (0 - 100) */
#define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03
+/* DPTF Target Fan Duty (0-100, 0xff for auto/none) */
+#define EC_ACPI_MEM_FAN_DUTY 0x04
+
+/*
+ * DPTF temp thresholds. Any of the EC's temp sensors can have up to two
+ * independent thresholds attached to them. The current value of the ID
+ * register determines which sensor is affected by the THRESHOLD and COMMIT
+ * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme
+ * as the memory-mapped sensors. The COMMIT register applies those settings.
+ *
+ * The spec does not mandate any way to read back the threshold settings
+ * themselves, but when a threshold is crossed the AP needs a way to determine
+ * which sensor(s) are responsible. Each reading of the ID register clears and
+ * returns one sensor ID that has crossed one of its threshold (in either
+ * direction) since the last read. A value of 0xFF means "no new thresholds
+ * have tripped". Setting or enabling the thresholds for a sensor will clear
+ * the unread event count for that sensor.
+ */
+#define EC_ACPI_MEM_TEMP_ID 0x05
+#define EC_ACPI_MEM_TEMP_THRESHOLD 0x06
+#define EC_ACPI_MEM_TEMP_COMMIT 0x07
+/*
+ * Here are the bits for the COMMIT register:
+ * bit 0 selects the threshold index for the chosen sensor (0/1)
+ * bit 1 enables/disables the selected threshold (0 = off, 1 = on)
+ * Each write to the commit register affects one threshold.
+ */
+#define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK (1 << 0)
+#define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK (1 << 1)
+/*
+ * Example:
+ *
+ * Set the thresholds for sensor 2 to 50 C and 60 C:
+ * write 2 to [0x05] -- select temp sensor 2
+ * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET
+ * write 0x2 to [0x07] -- enable threshold 0 with this value
+ * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET
+ * write 0x3 to [0x07] -- enable threshold 1 with this value
+ *
+ * Disable the 60 C threshold, leaving the 50 C threshold unchanged:
+ * write 2 to [0x05] -- select temp sensor 2
+ * write 0x1 to [0x07] -- disable threshold 1
+ */
+
+/* DPTF battery charging current limit */
+#define EC_ACPI_MEM_CHARGING_LIMIT 0x08
+
+/* Charging limit is specified in 64 mA steps */
+#define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64
+/* Value to disable DPTF battery charging limit */
+#define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff
/* Current version of ACPI memory address space */
#define EC_ACPI_MEM_VERSION_CURRENT 1
@@ -1360,10 +2333,21 @@ struct ec_params_reboot_ec {
* Header bytes greater than this indicate a later version. For example,
* EC_CMD_VERSION0 + 1 means we are using version 1.
*
- * The old EC interface must not use commands 0dc or higher.
+ * The old EC interface must not use commands 0xdc or higher.
*/
#define EC_CMD_VERSION0 0xdc
#endif /* !__ACPI__ */
+/*****************************************************************************/
+/*
+ * Deprecated constants. These constants have been renamed for clarity. The
+ * meaning and size has not changed. Programs that use the old names should
+ * switch to the new names soon, as the old names may not be carried forward
+ * forever.
+ */
+#define EC_HOST_PARAM_SIZE EC_PROTO2_MAX_PARAM_SIZE
+#define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1
+#define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE
+
#endif /* __CROS_EC_COMMANDS_H */
diff --git a/include/linux/mfd/ipaq-micro.h b/include/linux/mfd/ipaq-micro.h
new file mode 100644
index 000000000000..5c4d29f6674f
--- /dev/null
+++ b/include/linux/mfd/ipaq-micro.h
@@ -0,0 +1,148 @@
+/*
+ * Header file for the compaq Micro MFD
+ */
+
+#ifndef _MFD_IPAQ_MICRO_H_
+#define _MFD_IPAQ_MICRO_H_
+
+#include <linux/spinlock.h>
+#include <linux/completion.h>
+#include <linux/list.h>
+
+#define TX_BUF_SIZE 32
+#define RX_BUF_SIZE 16
+#define CHAR_SOF 0x02
+
+/*
+ * These are the different messages that can be sent to the microcontroller
+ * to control various aspects.
+ */
+#define MSG_VERSION 0x0
+#define MSG_KEYBOARD 0x2
+#define MSG_TOUCHSCREEN 0x3
+#define MSG_EEPROM_READ 0x4
+#define MSG_EEPROM_WRITE 0x5
+#define MSG_THERMAL_SENSOR 0x6
+#define MSG_NOTIFY_LED 0x8
+#define MSG_BATTERY 0x9
+#define MSG_SPI_READ 0xb
+#define MSG_SPI_WRITE 0xc
+#define MSG_BACKLIGHT 0xd /* H3600 only */
+#define MSG_CODEC_CTRL 0xe /* H3100 only */
+#define MSG_DISPLAY_CTRL 0xf /* H3100 only */
+
+/* state of receiver parser */
+enum rx_state {
+ STATE_SOF = 0, /* Next byte should be start of frame */
+ STATE_ID, /* Next byte is ID & message length */
+ STATE_DATA, /* Next byte is a data byte */
+ STATE_CHKSUM /* Next byte should be checksum */
+};
+
+/**
+ * struct ipaq_micro_txdev - TX state
+ * @len: length of message in TX buffer
+ * @index: current index into TX buffer
+ * @buf: TX buffer
+ */
+struct ipaq_micro_txdev {
+ u8 len;
+ u8 index;
+ u8 buf[TX_BUF_SIZE];
+};
+
+/**
+ * struct ipaq_micro_rxdev - RX state
+ * @state: context of RX state machine
+ * @chksum: calculated checksum
+ * @id: message ID from packet
+ * @len: RX buffer length
+ * @index: RX buffer index
+ * @buf: RX buffer
+ */
+struct ipaq_micro_rxdev {
+ enum rx_state state;
+ unsigned char chksum;
+ u8 id;
+ unsigned int len;
+ unsigned int index;
+ u8 buf[RX_BUF_SIZE];
+};
+
+/**
+ * struct ipaq_micro_msg - message to the iPAQ microcontroller
+ * @id: 4-bit ID of the message
+ * @tx_len: length of TX data
+ * @tx_data: TX data to send
+ * @rx_len: length of receieved RX data
+ * @rx_data: RX data to recieve
+ * @ack: a completion that will be completed when RX is complete
+ * @node: list node if message gets queued
+ */
+struct ipaq_micro_msg {
+ u8 id;
+ u8 tx_len;
+ u8 tx_data[TX_BUF_SIZE];
+ u8 rx_len;
+ u8 rx_data[RX_BUF_SIZE];
+ struct completion ack;
+ struct list_head node;
+};
+
+/**
+ * struct ipaq_micro - iPAQ microcontroller state
+ * @dev: corresponding platform device
+ * @base: virtual memory base for underlying serial device
+ * @sdlc: virtual memory base for Synchronous Data Link Controller
+ * @version: version string
+ * @tx: TX state
+ * @rx: RX state
+ * @lock: lock for this state container
+ * @msg: current message
+ * @queue: message queue
+ * @key: callback for asynchronous key events
+ * @key_data: data to pass along with key events
+ * @ts: callback for asynchronous touchscreen events
+ * @ts_data: data to pass along with key events
+ */
+struct ipaq_micro {
+ struct device *dev;
+ void __iomem *base;
+ void __iomem *sdlc;
+ char version[5];
+ struct ipaq_micro_txdev tx; /* transmit ISR state */
+ struct ipaq_micro_rxdev rx; /* receive ISR state */
+ spinlock_t lock;
+ struct ipaq_micro_msg *msg;
+ struct list_head queue;
+ void (*key) (void *data, int len, unsigned char *rxdata);
+ void *key_data;
+ void (*ts) (void *data, int len, unsigned char *rxdata);
+ void *ts_data;
+};
+
+extern int
+ipaq_micro_tx_msg(struct ipaq_micro *micro, struct ipaq_micro_msg *msg);
+
+static inline int
+ipaq_micro_tx_msg_sync(struct ipaq_micro *micro,
+ struct ipaq_micro_msg *msg)
+{
+ int ret;
+
+ init_completion(&msg->ack);
+ ret = ipaq_micro_tx_msg(micro, msg);
+ wait_for_completion(&msg->ack);
+
+ return ret;
+}
+
+static inline int
+ipaq_micro_tx_msg_async(struct ipaq_micro *micro,
+ struct ipaq_micro_msg *msg)
+{
+ init_completion(&msg->ack);
+ return ipaq_micro_tx_msg(micro, msg);
+}
+
+#endif /* _MFD_IPAQ_MICRO_H_ */
diff --git a/include/linux/mfd/kempld.h b/include/linux/mfd/kempld.h
index b911ef3add03..26e0b469e567 100644
--- a/include/linux/mfd/kempld.h
+++ b/include/linux/mfd/kempld.h
@@ -51,6 +51,8 @@
#define KEMPLD_TYPE_DEBUG 0x1
#define KEMPLD_TYPE_CUSTOM 0x2
+#define KEMPLD_VERSION_LEN 10
+
/**
* struct kempld_info - PLD device information structure
* @major: PLD major revision
@@ -60,6 +62,7 @@
* @type: PLD type
* @spec_major: PLD FW specification major revision
* @spec_minor: PLD FW specification minor revision
+ * @version: PLD version string
*/
struct kempld_info {
unsigned int major;
@@ -69,6 +72,7 @@ struct kempld_info {
unsigned int type;
unsigned int spec_major;
unsigned int spec_minor;
+ char version[KEMPLD_VERSION_LEN];
};
/**
diff --git a/include/linux/mfd/max14577-private.h b/include/linux/mfd/max14577-private.h
index c9b332fb0d5d..499253604026 100644
--- a/include/linux/mfd/max14577-private.h
+++ b/include/linux/mfd/max14577-private.h
@@ -1,7 +1,7 @@
/*
- * max14577-private.h - Common API for the Maxim 14577 internal sub chip
+ * max14577-private.h - Common API for the Maxim 14577/77836 internal sub chip
*
- * Copyright (C) 2013 Samsung Electrnoics
+ * Copyright (C) 2014 Samsung Electrnoics
* Chanwoo Choi <cw00.choi@samsung.com>
* Krzysztof Kozlowski <k.kozlowski@samsung.com>
*
@@ -22,9 +22,19 @@
#include <linux/i2c.h>
#include <linux/regmap.h>
-#define MAX14577_REG_INVALID (0xff)
+#define I2C_ADDR_PMIC (0x46 >> 1)
+#define I2C_ADDR_MUIC (0x4A >> 1)
+#define I2C_ADDR_FG (0x6C >> 1)
-/* Slave addr = 0x4A: Interrupt */
+enum maxim_device_type {
+ MAXIM_DEVICE_TYPE_UNKNOWN = 0,
+ MAXIM_DEVICE_TYPE_MAX14577,
+ MAXIM_DEVICE_TYPE_MAX77836,
+
+ MAXIM_DEVICE_TYPE_NUM,
+};
+
+/* Slave addr = 0x4A: MUIC and Charger */
enum max14577_reg {
MAX14577_REG_DEVICEID = 0x00,
MAX14577_REG_INT1 = 0x01,
@@ -74,20 +84,22 @@ enum max14577_muic_charger_type {
};
/* MAX14577 interrupts */
-#define INT1_ADC_MASK (0x1 << 0)
-#define INT1_ADCLOW_MASK (0x1 << 1)
-#define INT1_ADCERR_MASK (0x1 << 2)
-
-#define INT2_CHGTYP_MASK (0x1 << 0)
-#define INT2_CHGDETRUN_MASK (0x1 << 1)
-#define INT2_DCDTMR_MASK (0x1 << 2)
-#define INT2_DBCHG_MASK (0x1 << 3)
-#define INT2_VBVOLT_MASK (0x1 << 4)
-
-#define INT3_EOC_MASK (0x1 << 0)
-#define INT3_CGMBC_MASK (0x1 << 1)
-#define INT3_OVP_MASK (0x1 << 2)
-#define INT3_MBCCHGERR_MASK (0x1 << 3)
+#define MAX14577_INT1_ADC_MASK BIT(0)
+#define MAX14577_INT1_ADCLOW_MASK BIT(1)
+#define MAX14577_INT1_ADCERR_MASK BIT(2)
+#define MAX77836_INT1_ADC1K_MASK BIT(3)
+
+#define MAX14577_INT2_CHGTYP_MASK BIT(0)
+#define MAX14577_INT2_CHGDETRUN_MASK BIT(1)
+#define MAX14577_INT2_DCDTMR_MASK BIT(2)
+#define MAX14577_INT2_DBCHG_MASK BIT(3)
+#define MAX14577_INT2_VBVOLT_MASK BIT(4)
+#define MAX77836_INT2_VIDRM_MASK BIT(5)
+
+#define MAX14577_INT3_EOC_MASK BIT(0)
+#define MAX14577_INT3_CGMBC_MASK BIT(1)
+#define MAX14577_INT3_OVP_MASK BIT(2)
+#define MAX14577_INT3_MBCCHGERR_MASK BIT(3)
/* MAX14577 DEVICE ID register */
#define DEVID_VENDORID_SHIFT 0
@@ -99,9 +111,11 @@ enum max14577_muic_charger_type {
#define STATUS1_ADC_SHIFT 0
#define STATUS1_ADCLOW_SHIFT 5
#define STATUS1_ADCERR_SHIFT 6
+#define MAX77836_STATUS1_ADC1K_SHIFT 7
#define STATUS1_ADC_MASK (0x1f << STATUS1_ADC_SHIFT)
-#define STATUS1_ADCLOW_MASK (0x1 << STATUS1_ADCLOW_SHIFT)
-#define STATUS1_ADCERR_MASK (0x1 << STATUS1_ADCERR_SHIFT)
+#define STATUS1_ADCLOW_MASK BIT(STATUS1_ADCLOW_SHIFT)
+#define STATUS1_ADCERR_MASK BIT(STATUS1_ADCERR_SHIFT)
+#define MAX77836_STATUS1_ADC1K_MASK BIT(MAX77836_STATUS1_ADC1K_SHIFT)
/* MAX14577 STATUS2 register */
#define STATUS2_CHGTYP_SHIFT 0
@@ -109,11 +123,13 @@ enum max14577_muic_charger_type {
#define STATUS2_DCDTMR_SHIFT 4
#define STATUS2_DBCHG_SHIFT 5
#define STATUS2_VBVOLT_SHIFT 6
+#define MAX77836_STATUS2_VIDRM_SHIFT 7
#define STATUS2_CHGTYP_MASK (0x7 << STATUS2_CHGTYP_SHIFT)
-#define STATUS2_CHGDETRUN_MASK (0x1 << STATUS2_CHGDETRUN_SHIFT)
-#define STATUS2_DCDTMR_MASK (0x1 << STATUS2_DCDTMR_SHIFT)
-#define STATUS2_DBCHG_MASK (0x1 << STATUS2_DBCHG_SHIFT)
-#define STATUS2_VBVOLT_MASK (0x1 << STATUS2_VBVOLT_SHIFT)
+#define STATUS2_CHGDETRUN_MASK BIT(STATUS2_CHGDETRUN_SHIFT)
+#define STATUS2_DCDTMR_MASK BIT(STATUS2_DCDTMR_SHIFT)
+#define STATUS2_DBCHG_MASK BIT(STATUS2_DBCHG_SHIFT)
+#define STATUS2_VBVOLT_MASK BIT(STATUS2_VBVOLT_SHIFT)
+#define MAX77836_STATUS2_VIDRM_MASK BIT(MAX77836_STATUS2_VIDRM_SHIFT)
/* MAX14577 CONTROL1 register */
#define COMN1SW_SHIFT 0
@@ -122,8 +138,8 @@ enum max14577_muic_charger_type {
#define IDBEN_SHIFT 7
#define COMN1SW_MASK (0x7 << COMN1SW_SHIFT)
#define COMP2SW_MASK (0x7 << COMP2SW_SHIFT)
-#define MICEN_MASK (0x1 << MICEN_SHIFT)
-#define IDBEN_MASK (0x1 << IDBEN_SHIFT)
+#define MICEN_MASK BIT(MICEN_SHIFT)
+#define IDBEN_MASK BIT(IDBEN_SHIFT)
#define CLEAR_IDBEN_MICEN_MASK (COMN1SW_MASK | COMP2SW_MASK)
#define CTRL1_SW_USB ((1 << COMP2SW_SHIFT) \
| (1 << COMN1SW_SHIFT))
@@ -143,14 +159,14 @@ enum max14577_muic_charger_type {
#define CTRL2_ACCDET_SHIFT (5)
#define CTRL2_USBCPINT_SHIFT (6)
#define CTRL2_RCPS_SHIFT (7)
-#define CTRL2_LOWPWR_MASK (0x1 << CTRL2_LOWPWR_SHIFT)
-#define CTRL2_ADCEN_MASK (0x1 << CTRL2_ADCEN_SHIFT)
-#define CTRL2_CPEN_MASK (0x1 << CTRL2_CPEN_SHIFT)
-#define CTRL2_SFOUTASRT_MASK (0x1 << CTRL2_SFOUTASRT_SHIFT)
-#define CTRL2_SFOUTORD_MASK (0x1 << CTRL2_SFOUTORD_SHIFT)
-#define CTRL2_ACCDET_MASK (0x1 << CTRL2_ACCDET_SHIFT)
-#define CTRL2_USBCPINT_MASK (0x1 << CTRL2_USBCPINT_SHIFT)
-#define CTRL2_RCPS_MASK (0x1 << CTR2_RCPS_SHIFT)
+#define CTRL2_LOWPWR_MASK BIT(CTRL2_LOWPWR_SHIFT)
+#define CTRL2_ADCEN_MASK BIT(CTRL2_ADCEN_SHIFT)
+#define CTRL2_CPEN_MASK BIT(CTRL2_CPEN_SHIFT)
+#define CTRL2_SFOUTASRT_MASK BIT(CTRL2_SFOUTASRT_SHIFT)
+#define CTRL2_SFOUTORD_MASK BIT(CTRL2_SFOUTORD_SHIFT)
+#define CTRL2_ACCDET_MASK BIT(CTRL2_ACCDET_SHIFT)
+#define CTRL2_USBCPINT_MASK BIT(CTRL2_USBCPINT_SHIFT)
+#define CTRL2_RCPS_MASK BIT(CTRL2_RCPS_SHIFT)
#define CTRL2_CPEN1_LOWPWR0 ((1 << CTRL2_CPEN_SHIFT) | \
(0 << CTRL2_LOWPWR_SHIFT))
@@ -198,14 +214,14 @@ enum max14577_charger_reg {
#define CDETCTRL1_DBEXIT_SHIFT 5
#define CDETCTRL1_DBIDLE_SHIFT 6
#define CDETCTRL1_CDPDET_SHIFT 7
-#define CDETCTRL1_CHGDETEN_MASK (0x1 << CDETCTRL1_CHGDETEN_SHIFT)
-#define CDETCTRL1_CHGTYPMAN_MASK (0x1 << CDETCTRL1_CHGTYPMAN_SHIFT)
-#define CDETCTRL1_DCDEN_MASK (0x1 << CDETCTRL1_DCDEN_SHIFT)
-#define CDETCTRL1_DCD2SCT_MASK (0x1 << CDETCTRL1_DCD2SCT_SHIFT)
-#define CDETCTRL1_DCHKTM_MASK (0x1 << CDETCTRL1_DCHKTM_SHIFT)
-#define CDETCTRL1_DBEXIT_MASK (0x1 << CDETCTRL1_DBEXIT_SHIFT)
-#define CDETCTRL1_DBIDLE_MASK (0x1 << CDETCTRL1_DBIDLE_SHIFT)
-#define CDETCTRL1_CDPDET_MASK (0x1 << CDETCTRL1_CDPDET_SHIFT)
+#define CDETCTRL1_CHGDETEN_MASK BIT(CDETCTRL1_CHGDETEN_SHIFT)
+#define CDETCTRL1_CHGTYPMAN_MASK BIT(CDETCTRL1_CHGTYPMAN_SHIFT)
+#define CDETCTRL1_DCDEN_MASK BIT(CDETCTRL1_DCDEN_SHIFT)
+#define CDETCTRL1_DCD2SCT_MASK BIT(CDETCTRL1_DCD2SCT_SHIFT)
+#define CDETCTRL1_DCHKTM_MASK BIT(CDETCTRL1_DCHKTM_SHIFT)
+#define CDETCTRL1_DBEXIT_MASK BIT(CDETCTRL1_DBEXIT_SHIFT)
+#define CDETCTRL1_DBIDLE_MASK BIT(CDETCTRL1_DBIDLE_SHIFT)
+#define CDETCTRL1_CDPDET_MASK BIT(CDETCTRL1_CDPDET_SHIFT)
/* MAX14577 CHGCTRL1 register */
#define CHGCTRL1_TCHW_SHIFT 4
@@ -213,9 +229,9 @@ enum max14577_charger_reg {
/* MAX14577 CHGCTRL2 register */
#define CHGCTRL2_MBCHOSTEN_SHIFT 6
-#define CHGCTRL2_MBCHOSTEN_MASK (0x1 << CHGCTRL2_MBCHOSTEN_SHIFT)
+#define CHGCTRL2_MBCHOSTEN_MASK BIT(CHGCTRL2_MBCHOSTEN_SHIFT)
#define CHGCTRL2_VCHGR_RC_SHIFT 7
-#define CHGCTRL2_VCHGR_RC_MASK (0x1 << CHGCTRL2_VCHGR_RC_SHIFT)
+#define CHGCTRL2_VCHGR_RC_MASK BIT(CHGCTRL2_VCHGR_RC_SHIFT)
/* MAX14577 CHGCTRL3 register */
#define CHGCTRL3_MBCCVWRC_SHIFT 0
@@ -225,7 +241,7 @@ enum max14577_charger_reg {
#define CHGCTRL4_MBCICHWRCH_SHIFT 0
#define CHGCTRL4_MBCICHWRCH_MASK (0xf << CHGCTRL4_MBCICHWRCH_SHIFT)
#define CHGCTRL4_MBCICHWRCL_SHIFT 4
-#define CHGCTRL4_MBCICHWRCL_MASK (0x1 << CHGCTRL4_MBCICHWRCL_SHIFT)
+#define CHGCTRL4_MBCICHWRCL_MASK BIT(CHGCTRL4_MBCICHWRCL_SHIFT)
/* MAX14577 CHGCTRL5 register */
#define CHGCTRL5_EOCS_SHIFT 0
@@ -233,7 +249,7 @@ enum max14577_charger_reg {
/* MAX14577 CHGCTRL6 register */
#define CHGCTRL6_AUTOSTOP_SHIFT 5
-#define CHGCTRL6_AUTOSTOP_MASK (0x1 << CHGCTRL6_AUTOSTOP_SHIFT)
+#define CHGCTRL6_AUTOSTOP_MASK BIT(CHGCTRL6_AUTOSTOP_SHIFT)
/* MAX14577 CHGCTRL7 register */
#define CHGCTRL7_OTPCGHCVS_SHIFT 0
@@ -245,14 +261,111 @@ enum max14577_charger_reg {
#define MAX14577_REGULATOR_CURRENT_LIMIT_HIGH_STEP 50000
#define MAX14577_REGULATOR_CURRENT_LIMIT_MAX 950000
+/* MAX77836 regulator current limits (as in CHGCTRL4 register), uA */
+#define MAX77836_REGULATOR_CURRENT_LIMIT_MIN 45000
+#define MAX77836_REGULATOR_CURRENT_LIMIT_HIGH_START 100000
+#define MAX77836_REGULATOR_CURRENT_LIMIT_HIGH_STEP 25000
+#define MAX77836_REGULATOR_CURRENT_LIMIT_MAX 475000
+
/* MAX14577 regulator SFOUT LDO voltage, fixed, uV */
#define MAX14577_REGULATOR_SAFEOUT_VOLTAGE 4900000
+/* MAX77836 regulator LDOx voltage, uV */
+#define MAX77836_REGULATOR_LDO_VOLTAGE_MIN 800000
+#define MAX77836_REGULATOR_LDO_VOLTAGE_MAX 3950000
+#define MAX77836_REGULATOR_LDO_VOLTAGE_STEP 50000
+#define MAX77836_REGULATOR_LDO_VOLTAGE_STEPS_NUM 64
+
+/* Slave addr = 0x46: PMIC */
+enum max77836_pmic_reg {
+ MAX77836_PMIC_REG_PMIC_ID = 0x20,
+ MAX77836_PMIC_REG_PMIC_REV = 0x21,
+ MAX77836_PMIC_REG_INTSRC = 0x22,
+ MAX77836_PMIC_REG_INTSRC_MASK = 0x23,
+ MAX77836_PMIC_REG_TOPSYS_INT = 0x24,
+ MAX77836_PMIC_REG_TOPSYS_INT_MASK = 0x26,
+ MAX77836_PMIC_REG_TOPSYS_STAT = 0x28,
+ MAX77836_PMIC_REG_MRSTB_CNTL = 0x2A,
+ MAX77836_PMIC_REG_LSCNFG = 0x2B,
+
+ MAX77836_LDO_REG_CNFG1_LDO1 = 0x51,
+ MAX77836_LDO_REG_CNFG2_LDO1 = 0x52,
+ MAX77836_LDO_REG_CNFG1_LDO2 = 0x53,
+ MAX77836_LDO_REG_CNFG2_LDO2 = 0x54,
+ MAX77836_LDO_REG_CNFG_LDO_BIAS = 0x55,
+
+ MAX77836_COMP_REG_COMP1 = 0x60,
+
+ MAX77836_PMIC_REG_END,
+};
+
+#define MAX77836_INTSRC_MASK_TOP_INT_SHIFT 1
+#define MAX77836_INTSRC_MASK_MUIC_CHG_INT_SHIFT 3
+#define MAX77836_INTSRC_MASK_TOP_INT_MASK BIT(MAX77836_INTSRC_MASK_TOP_INT_SHIFT)
+#define MAX77836_INTSRC_MASK_MUIC_CHG_INT_MASK BIT(MAX77836_INTSRC_MASK_MUIC_CHG_INT_SHIFT)
+
+/* MAX77836 PMIC interrupts */
+#define MAX77836_TOPSYS_INT_T120C_SHIFT 0
+#define MAX77836_TOPSYS_INT_T140C_SHIFT 1
+#define MAX77836_TOPSYS_INT_T120C_MASK BIT(MAX77836_TOPSYS_INT_T120C_SHIFT)
+#define MAX77836_TOPSYS_INT_T140C_MASK BIT(MAX77836_TOPSYS_INT_T140C_SHIFT)
+
+/* LDO1/LDO2 CONFIG1 register */
+#define MAX77836_CNFG1_LDO_PWRMD_SHIFT 6
+#define MAX77836_CNFG1_LDO_TV_SHIFT 0
+#define MAX77836_CNFG1_LDO_PWRMD_MASK (0x3 << MAX77836_CNFG1_LDO_PWRMD_SHIFT)
+#define MAX77836_CNFG1_LDO_TV_MASK (0x3f << MAX77836_CNFG1_LDO_TV_SHIFT)
+
+/* LDO1/LDO2 CONFIG2 register */
+#define MAX77836_CNFG2_LDO_OVCLMPEN_SHIFT 7
+#define MAX77836_CNFG2_LDO_ALPMEN_SHIFT 6
+#define MAX77836_CNFG2_LDO_COMP_SHIFT 4
+#define MAX77836_CNFG2_LDO_POK_SHIFT 3
+#define MAX77836_CNFG2_LDO_ADE_SHIFT 1
+#define MAX77836_CNFG2_LDO_SS_SHIFT 0
+#define MAX77836_CNFG2_LDO_OVCLMPEN_MASK BIT(MAX77836_CNFG2_LDO_OVCLMPEN_SHIFT)
+#define MAX77836_CNFG2_LDO_ALPMEN_MASK BIT(MAX77836_CNFG2_LDO_ALPMEN_SHIFT)
+#define MAX77836_CNFG2_LDO_COMP_MASK (0x3 << MAX77836_CNFG2_LDO_COMP_SHIFT)
+#define MAX77836_CNFG2_LDO_POK_MASK BIT(MAX77836_CNFG2_LDO_POK_SHIFT)
+#define MAX77836_CNFG2_LDO_ADE_MASK BIT(MAX77836_CNFG2_LDO_ADE_SHIFT)
+#define MAX77836_CNFG2_LDO_SS_MASK BIT(MAX77836_CNFG2_LDO_SS_SHIFT)
+
+/* Slave addr = 0x6C: Fuel-Gauge/Battery */
+enum max77836_fg_reg {
+ MAX77836_FG_REG_VCELL_MSB = 0x02,
+ MAX77836_FG_REG_VCELL_LSB = 0x03,
+ MAX77836_FG_REG_SOC_MSB = 0x04,
+ MAX77836_FG_REG_SOC_LSB = 0x05,
+ MAX77836_FG_REG_MODE_H = 0x06,
+ MAX77836_FG_REG_MODE_L = 0x07,
+ MAX77836_FG_REG_VERSION_MSB = 0x08,
+ MAX77836_FG_REG_VERSION_LSB = 0x09,
+ MAX77836_FG_REG_HIBRT_H = 0x0A,
+ MAX77836_FG_REG_HIBRT_L = 0x0B,
+ MAX77836_FG_REG_CONFIG_H = 0x0C,
+ MAX77836_FG_REG_CONFIG_L = 0x0D,
+ MAX77836_FG_REG_VALRT_MIN = 0x14,
+ MAX77836_FG_REG_VALRT_MAX = 0x15,
+ MAX77836_FG_REG_CRATE_MSB = 0x16,
+ MAX77836_FG_REG_CRATE_LSB = 0x17,
+ MAX77836_FG_REG_VRESET = 0x18,
+ MAX77836_FG_REG_FGID = 0x19,
+ MAX77836_FG_REG_STATUS_H = 0x1A,
+ MAX77836_FG_REG_STATUS_L = 0x1B,
+ /*
+ * TODO: TABLE registers
+ * TODO: CMD register
+ */
+
+ MAX77836_FG_REG_END,
+};
+
enum max14577_irq {
/* INT1 */
MAX14577_IRQ_INT1_ADC,
MAX14577_IRQ_INT1_ADCLOW,
MAX14577_IRQ_INT1_ADCERR,
+ MAX77836_IRQ_INT1_ADC1K,
/* INT2 */
MAX14577_IRQ_INT2_CHGTYP,
@@ -260,6 +373,7 @@ enum max14577_irq {
MAX14577_IRQ_INT2_DCDTMR,
MAX14577_IRQ_INT2_DBCHG,
MAX14577_IRQ_INT2_VBVOLT,
+ MAX77836_IRQ_INT2_VIDRM,
/* INT3 */
MAX14577_IRQ_INT3_EOC,
@@ -267,21 +381,25 @@ enum max14577_irq {
MAX14577_IRQ_INT3_OVP,
MAX14577_IRQ_INT3_MBCCHGERR,
+ /* TOPSYS_INT, only MAX77836 */
+ MAX77836_IRQ_TOPSYS_T140C,
+ MAX77836_IRQ_TOPSYS_T120C,
+
MAX14577_IRQ_NUM,
};
struct max14577 {
struct device *dev;
struct i2c_client *i2c; /* Slave addr = 0x4A */
+ struct i2c_client *i2c_pmic; /* Slave addr = 0x46 */
+ enum maxim_device_type dev_type;
- struct regmap *regmap;
+ struct regmap *regmap; /* For MUIC and Charger */
+ struct regmap *regmap_pmic;
- struct regmap_irq_chip_data *irq_data;
+ struct regmap_irq_chip_data *irq_data; /* For MUIC and Charger */
+ struct regmap_irq_chip_data *irq_data_pmic;
int irq;
-
- /* Device ID */
- u8 vendor_id; /* Vendor Identification */
- u8 device_id; /* Chip Version */
};
/* MAX14577 shared regmap API function */
diff --git a/include/linux/mfd/max14577.h b/include/linux/mfd/max14577.h
index 736d39c3ec0d..c83fbed1c7b6 100644
--- a/include/linux/mfd/max14577.h
+++ b/include/linux/mfd/max14577.h
@@ -1,7 +1,7 @@
/*
- * max14577.h - Driver for the Maxim 14577
+ * max14577.h - Driver for the Maxim 14577/77836
*
- * Copyright (C) 2013 Samsung Electrnoics
+ * Copyright (C) 2014 Samsung Electrnoics
* Chanwoo Choi <cw00.choi@samsung.com>
* Krzysztof Kozlowski <k.kozlowski@samsung.com>
*
@@ -20,6 +20,9 @@
* MAX14577 has MUIC, Charger devices.
* The devices share the same I2C bus and interrupt line
* included in this mfd driver.
+ *
+ * MAX77836 has additional PMIC and Fuel-Gauge on different I2C slave
+ * addresses.
*/
#ifndef __MAX14577_H__
@@ -32,7 +35,17 @@ enum max14577_regulators {
MAX14577_SAFEOUT = 0,
MAX14577_CHARGER,
- MAX14577_REG_MAX,
+ MAX14577_REGULATOR_NUM,
+};
+
+/* MAX77836 regulator IDs */
+enum max77836_regulators {
+ MAX77836_SAFEOUT = 0,
+ MAX77836_CHARGER,
+ MAX77836_LDO1,
+ MAX77836_LDO2,
+
+ MAX77836_REGULATOR_NUM,
};
struct max14577_regulator_platform_data {
diff --git a/include/linux/mfd/mc13xxx.h b/include/linux/mfd/mc13xxx.h
index a326c850f046..d63b1d309106 100644
--- a/include/linux/mfd/mc13xxx.h
+++ b/include/linux/mfd/mc13xxx.h
@@ -117,10 +117,6 @@ struct mc13xxx_led_platform_data {
#define MAX_LED_CONTROL_REGS 6
-struct mc13xxx_leds_platform_data {
- struct mc13xxx_led_platform_data *led;
- int num_leds;
-
/* MC13783 LED Control 0 */
#define MC13783_LED_C0_ENABLE (1 << 0)
#define MC13783_LED_C0_TRIODE_MD (1 << 7)
@@ -169,10 +165,13 @@ struct mc13xxx_leds_platform_data {
/* MC34708 LED Control 0 */
#define MC34708_LED_C0_CURRENT_R(x) (((x) & 0x3) << 9)
#define MC34708_LED_C0_CURRENT_G(x) (((x) & 0x3) << 21)
+
+struct mc13xxx_leds_platform_data {
+ struct mc13xxx_led_platform_data *led;
+ int num_leds;
u32 led_control[MAX_LED_CONTROL_REGS];
};
-struct mc13xxx_buttons_platform_data {
#define MC13783_BUTTON_DBNC_0MS 0
#define MC13783_BUTTON_DBNC_30MS 1
#define MC13783_BUTTON_DBNC_150MS 2
@@ -180,6 +179,8 @@ struct mc13xxx_buttons_platform_data {
#define MC13783_BUTTON_ENABLE (1 << 2)
#define MC13783_BUTTON_POL_INVERT (1 << 3)
#define MC13783_BUTTON_RESET_EN (1 << 4)
+
+struct mc13xxx_buttons_platform_data {
int b1on_flags;
unsigned short b1on_key;
int b2on_flags;
@@ -188,14 +189,14 @@ struct mc13xxx_buttons_platform_data {
unsigned short b3on_key;
};
+#define MC13783_TS_ATO_FIRST false
+#define MC13783_TS_ATO_EACH true
+
struct mc13xxx_ts_platform_data {
/* Delay between Touchscreen polarization and ADC Conversion.
* Given in clock ticks of a 32 kHz clock which gives a granularity of
* about 30.5ms */
u8 ato;
-
-#define MC13783_TS_ATO_FIRST false
-#define MC13783_TS_ATO_EACH true
/* Use the ATO delay only for the first conversion or for each one */
bool atox;
};
@@ -210,11 +211,12 @@ struct mc13xxx_codec_platform_data {
enum mc13783_ssi_port dac_ssi_port;
};
-struct mc13xxx_platform_data {
-#define MC13XXX_USE_TOUCHSCREEN (1 << 0)
+#define MC13XXX_USE_TOUCHSCREEN (1 << 0)
#define MC13XXX_USE_CODEC (1 << 1)
#define MC13XXX_USE_ADC (1 << 2)
#define MC13XXX_USE_RTC (1 << 3)
+
+struct mc13xxx_platform_data {
unsigned int flags;
struct mc13xxx_regulator_platform_data regulators;
diff --git a/include/linux/mfd/palmas.h b/include/linux/mfd/palmas.h
index 9974e387e483..3420e09e2e20 100644
--- a/include/linux/mfd/palmas.h
+++ b/include/linux/mfd/palmas.h
@@ -415,7 +415,7 @@ struct palmas_usb {
struct palmas *palmas;
struct device *dev;
- struct extcon_dev edev;
+ struct extcon_dev *edev;
int id_otg_irq;
int id_irq;
@@ -482,10 +482,10 @@ enum usb_irq_events {
/* helper macro to get correct slave number */
#define PALMAS_BASE_TO_SLAVE(x) ((x >> 8) - 1)
-#define PALMAS_BASE_TO_REG(x, y) ((x & 0xff) + y)
+#define PALMAS_BASE_TO_REG(x, y) ((x & 0xFF) + y)
/* Base addresses of IP blocks in Palmas */
-#define PALMAS_SMPS_DVS_BASE 0x20
+#define PALMAS_SMPS_DVS_BASE 0x020
#define PALMAS_RTC_BASE 0x100
#define PALMAS_VALIDITY_BASE 0x118
#define PALMAS_SMPS_BASE 0x120
@@ -504,19 +504,19 @@ enum usb_irq_events {
#define PALMAS_TRIM_GPADC_BASE 0x3CD
/* Registers for function RTC */
-#define PALMAS_SECONDS_REG 0x0
-#define PALMAS_MINUTES_REG 0x1
-#define PALMAS_HOURS_REG 0x2
-#define PALMAS_DAYS_REG 0x3
-#define PALMAS_MONTHS_REG 0x4
-#define PALMAS_YEARS_REG 0x5
-#define PALMAS_WEEKS_REG 0x6
-#define PALMAS_ALARM_SECONDS_REG 0x8
-#define PALMAS_ALARM_MINUTES_REG 0x9
-#define PALMAS_ALARM_HOURS_REG 0xA
-#define PALMAS_ALARM_DAYS_REG 0xB
-#define PALMAS_ALARM_MONTHS_REG 0xC
-#define PALMAS_ALARM_YEARS_REG 0xD
+#define PALMAS_SECONDS_REG 0x00
+#define PALMAS_MINUTES_REG 0x01
+#define PALMAS_HOURS_REG 0x02
+#define PALMAS_DAYS_REG 0x03
+#define PALMAS_MONTHS_REG 0x04
+#define PALMAS_YEARS_REG 0x05
+#define PALMAS_WEEKS_REG 0x06
+#define PALMAS_ALARM_SECONDS_REG 0x08
+#define PALMAS_ALARM_MINUTES_REG 0x09
+#define PALMAS_ALARM_HOURS_REG 0x0A
+#define PALMAS_ALARM_DAYS_REG 0x0B
+#define PALMAS_ALARM_MONTHS_REG 0x0C
+#define PALMAS_ALARM_YEARS_REG 0x0D
#define PALMAS_RTC_CTRL_REG 0x10
#define PALMAS_RTC_STATUS_REG 0x11
#define PALMAS_RTC_INTERRUPTS_REG 0x12
@@ -527,201 +527,201 @@ enum usb_irq_events {
/* Bit definitions for SECONDS_REG */
#define PALMAS_SECONDS_REG_SEC1_MASK 0x70
-#define PALMAS_SECONDS_REG_SEC1_SHIFT 4
-#define PALMAS_SECONDS_REG_SEC0_MASK 0x0f
-#define PALMAS_SECONDS_REG_SEC0_SHIFT 0
+#define PALMAS_SECONDS_REG_SEC1_SHIFT 0x04
+#define PALMAS_SECONDS_REG_SEC0_MASK 0x0F
+#define PALMAS_SECONDS_REG_SEC0_SHIFT 0x00
/* Bit definitions for MINUTES_REG */
#define PALMAS_MINUTES_REG_MIN1_MASK 0x70
-#define PALMAS_MINUTES_REG_MIN1_SHIFT 4
-#define PALMAS_MINUTES_REG_MIN0_MASK 0x0f
-#define PALMAS_MINUTES_REG_MIN0_SHIFT 0
+#define PALMAS_MINUTES_REG_MIN1_SHIFT 0x04
+#define PALMAS_MINUTES_REG_MIN0_MASK 0x0F
+#define PALMAS_MINUTES_REG_MIN0_SHIFT 0x00
/* Bit definitions for HOURS_REG */
#define PALMAS_HOURS_REG_PM_NAM 0x80
-#define PALMAS_HOURS_REG_PM_NAM_SHIFT 7
+#define PALMAS_HOURS_REG_PM_NAM_SHIFT 0x07
#define PALMAS_HOURS_REG_HOUR1_MASK 0x30
-#define PALMAS_HOURS_REG_HOUR1_SHIFT 4
-#define PALMAS_HOURS_REG_HOUR0_MASK 0x0f
-#define PALMAS_HOURS_REG_HOUR0_SHIFT 0
+#define PALMAS_HOURS_REG_HOUR1_SHIFT 0x04
+#define PALMAS_HOURS_REG_HOUR0_MASK 0x0F
+#define PALMAS_HOURS_REG_HOUR0_SHIFT 0x00
/* Bit definitions for DAYS_REG */
#define PALMAS_DAYS_REG_DAY1_MASK 0x30
-#define PALMAS_DAYS_REG_DAY1_SHIFT 4
-#define PALMAS_DAYS_REG_DAY0_MASK 0x0f
-#define PALMAS_DAYS_REG_DAY0_SHIFT 0
+#define PALMAS_DAYS_REG_DAY1_SHIFT 0x04
+#define PALMAS_DAYS_REG_DAY0_MASK 0x0F
+#define PALMAS_DAYS_REG_DAY0_SHIFT 0x00
/* Bit definitions for MONTHS_REG */
#define PALMAS_MONTHS_REG_MONTH1 0x10
-#define PALMAS_MONTHS_REG_MONTH1_SHIFT 4
-#define PALMAS_MONTHS_REG_MONTH0_MASK 0x0f
-#define PALMAS_MONTHS_REG_MONTH0_SHIFT 0
+#define PALMAS_MONTHS_REG_MONTH1_SHIFT 0x04
+#define PALMAS_MONTHS_REG_MONTH0_MASK 0x0F
+#define PALMAS_MONTHS_REG_MONTH0_SHIFT 0x00
/* Bit definitions for YEARS_REG */
#define PALMAS_YEARS_REG_YEAR1_MASK 0xf0
-#define PALMAS_YEARS_REG_YEAR1_SHIFT 4
-#define PALMAS_YEARS_REG_YEAR0_MASK 0x0f
-#define PALMAS_YEARS_REG_YEAR0_SHIFT 0
+#define PALMAS_YEARS_REG_YEAR1_SHIFT 0x04
+#define PALMAS_YEARS_REG_YEAR0_MASK 0x0F
+#define PALMAS_YEARS_REG_YEAR0_SHIFT 0x00
/* Bit definitions for WEEKS_REG */
#define PALMAS_WEEKS_REG_WEEK_MASK 0x07
-#define PALMAS_WEEKS_REG_WEEK_SHIFT 0
+#define PALMAS_WEEKS_REG_WEEK_SHIFT 0x00
/* Bit definitions for ALARM_SECONDS_REG */
#define PALMAS_ALARM_SECONDS_REG_ALARM_SEC1_MASK 0x70
-#define PALMAS_ALARM_SECONDS_REG_ALARM_SEC1_SHIFT 4
-#define PALMAS_ALARM_SECONDS_REG_ALARM_SEC0_MASK 0x0f
-#define PALMAS_ALARM_SECONDS_REG_ALARM_SEC0_SHIFT 0
+#define PALMAS_ALARM_SECONDS_REG_ALARM_SEC1_SHIFT 0x04
+#define PALMAS_ALARM_SECONDS_REG_ALARM_SEC0_MASK 0x0F
+#define PALMAS_ALARM_SECONDS_REG_ALARM_SEC0_SHIFT 0x00
/* Bit definitions for ALARM_MINUTES_REG */
#define PALMAS_ALARM_MINUTES_REG_ALARM_MIN1_MASK 0x70
-#define PALMAS_ALARM_MINUTES_REG_ALARM_MIN1_SHIFT 4
-#define PALMAS_ALARM_MINUTES_REG_ALARM_MIN0_MASK 0x0f
-#define PALMAS_ALARM_MINUTES_REG_ALARM_MIN0_SHIFT 0
+#define PALMAS_ALARM_MINUTES_REG_ALARM_MIN1_SHIFT 0x04
+#define PALMAS_ALARM_MINUTES_REG_ALARM_MIN0_MASK 0x0F
+#define PALMAS_ALARM_MINUTES_REG_ALARM_MIN0_SHIFT 0x00
/* Bit definitions for ALARM_HOURS_REG */
#define PALMAS_ALARM_HOURS_REG_ALARM_PM_NAM 0x80
-#define PALMAS_ALARM_HOURS_REG_ALARM_PM_NAM_SHIFT 7
+#define PALMAS_ALARM_HOURS_REG_ALARM_PM_NAM_SHIFT 0x07
#define PALMAS_ALARM_HOURS_REG_ALARM_HOUR1_MASK 0x30
-#define PALMAS_ALARM_HOURS_REG_ALARM_HOUR1_SHIFT 4
-#define PALMAS_ALARM_HOURS_REG_ALARM_HOUR0_MASK 0x0f
-#define PALMAS_ALARM_HOURS_REG_ALARM_HOUR0_SHIFT 0
+#define PALMAS_ALARM_HOURS_REG_ALARM_HOUR1_SHIFT 0x04
+#define PALMAS_ALARM_HOURS_REG_ALARM_HOUR0_MASK 0x0F
+#define PALMAS_ALARM_HOURS_REG_ALARM_HOUR0_SHIFT 0x00
/* Bit definitions for ALARM_DAYS_REG */
#define PALMAS_ALARM_DAYS_REG_ALARM_DAY1_MASK 0x30
-#define PALMAS_ALARM_DAYS_REG_ALARM_DAY1_SHIFT 4
-#define PALMAS_ALARM_DAYS_REG_ALARM_DAY0_MASK 0x0f
-#define PALMAS_ALARM_DAYS_REG_ALARM_DAY0_SHIFT 0
+#define PALMAS_ALARM_DAYS_REG_ALARM_DAY1_SHIFT 0x04
+#define PALMAS_ALARM_DAYS_REG_ALARM_DAY0_MASK 0x0F
+#define PALMAS_ALARM_DAYS_REG_ALARM_DAY0_SHIFT 0x00
/* Bit definitions for ALARM_MONTHS_REG */
#define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH1 0x10
-#define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH1_SHIFT 4
-#define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH0_MASK 0x0f
-#define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH0_SHIFT 0
+#define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH1_SHIFT 0x04
+#define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH0_MASK 0x0F
+#define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH0_SHIFT 0x00
/* Bit definitions for ALARM_YEARS_REG */
#define PALMAS_ALARM_YEARS_REG_ALARM_YEAR1_MASK 0xf0
-#define PALMAS_ALARM_YEARS_REG_ALARM_YEAR1_SHIFT 4
-#define PALMAS_ALARM_YEARS_REG_ALARM_YEAR0_MASK 0x0f
-#define PALMAS_ALARM_YEARS_REG_ALARM_YEAR0_SHIFT 0
+#define PALMAS_ALARM_YEARS_REG_ALARM_YEAR1_SHIFT 0x04
+#define PALMAS_ALARM_YEARS_REG_ALARM_YEAR0_MASK 0x0F
+#define PALMAS_ALARM_YEARS_REG_ALARM_YEAR0_SHIFT 0x00
/* Bit definitions for RTC_CTRL_REG */
#define PALMAS_RTC_CTRL_REG_RTC_V_OPT 0x80
-#define PALMAS_RTC_CTRL_REG_RTC_V_OPT_SHIFT 7
+#define PALMAS_RTC_CTRL_REG_RTC_V_OPT_SHIFT 0x07
#define PALMAS_RTC_CTRL_REG_GET_TIME 0x40
-#define PALMAS_RTC_CTRL_REG_GET_TIME_SHIFT 6
+#define PALMAS_RTC_CTRL_REG_GET_TIME_SHIFT 0x06
#define PALMAS_RTC_CTRL_REG_SET_32_COUNTER 0x20
-#define PALMAS_RTC_CTRL_REG_SET_32_COUNTER_SHIFT 5
+#define PALMAS_RTC_CTRL_REG_SET_32_COUNTER_SHIFT 0x05
#define PALMAS_RTC_CTRL_REG_TEST_MODE 0x10
-#define PALMAS_RTC_CTRL_REG_TEST_MODE_SHIFT 4
+#define PALMAS_RTC_CTRL_REG_TEST_MODE_SHIFT 0x04
#define PALMAS_RTC_CTRL_REG_MODE_12_24 0x08
-#define PALMAS_RTC_CTRL_REG_MODE_12_24_SHIFT 3
+#define PALMAS_RTC_CTRL_REG_MODE_12_24_SHIFT 0x03
#define PALMAS_RTC_CTRL_REG_AUTO_COMP 0x04
-#define PALMAS_RTC_CTRL_REG_AUTO_COMP_SHIFT 2
+#define PALMAS_RTC_CTRL_REG_AUTO_COMP_SHIFT 0x02
#define PALMAS_RTC_CTRL_REG_ROUND_30S 0x02
-#define PALMAS_RTC_CTRL_REG_ROUND_30S_SHIFT 1
+#define PALMAS_RTC_CTRL_REG_ROUND_30S_SHIFT 0x01
#define PALMAS_RTC_CTRL_REG_STOP_RTC 0x01
-#define PALMAS_RTC_CTRL_REG_STOP_RTC_SHIFT 0
+#define PALMAS_RTC_CTRL_REG_STOP_RTC_SHIFT 0x00
/* Bit definitions for RTC_STATUS_REG */
#define PALMAS_RTC_STATUS_REG_POWER_UP 0x80
-#define PALMAS_RTC_STATUS_REG_POWER_UP_SHIFT 7
+#define PALMAS_RTC_STATUS_REG_POWER_UP_SHIFT 0x07
#define PALMAS_RTC_STATUS_REG_ALARM 0x40
-#define PALMAS_RTC_STATUS_REG_ALARM_SHIFT 6
+#define PALMAS_RTC_STATUS_REG_ALARM_SHIFT 0x06
#define PALMAS_RTC_STATUS_REG_EVENT_1D 0x20
-#define PALMAS_RTC_STATUS_REG_EVENT_1D_SHIFT 5
+#define PALMAS_RTC_STATUS_REG_EVENT_1D_SHIFT 0x05
#define PALMAS_RTC_STATUS_REG_EVENT_1H 0x10
-#define PALMAS_RTC_STATUS_REG_EVENT_1H_SHIFT 4
+#define PALMAS_RTC_STATUS_REG_EVENT_1H_SHIFT 0x04
#define PALMAS_RTC_STATUS_REG_EVENT_1M 0x08
-#define PALMAS_RTC_STATUS_REG_EVENT_1M_SHIFT 3
+#define PALMAS_RTC_STATUS_REG_EVENT_1M_SHIFT 0x03
#define PALMAS_RTC_STATUS_REG_EVENT_1S 0x04
-#define PALMAS_RTC_STATUS_REG_EVENT_1S_SHIFT 2
+#define PALMAS_RTC_STATUS_REG_EVENT_1S_SHIFT 0x02
#define PALMAS_RTC_STATUS_REG_RUN 0x02
-#define PALMAS_RTC_STATUS_REG_RUN_SHIFT 1
+#define PALMAS_RTC_STATUS_REG_RUN_SHIFT 0x01
/* Bit definitions for RTC_INTERRUPTS_REG */
#define PALMAS_RTC_INTERRUPTS_REG_IT_SLEEP_MASK_EN 0x10
-#define PALMAS_RTC_INTERRUPTS_REG_IT_SLEEP_MASK_EN_SHIFT 4
+#define PALMAS_RTC_INTERRUPTS_REG_IT_SLEEP_MASK_EN_SHIFT 0x04
#define PALMAS_RTC_INTERRUPTS_REG_IT_ALARM 0x08
-#define PALMAS_RTC_INTERRUPTS_REG_IT_ALARM_SHIFT 3
+#define PALMAS_RTC_INTERRUPTS_REG_IT_ALARM_SHIFT 0x03
#define PALMAS_RTC_INTERRUPTS_REG_IT_TIMER 0x04
-#define PALMAS_RTC_INTERRUPTS_REG_IT_TIMER_SHIFT 2
+#define PALMAS_RTC_INTERRUPTS_REG_IT_TIMER_SHIFT 0x02
#define PALMAS_RTC_INTERRUPTS_REG_EVERY_MASK 0x03
-#define PALMAS_RTC_INTERRUPTS_REG_EVERY_SHIFT 0
+#define PALMAS_RTC_INTERRUPTS_REG_EVERY_SHIFT 0x00
/* Bit definitions for RTC_COMP_LSB_REG */
-#define PALMAS_RTC_COMP_LSB_REG_RTC_COMP_LSB_MASK 0xff
-#define PALMAS_RTC_COMP_LSB_REG_RTC_COMP_LSB_SHIFT 0
+#define PALMAS_RTC_COMP_LSB_REG_RTC_COMP_LSB_MASK 0xFF
+#define PALMAS_RTC_COMP_LSB_REG_RTC_COMP_LSB_SHIFT 0x00
/* Bit definitions for RTC_COMP_MSB_REG */
-#define PALMAS_RTC_COMP_MSB_REG_RTC_COMP_MSB_MASK 0xff
-#define PALMAS_RTC_COMP_MSB_REG_RTC_COMP_MSB_SHIFT 0
+#define PALMAS_RTC_COMP_MSB_REG_RTC_COMP_MSB_MASK 0xFF
+#define PALMAS_RTC_COMP_MSB_REG_RTC_COMP_MSB_SHIFT 0x00
/* Bit definitions for RTC_RES_PROG_REG */
-#define PALMAS_RTC_RES_PROG_REG_SW_RES_PROG_MASK 0x3f
-#define PALMAS_RTC_RES_PROG_REG_SW_RES_PROG_SHIFT 0
+#define PALMAS_RTC_RES_PROG_REG_SW_RES_PROG_MASK 0x3F
+#define PALMAS_RTC_RES_PROG_REG_SW_RES_PROG_SHIFT 0x00
/* Bit definitions for RTC_RESET_STATUS_REG */
#define PALMAS_RTC_RESET_STATUS_REG_RESET_STATUS 0x01
-#define PALMAS_RTC_RESET_STATUS_REG_RESET_STATUS_SHIFT 0
+#define PALMAS_RTC_RESET_STATUS_REG_RESET_STATUS_SHIFT 0x00
/* Registers for function BACKUP */
-#define PALMAS_BACKUP0 0x0
-#define PALMAS_BACKUP1 0x1
-#define PALMAS_BACKUP2 0x2
-#define PALMAS_BACKUP3 0x3
-#define PALMAS_BACKUP4 0x4
-#define PALMAS_BACKUP5 0x5
-#define PALMAS_BACKUP6 0x6
-#define PALMAS_BACKUP7 0x7
+#define PALMAS_BACKUP0 0x00
+#define PALMAS_BACKUP1 0x01
+#define PALMAS_BACKUP2 0x02
+#define PALMAS_BACKUP3 0x03
+#define PALMAS_BACKUP4 0x04
+#define PALMAS_BACKUP5 0x05
+#define PALMAS_BACKUP6 0x06
+#define PALMAS_BACKUP7 0x07
/* Bit definitions for BACKUP0 */
-#define PALMAS_BACKUP0_BACKUP_MASK 0xff
-#define PALMAS_BACKUP0_BACKUP_SHIFT 0
+#define PALMAS_BACKUP0_BACKUP_MASK 0xFF
+#define PALMAS_BACKUP0_BACKUP_SHIFT 0x00
/* Bit definitions for BACKUP1 */
-#define PALMAS_BACKUP1_BACKUP_MASK 0xff
-#define PALMAS_BACKUP1_BACKUP_SHIFT 0
+#define PALMAS_BACKUP1_BACKUP_MASK 0xFF
+#define PALMAS_BACKUP1_BACKUP_SHIFT 0x00
/* Bit definitions for BACKUP2 */
-#define PALMAS_BACKUP2_BACKUP_MASK 0xff
-#define PALMAS_BACKUP2_BACKUP_SHIFT 0
+#define PALMAS_BACKUP2_BACKUP_MASK 0xFF
+#define PALMAS_BACKUP2_BACKUP_SHIFT 0x00
/* Bit definitions for BACKUP3 */
-#define PALMAS_BACKUP3_BACKUP_MASK 0xff
-#define PALMAS_BACKUP3_BACKUP_SHIFT 0
+#define PALMAS_BACKUP3_BACKUP_MASK 0xFF
+#define PALMAS_BACKUP3_BACKUP_SHIFT 0x00
/* Bit definitions for BACKUP4 */
-#define PALMAS_BACKUP4_BACKUP_MASK 0xff
-#define PALMAS_BACKUP4_BACKUP_SHIFT 0
+#define PALMAS_BACKUP4_BACKUP_MASK 0xFF
+#define PALMAS_BACKUP4_BACKUP_SHIFT 0x00
/* Bit definitions for BACKUP5 */
-#define PALMAS_BACKUP5_BACKUP_MASK 0xff
-#define PALMAS_BACKUP5_BACKUP_SHIFT 0
+#define PALMAS_BACKUP5_BACKUP_MASK 0xFF
+#define PALMAS_BACKUP5_BACKUP_SHIFT 0x00
/* Bit definitions for BACKUP6 */
-#define PALMAS_BACKUP6_BACKUP_MASK 0xff
-#define PALMAS_BACKUP6_BACKUP_SHIFT 0
+#define PALMAS_BACKUP6_BACKUP_MASK 0xFF
+#define PALMAS_BACKUP6_BACKUP_SHIFT 0x00
/* Bit definitions for BACKUP7 */
-#define PALMAS_BACKUP7_BACKUP_MASK 0xff
-#define PALMAS_BACKUP7_BACKUP_SHIFT 0
+#define PALMAS_BACKUP7_BACKUP_MASK 0xFF
+#define PALMAS_BACKUP7_BACKUP_SHIFT 0x00
/* Registers for function SMPS */
-#define PALMAS_SMPS12_CTRL 0x0
-#define PALMAS_SMPS12_TSTEP 0x1
-#define PALMAS_SMPS12_FORCE 0x2
-#define PALMAS_SMPS12_VOLTAGE 0x3
-#define PALMAS_SMPS3_CTRL 0x4
-#define PALMAS_SMPS3_VOLTAGE 0x7
-#define PALMAS_SMPS45_CTRL 0x8
-#define PALMAS_SMPS45_TSTEP 0x9
-#define PALMAS_SMPS45_FORCE 0xA
-#define PALMAS_SMPS45_VOLTAGE 0xB
-#define PALMAS_SMPS6_CTRL 0xC
-#define PALMAS_SMPS6_TSTEP 0xD
-#define PALMAS_SMPS6_FORCE 0xE
-#define PALMAS_SMPS6_VOLTAGE 0xF
+#define PALMAS_SMPS12_CTRL 0x00
+#define PALMAS_SMPS12_TSTEP 0x01
+#define PALMAS_SMPS12_FORCE 0x02
+#define PALMAS_SMPS12_VOLTAGE 0x03
+#define PALMAS_SMPS3_CTRL 0x04
+#define PALMAS_SMPS3_VOLTAGE 0x07
+#define PALMAS_SMPS45_CTRL 0x08
+#define PALMAS_SMPS45_TSTEP 0x09
+#define PALMAS_SMPS45_FORCE 0x0A
+#define PALMAS_SMPS45_VOLTAGE 0x0B
+#define PALMAS_SMPS6_CTRL 0x0C
+#define PALMAS_SMPS6_TSTEP 0x0D
+#define PALMAS_SMPS6_FORCE 0x0E
+#define PALMAS_SMPS6_VOLTAGE 0x0F
#define PALMAS_SMPS7_CTRL 0x10
#define PALMAS_SMPS7_VOLTAGE 0x13
#define PALMAS_SMPS8_CTRL 0x14
@@ -744,303 +744,303 @@ enum usb_irq_events {
/* Bit definitions for SMPS12_CTRL */
#define PALMAS_SMPS12_CTRL_WR_S 0x80
-#define PALMAS_SMPS12_CTRL_WR_S_SHIFT 7
+#define PALMAS_SMPS12_CTRL_WR_S_SHIFT 0x07
#define PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN 0x40
-#define PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN_SHIFT 6
+#define PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN_SHIFT 0x06
#define PALMAS_SMPS12_CTRL_STATUS_MASK 0x30
-#define PALMAS_SMPS12_CTRL_STATUS_SHIFT 4
+#define PALMAS_SMPS12_CTRL_STATUS_SHIFT 0x04
#define PALMAS_SMPS12_CTRL_MODE_SLEEP_MASK 0x0c
-#define PALMAS_SMPS12_CTRL_MODE_SLEEP_SHIFT 2
+#define PALMAS_SMPS12_CTRL_MODE_SLEEP_SHIFT 0x02
#define PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK 0x03
-#define PALMAS_SMPS12_CTRL_MODE_ACTIVE_SHIFT 0
+#define PALMAS_SMPS12_CTRL_MODE_ACTIVE_SHIFT 0x00
/* Bit definitions for SMPS12_TSTEP */
#define PALMAS_SMPS12_TSTEP_TSTEP_MASK 0x03
-#define PALMAS_SMPS12_TSTEP_TSTEP_SHIFT 0
+#define PALMAS_SMPS12_TSTEP_TSTEP_SHIFT 0x00
/* Bit definitions for SMPS12_FORCE */
#define PALMAS_SMPS12_FORCE_CMD 0x80
-#define PALMAS_SMPS12_FORCE_CMD_SHIFT 7
-#define PALMAS_SMPS12_FORCE_VSEL_MASK 0x7f
-#define PALMAS_SMPS12_FORCE_VSEL_SHIFT 0
+#define PALMAS_SMPS12_FORCE_CMD_SHIFT 0x07
+#define PALMAS_SMPS12_FORCE_VSEL_MASK 0x7F
+#define PALMAS_SMPS12_FORCE_VSEL_SHIFT 0x00
/* Bit definitions for SMPS12_VOLTAGE */
#define PALMAS_SMPS12_VOLTAGE_RANGE 0x80
-#define PALMAS_SMPS12_VOLTAGE_RANGE_SHIFT 7
-#define PALMAS_SMPS12_VOLTAGE_VSEL_MASK 0x7f
-#define PALMAS_SMPS12_VOLTAGE_VSEL_SHIFT 0
+#define PALMAS_SMPS12_VOLTAGE_RANGE_SHIFT 0x07
+#define PALMAS_SMPS12_VOLTAGE_VSEL_MASK 0x7F
+#define PALMAS_SMPS12_VOLTAGE_VSEL_SHIFT 0x00
/* Bit definitions for SMPS3_CTRL */
#define PALMAS_SMPS3_CTRL_WR_S 0x80
-#define PALMAS_SMPS3_CTRL_WR_S_SHIFT 7
+#define PALMAS_SMPS3_CTRL_WR_S_SHIFT 0x07
#define PALMAS_SMPS3_CTRL_STATUS_MASK 0x30
-#define PALMAS_SMPS3_CTRL_STATUS_SHIFT 4
+#define PALMAS_SMPS3_CTRL_STATUS_SHIFT 0x04
#define PALMAS_SMPS3_CTRL_MODE_SLEEP_MASK 0x0c
-#define PALMAS_SMPS3_CTRL_MODE_SLEEP_SHIFT 2
+#define PALMAS_SMPS3_CTRL_MODE_SLEEP_SHIFT 0x02
#define PALMAS_SMPS3_CTRL_MODE_ACTIVE_MASK 0x03
-#define PALMAS_SMPS3_CTRL_MODE_ACTIVE_SHIFT 0
+#define PALMAS_SMPS3_CTRL_MODE_ACTIVE_SHIFT 0x00
/* Bit definitions for SMPS3_VOLTAGE */
#define PALMAS_SMPS3_VOLTAGE_RANGE 0x80
-#define PALMAS_SMPS3_VOLTAGE_RANGE_SHIFT 7
-#define PALMAS_SMPS3_VOLTAGE_VSEL_MASK 0x7f
-#define PALMAS_SMPS3_VOLTAGE_VSEL_SHIFT 0
+#define PALMAS_SMPS3_VOLTAGE_RANGE_SHIFT 0x07
+#define PALMAS_SMPS3_VOLTAGE_VSEL_MASK 0x7F
+#define PALMAS_SMPS3_VOLTAGE_VSEL_SHIFT 0x00
/* Bit definitions for SMPS45_CTRL */
#define PALMAS_SMPS45_CTRL_WR_S 0x80
-#define PALMAS_SMPS45_CTRL_WR_S_SHIFT 7
+#define PALMAS_SMPS45_CTRL_WR_S_SHIFT 0x07
#define PALMAS_SMPS45_CTRL_ROOF_FLOOR_EN 0x40
-#define PALMAS_SMPS45_CTRL_ROOF_FLOOR_EN_SHIFT 6
+#define PALMAS_SMPS45_CTRL_ROOF_FLOOR_EN_SHIFT 0x06
#define PALMAS_SMPS45_CTRL_STATUS_MASK 0x30
-#define PALMAS_SMPS45_CTRL_STATUS_SHIFT 4
+#define PALMAS_SMPS45_CTRL_STATUS_SHIFT 0x04
#define PALMAS_SMPS45_CTRL_MODE_SLEEP_MASK 0x0c
-#define PALMAS_SMPS45_CTRL_MODE_SLEEP_SHIFT 2
+#define PALMAS_SMPS45_CTRL_MODE_SLEEP_SHIFT 0x02
#define PALMAS_SMPS45_CTRL_MODE_ACTIVE_MASK 0x03
-#define PALMAS_SMPS45_CTRL_MODE_ACTIVE_SHIFT 0
+#define PALMAS_SMPS45_CTRL_MODE_ACTIVE_SHIFT 0x00
/* Bit definitions for SMPS45_TSTEP */
#define PALMAS_SMPS45_TSTEP_TSTEP_MASK 0x03
-#define PALMAS_SMPS45_TSTEP_TSTEP_SHIFT 0
+#define PALMAS_SMPS45_TSTEP_TSTEP_SHIFT 0x00
/* Bit definitions for SMPS45_FORCE */
#define PALMAS_SMPS45_FORCE_CMD 0x80
-#define PALMAS_SMPS45_FORCE_CMD_SHIFT 7
-#define PALMAS_SMPS45_FORCE_VSEL_MASK 0x7f
-#define PALMAS_SMPS45_FORCE_VSEL_SHIFT 0
+#define PALMAS_SMPS45_FORCE_CMD_SHIFT 0x07
+#define PALMAS_SMPS45_FORCE_VSEL_MASK 0x7F
+#define PALMAS_SMPS45_FORCE_VSEL_SHIFT 0x00
/* Bit definitions for SMPS45_VOLTAGE */
#define PALMAS_SMPS45_VOLTAGE_RANGE 0x80
-#define PALMAS_SMPS45_VOLTAGE_RANGE_SHIFT 7
-#define PALMAS_SMPS45_VOLTAGE_VSEL_MASK 0x7f
-#define PALMAS_SMPS45_VOLTAGE_VSEL_SHIFT 0
+#define PALMAS_SMPS45_VOLTAGE_RANGE_SHIFT 0x07
+#define PALMAS_SMPS45_VOLTAGE_VSEL_MASK 0x7F
+#define PALMAS_SMPS45_VOLTAGE_VSEL_SHIFT 0x00
/* Bit definitions for SMPS6_CTRL */
#define PALMAS_SMPS6_CTRL_WR_S 0x80
-#define PALMAS_SMPS6_CTRL_WR_S_SHIFT 7
+#define PALMAS_SMPS6_CTRL_WR_S_SHIFT 0x07
#define PALMAS_SMPS6_CTRL_ROOF_FLOOR_EN 0x40
-#define PALMAS_SMPS6_CTRL_ROOF_FLOOR_EN_SHIFT 6
+#define PALMAS_SMPS6_CTRL_ROOF_FLOOR_EN_SHIFT 0x06
#define PALMAS_SMPS6_CTRL_STATUS_MASK 0x30
-#define PALMAS_SMPS6_CTRL_STATUS_SHIFT 4
+#define PALMAS_SMPS6_CTRL_STATUS_SHIFT 0x04
#define PALMAS_SMPS6_CTRL_MODE_SLEEP_MASK 0x0c
-#define PALMAS_SMPS6_CTRL_MODE_SLEEP_SHIFT 2
+#define PALMAS_SMPS6_CTRL_MODE_SLEEP_SHIFT 0x02
#define PALMAS_SMPS6_CTRL_MODE_ACTIVE_MASK 0x03
-#define PALMAS_SMPS6_CTRL_MODE_ACTIVE_SHIFT 0
+#define PALMAS_SMPS6_CTRL_MODE_ACTIVE_SHIFT 0x00
/* Bit definitions for SMPS6_TSTEP */
#define PALMAS_SMPS6_TSTEP_TSTEP_MASK 0x03
-#define PALMAS_SMPS6_TSTEP_TSTEP_SHIFT 0
+#define PALMAS_SMPS6_TSTEP_TSTEP_SHIFT 0x00
/* Bit definitions for SMPS6_FORCE */
#define PALMAS_SMPS6_FORCE_CMD 0x80
-#define PALMAS_SMPS6_FORCE_CMD_SHIFT 7
-#define PALMAS_SMPS6_FORCE_VSEL_MASK 0x7f
-#define PALMAS_SMPS6_FORCE_VSEL_SHIFT 0
+#define PALMAS_SMPS6_FORCE_CMD_SHIFT 0x07
+#define PALMAS_SMPS6_FORCE_VSEL_MASK 0x7F
+#define PALMAS_SMPS6_FORCE_VSEL_SHIFT 0x00
/* Bit definitions for SMPS6_VOLTAGE */
#define PALMAS_SMPS6_VOLTAGE_RANGE 0x80
-#define PALMAS_SMPS6_VOLTAGE_RANGE_SHIFT 7
-#define PALMAS_SMPS6_VOLTAGE_VSEL_MASK 0x7f
-#define PALMAS_SMPS6_VOLTAGE_VSEL_SHIFT 0
+#define PALMAS_SMPS6_VOLTAGE_RANGE_SHIFT 0x07
+#define PALMAS_SMPS6_VOLTAGE_VSEL_MASK 0x7F
+#define PALMAS_SMPS6_VOLTAGE_VSEL_SHIFT 0x00
/* Bit definitions for SMPS7_CTRL */
#define PALMAS_SMPS7_CTRL_WR_S 0x80
-#define PALMAS_SMPS7_CTRL_WR_S_SHIFT 7
+#define PALMAS_SMPS7_CTRL_WR_S_SHIFT 0x07
#define PALMAS_SMPS7_CTRL_STATUS_MASK 0x30
-#define PALMAS_SMPS7_CTRL_STATUS_SHIFT 4
+#define PALMAS_SMPS7_CTRL_STATUS_SHIFT 0x04
#define PALMAS_SMPS7_CTRL_MODE_SLEEP_MASK 0x0c
-#define PALMAS_SMPS7_CTRL_MODE_SLEEP_SHIFT 2
+#define PALMAS_SMPS7_CTRL_MODE_SLEEP_SHIFT 0x02
#define PALMAS_SMPS7_CTRL_MODE_ACTIVE_MASK 0x03
-#define PALMAS_SMPS7_CTRL_MODE_ACTIVE_SHIFT 0
+#define PALMAS_SMPS7_CTRL_MODE_ACTIVE_SHIFT 0x00
/* Bit definitions for SMPS7_VOLTAGE */
#define PALMAS_SMPS7_VOLTAGE_RANGE 0x80
-#define PALMAS_SMPS7_VOLTAGE_RANGE_SHIFT 7
-#define PALMAS_SMPS7_VOLTAGE_VSEL_MASK 0x7f
-#define PALMAS_SMPS7_VOLTAGE_VSEL_SHIFT 0
+#define PALMAS_SMPS7_VOLTAGE_RANGE_SHIFT 0x07
+#define PALMAS_SMPS7_VOLTAGE_VSEL_MASK 0x7F
+#define PALMAS_SMPS7_VOLTAGE_VSEL_SHIFT 0x00
/* Bit definitions for SMPS8_CTRL */
#define PALMAS_SMPS8_CTRL_WR_S 0x80
-#define PALMAS_SMPS8_CTRL_WR_S_SHIFT 7
+#define PALMAS_SMPS8_CTRL_WR_S_SHIFT 0x07
#define PALMAS_SMPS8_CTRL_ROOF_FLOOR_EN 0x40
-#define PALMAS_SMPS8_CTRL_ROOF_FLOOR_EN_SHIFT 6
+#define PALMAS_SMPS8_CTRL_ROOF_FLOOR_EN_SHIFT 0x06
#define PALMAS_SMPS8_CTRL_STATUS_MASK 0x30
-#define PALMAS_SMPS8_CTRL_STATUS_SHIFT 4
+#define PALMAS_SMPS8_CTRL_STATUS_SHIFT 0x04
#define PALMAS_SMPS8_CTRL_MODE_SLEEP_MASK 0x0c
-#define PALMAS_SMPS8_CTRL_MODE_SLEEP_SHIFT 2
+#define PALMAS_SMPS8_CTRL_MODE_SLEEP_SHIFT 0x02
#define PALMAS_SMPS8_CTRL_MODE_ACTIVE_MASK 0x03
-#define PALMAS_SMPS8_CTRL_MODE_ACTIVE_SHIFT 0
+#define PALMAS_SMPS8_CTRL_MODE_ACTIVE_SHIFT 0x00
/* Bit definitions for SMPS8_TSTEP */
#define PALMAS_SMPS8_TSTEP_TSTEP_MASK 0x03
-#define PALMAS_SMPS8_TSTEP_TSTEP_SHIFT 0
+#define PALMAS_SMPS8_TSTEP_TSTEP_SHIFT 0x00
/* Bit definitions for SMPS8_FORCE */
#define PALMAS_SMPS8_FORCE_CMD 0x80
-#define PALMAS_SMPS8_FORCE_CMD_SHIFT 7
-#define PALMAS_SMPS8_FORCE_VSEL_MASK 0x7f
-#define PALMAS_SMPS8_FORCE_VSEL_SHIFT 0
+#define PALMAS_SMPS8_FORCE_CMD_SHIFT 0x07
+#define PALMAS_SMPS8_FORCE_VSEL_MASK 0x7F
+#define PALMAS_SMPS8_FORCE_VSEL_SHIFT 0x00
/* Bit definitions for SMPS8_VOLTAGE */
#define PALMAS_SMPS8_VOLTAGE_RANGE 0x80
-#define PALMAS_SMPS8_VOLTAGE_RANGE_SHIFT 7
-#define PALMAS_SMPS8_VOLTAGE_VSEL_MASK 0x7f
-#define PALMAS_SMPS8_VOLTAGE_VSEL_SHIFT 0
+#define PALMAS_SMPS8_VOLTAGE_RANGE_SHIFT 0x07
+#define PALMAS_SMPS8_VOLTAGE_VSEL_MASK 0x7F
+#define PALMAS_SMPS8_VOLTAGE_VSEL_SHIFT 0x00
/* Bit definitions for SMPS9_CTRL */
#define PALMAS_SMPS9_CTRL_WR_S 0x80
-#define PALMAS_SMPS9_CTRL_WR_S_SHIFT 7
+#define PALMAS_SMPS9_CTRL_WR_S_SHIFT 0x07
#define PALMAS_SMPS9_CTRL_STATUS_MASK 0x30
-#define PALMAS_SMPS9_CTRL_STATUS_SHIFT 4
+#define PALMAS_SMPS9_CTRL_STATUS_SHIFT 0x04
#define PALMAS_SMPS9_CTRL_MODE_SLEEP_MASK 0x0c
-#define PALMAS_SMPS9_CTRL_MODE_SLEEP_SHIFT 2
+#define PALMAS_SMPS9_CTRL_MODE_SLEEP_SHIFT 0x02
#define PALMAS_SMPS9_CTRL_MODE_ACTIVE_MASK 0x03
-#define PALMAS_SMPS9_CTRL_MODE_ACTIVE_SHIFT 0
+#define PALMAS_SMPS9_CTRL_MODE_ACTIVE_SHIFT 0x00
/* Bit definitions for SMPS9_VOLTAGE */
#define PALMAS_SMPS9_VOLTAGE_RANGE 0x80
-#define PALMAS_SMPS9_VOLTAGE_RANGE_SHIFT 7
-#define PALMAS_SMPS9_VOLTAGE_VSEL_MASK 0x7f
-#define PALMAS_SMPS9_VOLTAGE_VSEL_SHIFT 0
+#define PALMAS_SMPS9_VOLTAGE_RANGE_SHIFT 0x07
+#define PALMAS_SMPS9_VOLTAGE_VSEL_MASK 0x7F
+#define PALMAS_SMPS9_VOLTAGE_VSEL_SHIFT 0x00
/* Bit definitions for SMPS10_CTRL */
#define PALMAS_SMPS10_CTRL_MODE_SLEEP_MASK 0xf0
-#define PALMAS_SMPS10_CTRL_MODE_SLEEP_SHIFT 4
-#define PALMAS_SMPS10_CTRL_MODE_ACTIVE_MASK 0x0f
-#define PALMAS_SMPS10_CTRL_MODE_ACTIVE_SHIFT 0
+#define PALMAS_SMPS10_CTRL_MODE_SLEEP_SHIFT 0x04
+#define PALMAS_SMPS10_CTRL_MODE_ACTIVE_MASK 0x0F
+#define PALMAS_SMPS10_CTRL_MODE_ACTIVE_SHIFT 0x00
/* Bit definitions for SMPS10_STATUS */
-#define PALMAS_SMPS10_STATUS_STATUS_MASK 0x0f
-#define PALMAS_SMPS10_STATUS_STATUS_SHIFT 0
+#define PALMAS_SMPS10_STATUS_STATUS_MASK 0x0F
+#define PALMAS_SMPS10_STATUS_STATUS_SHIFT 0x00
/* Bit definitions for SMPS_CTRL */
#define PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN 0x20
-#define PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN_SHIFT 5
+#define PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN_SHIFT 0x05
#define PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN 0x10
-#define PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN_SHIFT 4
+#define PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN_SHIFT 0x04
#define PALMAS_SMPS_CTRL_SMPS45_PHASE_CTRL_MASK 0x0c
-#define PALMAS_SMPS_CTRL_SMPS45_PHASE_CTRL_SHIFT 2
+#define PALMAS_SMPS_CTRL_SMPS45_PHASE_CTRL_SHIFT 0x02
#define PALMAS_SMPS_CTRL_SMPS123_PHASE_CTRL_MASK 0x03
-#define PALMAS_SMPS_CTRL_SMPS123_PHASE_CTRL_SHIFT 0
+#define PALMAS_SMPS_CTRL_SMPS123_PHASE_CTRL_SHIFT 0x00
/* Bit definitions for SMPS_PD_CTRL */
#define PALMAS_SMPS_PD_CTRL_SMPS9 0x40
-#define PALMAS_SMPS_PD_CTRL_SMPS9_SHIFT 6
+#define PALMAS_SMPS_PD_CTRL_SMPS9_SHIFT 0x06
#define PALMAS_SMPS_PD_CTRL_SMPS8 0x20
-#define PALMAS_SMPS_PD_CTRL_SMPS8_SHIFT 5
+#define PALMAS_SMPS_PD_CTRL_SMPS8_SHIFT 0x05
#define PALMAS_SMPS_PD_CTRL_SMPS7 0x10
-#define PALMAS_SMPS_PD_CTRL_SMPS7_SHIFT 4
+#define PALMAS_SMPS_PD_CTRL_SMPS7_SHIFT 0x04
#define PALMAS_SMPS_PD_CTRL_SMPS6 0x08
-#define PALMAS_SMPS_PD_CTRL_SMPS6_SHIFT 3
+#define PALMAS_SMPS_PD_CTRL_SMPS6_SHIFT 0x03
#define PALMAS_SMPS_PD_CTRL_SMPS45 0x04
-#define PALMAS_SMPS_PD_CTRL_SMPS45_SHIFT 2
+#define PALMAS_SMPS_PD_CTRL_SMPS45_SHIFT 0x02
#define PALMAS_SMPS_PD_CTRL_SMPS3 0x02
-#define PALMAS_SMPS_PD_CTRL_SMPS3_SHIFT 1
+#define PALMAS_SMPS_PD_CTRL_SMPS3_SHIFT 0x01
#define PALMAS_SMPS_PD_CTRL_SMPS12 0x01
-#define PALMAS_SMPS_PD_CTRL_SMPS12_SHIFT 0
+#define PALMAS_SMPS_PD_CTRL_SMPS12_SHIFT 0x00
/* Bit definitions for SMPS_THERMAL_EN */
#define PALMAS_SMPS_THERMAL_EN_SMPS9 0x40
-#define PALMAS_SMPS_THERMAL_EN_SMPS9_SHIFT 6
+#define PALMAS_SMPS_THERMAL_EN_SMPS9_SHIFT 0x06
#define PALMAS_SMPS_THERMAL_EN_SMPS8 0x20
-#define PALMAS_SMPS_THERMAL_EN_SMPS8_SHIFT 5
+#define PALMAS_SMPS_THERMAL_EN_SMPS8_SHIFT 0x05
#define PALMAS_SMPS_THERMAL_EN_SMPS6 0x08
-#define PALMAS_SMPS_THERMAL_EN_SMPS6_SHIFT 3
+#define PALMAS_SMPS_THERMAL_EN_SMPS6_SHIFT 0x03
#define PALMAS_SMPS_THERMAL_EN_SMPS457 0x04
-#define PALMAS_SMPS_THERMAL_EN_SMPS457_SHIFT 2
+#define PALMAS_SMPS_THERMAL_EN_SMPS457_SHIFT 0x02
#define PALMAS_SMPS_THERMAL_EN_SMPS123 0x01
-#define PALMAS_SMPS_THERMAL_EN_SMPS123_SHIFT 0
+#define PALMAS_SMPS_THERMAL_EN_SMPS123_SHIFT 0x00
/* Bit definitions for SMPS_THERMAL_STATUS */
#define PALMAS_SMPS_THERMAL_STATUS_SMPS9 0x40
-#define PALMAS_SMPS_THERMAL_STATUS_SMPS9_SHIFT 6
+#define PALMAS_SMPS_THERMAL_STATUS_SMPS9_SHIFT 0x06
#define PALMAS_SMPS_THERMAL_STATUS_SMPS8 0x20
-#define PALMAS_SMPS_THERMAL_STATUS_SMPS8_SHIFT 5
+#define PALMAS_SMPS_THERMAL_STATUS_SMPS8_SHIFT 0x05
#define PALMAS_SMPS_THERMAL_STATUS_SMPS6 0x08
-#define PALMAS_SMPS_THERMAL_STATUS_SMPS6_SHIFT 3
+#define PALMAS_SMPS_THERMAL_STATUS_SMPS6_SHIFT 0x03
#define PALMAS_SMPS_THERMAL_STATUS_SMPS457 0x04
-#define PALMAS_SMPS_THERMAL_STATUS_SMPS457_SHIFT 2
+#define PALMAS_SMPS_THERMAL_STATUS_SMPS457_SHIFT 0x02
#define PALMAS_SMPS_THERMAL_STATUS_SMPS123 0x01
-#define PALMAS_SMPS_THERMAL_STATUS_SMPS123_SHIFT 0
+#define PALMAS_SMPS_THERMAL_STATUS_SMPS123_SHIFT 0x00
/* Bit definitions for SMPS_SHORT_STATUS */
#define PALMAS_SMPS_SHORT_STATUS_SMPS10 0x80
-#define PALMAS_SMPS_SHORT_STATUS_SMPS10_SHIFT 7
+#define PALMAS_SMPS_SHORT_STATUS_SMPS10_SHIFT 0x07
#define PALMAS_SMPS_SHORT_STATUS_SMPS9 0x40
-#define PALMAS_SMPS_SHORT_STATUS_SMPS9_SHIFT 6
+#define PALMAS_SMPS_SHORT_STATUS_SMPS9_SHIFT 0x06
#define PALMAS_SMPS_SHORT_STATUS_SMPS8 0x20
-#define PALMAS_SMPS_SHORT_STATUS_SMPS8_SHIFT 5
+#define PALMAS_SMPS_SHORT_STATUS_SMPS8_SHIFT 0x05
#define PALMAS_SMPS_SHORT_STATUS_SMPS7 0x10
-#define PALMAS_SMPS_SHORT_STATUS_SMPS7_SHIFT 4
+#define PALMAS_SMPS_SHORT_STATUS_SMPS7_SHIFT 0x04
#define PALMAS_SMPS_SHORT_STATUS_SMPS6 0x08
-#define PALMAS_SMPS_SHORT_STATUS_SMPS6_SHIFT 3
+#define PALMAS_SMPS_SHORT_STATUS_SMPS6_SHIFT 0x03
#define PALMAS_SMPS_SHORT_STATUS_SMPS45 0x04
-#define PALMAS_SMPS_SHORT_STATUS_SMPS45_SHIFT 2
+#define PALMAS_SMPS_SHORT_STATUS_SMPS45_SHIFT 0x02
#define PALMAS_SMPS_SHORT_STATUS_SMPS3 0x02
-#define PALMAS_SMPS_SHORT_STATUS_SMPS3_SHIFT 1
+#define PALMAS_SMPS_SHORT_STATUS_SMPS3_SHIFT 0x01
#define PALMAS_SMPS_SHORT_STATUS_SMPS12 0x01
-#define PALMAS_SMPS_SHORT_STATUS_SMPS12_SHIFT 0
+#define PALMAS_SMPS_SHORT_STATUS_SMPS12_SHIFT 0x00
/* Bit definitions for SMPS_NEGATIVE_CURRENT_LIMIT_EN */
#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS9 0x40
-#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS9_SHIFT 6
+#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS9_SHIFT 0x06
#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS8 0x20
-#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS8_SHIFT 5
+#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS8_SHIFT 0x05
#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS7 0x10
-#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS7_SHIFT 4
+#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS7_SHIFT 0x04
#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS6 0x08
-#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS6_SHIFT 3
+#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS6_SHIFT 0x03
#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS45 0x04
-#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS45_SHIFT 2
+#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS45_SHIFT 0x02
#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS3 0x02
-#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS3_SHIFT 1
+#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS3_SHIFT 0x01
#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS12 0x01
-#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS12_SHIFT 0
+#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS12_SHIFT 0x00
/* Bit definitions for SMPS_POWERGOOD_MASK1 */
#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS10 0x80
-#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS10_SHIFT 7
+#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS10_SHIFT 0x07
#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS9 0x40
-#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS9_SHIFT 6
+#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS9_SHIFT 0x06
#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS8 0x20
-#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS8_SHIFT 5
+#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS8_SHIFT 0x05
#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS7 0x10
-#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS7_SHIFT 4
+#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS7_SHIFT 0x04
#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS6 0x08
-#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS6_SHIFT 3
+#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS6_SHIFT 0x03
#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS45 0x04
-#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS45_SHIFT 2
+#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS45_SHIFT 0x02
#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS3 0x02
-#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS3_SHIFT 1
+#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS3_SHIFT 0x01
#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS12 0x01
-#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS12_SHIFT 0
+#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS12_SHIFT 0x00
/* Bit definitions for SMPS_POWERGOOD_MASK2 */
#define PALMAS_SMPS_POWERGOOD_MASK2_POWERGOOD_TYPE_SELECT 0x80
-#define PALMAS_SMPS_POWERGOOD_MASK2_POWERGOOD_TYPE_SELECT_SHIFT 7
+#define PALMAS_SMPS_POWERGOOD_MASK2_POWERGOOD_TYPE_SELECT_SHIFT 0x07
#define PALMAS_SMPS_POWERGOOD_MASK2_GPIO_7 0x04
-#define PALMAS_SMPS_POWERGOOD_MASK2_GPIO_7_SHIFT 2
+#define PALMAS_SMPS_POWERGOOD_MASK2_GPIO_7_SHIFT 0x02
#define PALMAS_SMPS_POWERGOOD_MASK2_VBUS 0x02
-#define PALMAS_SMPS_POWERGOOD_MASK2_VBUS_SHIFT 1
+#define PALMAS_SMPS_POWERGOOD_MASK2_VBUS_SHIFT 0x01
#define PALMAS_SMPS_POWERGOOD_MASK2_ACOK 0x01
-#define PALMAS_SMPS_POWERGOOD_MASK2_ACOK_SHIFT 0
+#define PALMAS_SMPS_POWERGOOD_MASK2_ACOK_SHIFT 0x00
/* Registers for function LDO */
-#define PALMAS_LDO1_CTRL 0x0
-#define PALMAS_LDO1_VOLTAGE 0x1
-#define PALMAS_LDO2_CTRL 0x2
-#define PALMAS_LDO2_VOLTAGE 0x3
-#define PALMAS_LDO3_CTRL 0x4
-#define PALMAS_LDO3_VOLTAGE 0x5
-#define PALMAS_LDO4_CTRL 0x6
-#define PALMAS_LDO4_VOLTAGE 0x7
-#define PALMAS_LDO5_CTRL 0x8
-#define PALMAS_LDO5_VOLTAGE 0x9
-#define PALMAS_LDO6_CTRL 0xA
-#define PALMAS_LDO6_VOLTAGE 0xB
-#define PALMAS_LDO7_CTRL 0xC
-#define PALMAS_LDO7_VOLTAGE 0xD
-#define PALMAS_LDO8_CTRL 0xE
-#define PALMAS_LDO8_VOLTAGE 0xF
+#define PALMAS_LDO1_CTRL 0x00
+#define PALMAS_LDO1_VOLTAGE 0x01
+#define PALMAS_LDO2_CTRL 0x02
+#define PALMAS_LDO2_VOLTAGE 0x03
+#define PALMAS_LDO3_CTRL 0x04
+#define PALMAS_LDO3_VOLTAGE 0x05
+#define PALMAS_LDO4_CTRL 0x06
+#define PALMAS_LDO4_VOLTAGE 0x07
+#define PALMAS_LDO5_CTRL 0x08
+#define PALMAS_LDO5_VOLTAGE 0x09
+#define PALMAS_LDO6_CTRL 0x0A
+#define PALMAS_LDO6_VOLTAGE 0x0B
+#define PALMAS_LDO7_CTRL 0x0C
+#define PALMAS_LDO7_VOLTAGE 0x0D
+#define PALMAS_LDO8_CTRL 0x0E
+#define PALMAS_LDO8_VOLTAGE 0x0F
#define PALMAS_LDO9_CTRL 0x10
#define PALMAS_LDO9_VOLTAGE 0x11
#define PALMAS_LDOLN_CTRL 0x12
@@ -1055,236 +1055,236 @@ enum usb_irq_events {
/* Bit definitions for LDO1_CTRL */
#define PALMAS_LDO1_CTRL_WR_S 0x80
-#define PALMAS_LDO1_CTRL_WR_S_SHIFT 7
+#define PALMAS_LDO1_CTRL_WR_S_SHIFT 0x07
#define PALMAS_LDO1_CTRL_STATUS 0x10
-#define PALMAS_LDO1_CTRL_STATUS_SHIFT 4
+#define PALMAS_LDO1_CTRL_STATUS_SHIFT 0x04
#define PALMAS_LDO1_CTRL_MODE_SLEEP 0x04
-#define PALMAS_LDO1_CTRL_MODE_SLEEP_SHIFT 2
+#define PALMAS_LDO1_CTRL_MODE_SLEEP_SHIFT 0x02
#define PALMAS_LDO1_CTRL_MODE_ACTIVE 0x01
-#define PALMAS_LDO1_CTRL_MODE_ACTIVE_SHIFT 0
+#define PALMAS_LDO1_CTRL_MODE_ACTIVE_SHIFT 0x00
/* Bit definitions for LDO1_VOLTAGE */
-#define PALMAS_LDO1_VOLTAGE_VSEL_MASK 0x3f
-#define PALMAS_LDO1_VOLTAGE_VSEL_SHIFT 0
+#define PALMAS_LDO1_VOLTAGE_VSEL_MASK 0x3F
+#define PALMAS_LDO1_VOLTAGE_VSEL_SHIFT 0x00
/* Bit definitions for LDO2_CTRL */
#define PALMAS_LDO2_CTRL_WR_S 0x80
-#define PALMAS_LDO2_CTRL_WR_S_SHIFT 7
+#define PALMAS_LDO2_CTRL_WR_S_SHIFT 0x07
#define PALMAS_LDO2_CTRL_STATUS 0x10
-#define PALMAS_LDO2_CTRL_STATUS_SHIFT 4
+#define PALMAS_LDO2_CTRL_STATUS_SHIFT 0x04
#define PALMAS_LDO2_CTRL_MODE_SLEEP 0x04
-#define PALMAS_LDO2_CTRL_MODE_SLEEP_SHIFT 2
+#define PALMAS_LDO2_CTRL_MODE_SLEEP_SHIFT 0x02
#define PALMAS_LDO2_CTRL_MODE_ACTIVE 0x01
-#define PALMAS_LDO2_CTRL_MODE_ACTIVE_SHIFT 0
+#define PALMAS_LDO2_CTRL_MODE_ACTIVE_SHIFT 0x00
/* Bit definitions for LDO2_VOLTAGE */
-#define PALMAS_LDO2_VOLTAGE_VSEL_MASK 0x3f
-#define PALMAS_LDO2_VOLTAGE_VSEL_SHIFT 0
+#define PALMAS_LDO2_VOLTAGE_VSEL_MASK 0x3F
+#define PALMAS_LDO2_VOLTAGE_VSEL_SHIFT 0x00
/* Bit definitions for LDO3_CTRL */
#define PALMAS_LDO3_CTRL_WR_S 0x80
-#define PALMAS_LDO3_CTRL_WR_S_SHIFT 7
+#define PALMAS_LDO3_CTRL_WR_S_SHIFT 0x07
#define PALMAS_LDO3_CTRL_STATUS 0x10
-#define PALMAS_LDO3_CTRL_STATUS_SHIFT 4
+#define PALMAS_LDO3_CTRL_STATUS_SHIFT 0x04
#define PALMAS_LDO3_CTRL_MODE_SLEEP 0x04
-#define PALMAS_LDO3_CTRL_MODE_SLEEP_SHIFT 2
+#define PALMAS_LDO3_CTRL_MODE_SLEEP_SHIFT 0x02
#define PALMAS_LDO3_CTRL_MODE_ACTIVE 0x01
-#define PALMAS_LDO3_CTRL_MODE_ACTIVE_SHIFT 0
+#define PALMAS_LDO3_CTRL_MODE_ACTIVE_SHIFT 0x00
/* Bit definitions for LDO3_VOLTAGE */
-#define PALMAS_LDO3_VOLTAGE_VSEL_MASK 0x3f
-#define PALMAS_LDO3_VOLTAGE_VSEL_SHIFT 0
+#define PALMAS_LDO3_VOLTAGE_VSEL_MASK 0x3F
+#define PALMAS_LDO3_VOLTAGE_VSEL_SHIFT 0x00
/* Bit definitions for LDO4_CTRL */
#define PALMAS_LDO4_CTRL_WR_S 0x80
-#define PALMAS_LDO4_CTRL_WR_S_SHIFT 7
+#define PALMAS_LDO4_CTRL_WR_S_SHIFT 0x07
#define PALMAS_LDO4_CTRL_STATUS 0x10
-#define PALMAS_LDO4_CTRL_STATUS_SHIFT 4
+#define PALMAS_LDO4_CTRL_STATUS_SHIFT 0x04
#define PALMAS_LDO4_CTRL_MODE_SLEEP 0x04
-#define PALMAS_LDO4_CTRL_MODE_SLEEP_SHIFT 2
+#define PALMAS_LDO4_CTRL_MODE_SLEEP_SHIFT 0x02
#define PALMAS_LDO4_CTRL_MODE_ACTIVE 0x01
-#define PALMAS_LDO4_CTRL_MODE_ACTIVE_SHIFT 0
+#define PALMAS_LDO4_CTRL_MODE_ACTIVE_SHIFT 0x00
/* Bit definitions for LDO4_VOLTAGE */
-#define PALMAS_LDO4_VOLTAGE_VSEL_MASK 0x3f
-#define PALMAS_LDO4_VOLTAGE_VSEL_SHIFT 0
+#define PALMAS_LDO4_VOLTAGE_VSEL_MASK 0x3F
+#define PALMAS_LDO4_VOLTAGE_VSEL_SHIFT 0x00
/* Bit definitions for LDO5_CTRL */
#define PALMAS_LDO5_CTRL_WR_S 0x80
-#define PALMAS_LDO5_CTRL_WR_S_SHIFT 7
+#define PALMAS_LDO5_CTRL_WR_S_SHIFT 0x07
#define PALMAS_LDO5_CTRL_STATUS 0x10
-#define PALMAS_LDO5_CTRL_STATUS_SHIFT 4
+#define PALMAS_LDO5_CTRL_STATUS_SHIFT 0x04
#define PALMAS_LDO5_CTRL_MODE_SLEEP 0x04
-#define PALMAS_LDO5_CTRL_MODE_SLEEP_SHIFT 2
+#define PALMAS_LDO5_CTRL_MODE_SLEEP_SHIFT 0x02
#define PALMAS_LDO5_CTRL_MODE_ACTIVE 0x01
-#define PALMAS_LDO5_CTRL_MODE_ACTIVE_SHIFT 0
+#define PALMAS_LDO5_CTRL_MODE_ACTIVE_SHIFT 0x00
/* Bit definitions for LDO5_VOLTAGE */
-#define PALMAS_LDO5_VOLTAGE_VSEL_MASK 0x3f
-#define PALMAS_LDO5_VOLTAGE_VSEL_SHIFT 0
+#define PALMAS_LDO5_VOLTAGE_VSEL_MASK 0x3F
+#define PALMAS_LDO5_VOLTAGE_VSEL_SHIFT 0x00
/* Bit definitions for LDO6_CTRL */
#define PALMAS_LDO6_CTRL_WR_S 0x80
-#define PALMAS_LDO6_CTRL_WR_S_SHIFT 7
+#define PALMAS_LDO6_CTRL_WR_S_SHIFT 0x07
#define PALMAS_LDO6_CTRL_LDO_VIB_EN 0x40
-#define PALMAS_LDO6_CTRL_LDO_VIB_EN_SHIFT 6
+#define PALMAS_LDO6_CTRL_LDO_VIB_EN_SHIFT 0x06
#define PALMAS_LDO6_CTRL_STATUS 0x10
-#define PALMAS_LDO6_CTRL_STATUS_SHIFT 4
+#define PALMAS_LDO6_CTRL_STATUS_SHIFT 0x04
#define PALMAS_LDO6_CTRL_MODE_SLEEP 0x04
-#define PALMAS_LDO6_CTRL_MODE_SLEEP_SHIFT 2
+#define PALMAS_LDO6_CTRL_MODE_SLEEP_SHIFT 0x02
#define PALMAS_LDO6_CTRL_MODE_ACTIVE 0x01
-#define PALMAS_LDO6_CTRL_MODE_ACTIVE_SHIFT 0
+#define PALMAS_LDO6_CTRL_MODE_ACTIVE_SHIFT 0x00
/* Bit definitions for LDO6_VOLTAGE */
-#define PALMAS_LDO6_VOLTAGE_VSEL_MASK 0x3f
-#define PALMAS_LDO6_VOLTAGE_VSEL_SHIFT 0
+#define PALMAS_LDO6_VOLTAGE_VSEL_MASK 0x3F
+#define PALMAS_LDO6_VOLTAGE_VSEL_SHIFT 0x00
/* Bit definitions for LDO7_CTRL */
#define PALMAS_LDO7_CTRL_WR_S 0x80
-#define PALMAS_LDO7_CTRL_WR_S_SHIFT 7
+#define PALMAS_LDO7_CTRL_WR_S_SHIFT 0x07
#define PALMAS_LDO7_CTRL_STATUS 0x10
-#define PALMAS_LDO7_CTRL_STATUS_SHIFT 4
+#define PALMAS_LDO7_CTRL_STATUS_SHIFT 0x04
#define PALMAS_LDO7_CTRL_MODE_SLEEP 0x04
-#define PALMAS_LDO7_CTRL_MODE_SLEEP_SHIFT 2
+#define PALMAS_LDO7_CTRL_MODE_SLEEP_SHIFT 0x02
#define PALMAS_LDO7_CTRL_MODE_ACTIVE 0x01
-#define PALMAS_LDO7_CTRL_MODE_ACTIVE_SHIFT 0
+#define PALMAS_LDO7_CTRL_MODE_ACTIVE_SHIFT 0x00
/* Bit definitions for LDO7_VOLTAGE */
-#define PALMAS_LDO7_VOLTAGE_VSEL_MASK 0x3f
-#define PALMAS_LDO7_VOLTAGE_VSEL_SHIFT 0
+#define PALMAS_LDO7_VOLTAGE_VSEL_MASK 0x3F
+#define PALMAS_LDO7_VOLTAGE_VSEL_SHIFT 0x00
/* Bit definitions for LDO8_CTRL */
#define PALMAS_LDO8_CTRL_WR_S 0x80
-#define PALMAS_LDO8_CTRL_WR_S_SHIFT 7
+#define PALMAS_LDO8_CTRL_WR_S_SHIFT 0x07
#define PALMAS_LDO8_CTRL_LDO_TRACKING_EN 0x40
-#define PALMAS_LDO8_CTRL_LDO_TRACKING_EN_SHIFT 6
+#define PALMAS_LDO8_CTRL_LDO_TRACKING_EN_SHIFT 0x06
#define PALMAS_LDO8_CTRL_STATUS 0x10
-#define PALMAS_LDO8_CTRL_STATUS_SHIFT 4
+#define PALMAS_LDO8_CTRL_STATUS_SHIFT 0x04
#define PALMAS_LDO8_CTRL_MODE_SLEEP 0x04
-#define PALMAS_LDO8_CTRL_MODE_SLEEP_SHIFT 2
+#define PALMAS_LDO8_CTRL_MODE_SLEEP_SHIFT 0x02
#define PALMAS_LDO8_CTRL_MODE_ACTIVE 0x01
-#define PALMAS_LDO8_CTRL_MODE_ACTIVE_SHIFT 0
+#define PALMAS_LDO8_CTRL_MODE_ACTIVE_SHIFT 0x00
/* Bit definitions for LDO8_VOLTAGE */
-#define PALMAS_LDO8_VOLTAGE_VSEL_MASK 0x3f
-#define PALMAS_LDO8_VOLTAGE_VSEL_SHIFT 0
+#define PALMAS_LDO8_VOLTAGE_VSEL_MASK 0x3F
+#define PALMAS_LDO8_VOLTAGE_VSEL_SHIFT 0x00
/* Bit definitions for LDO9_CTRL */
#define PALMAS_LDO9_CTRL_WR_S 0x80
-#define PALMAS_LDO9_CTRL_WR_S_SHIFT 7
+#define PALMAS_LDO9_CTRL_WR_S_SHIFT 0x07
#define PALMAS_LDO9_CTRL_LDO_BYPASS_EN 0x40
-#define PALMAS_LDO9_CTRL_LDO_BYPASS_EN_SHIFT 6
+#define PALMAS_LDO9_CTRL_LDO_BYPASS_EN_SHIFT 0x06
#define PALMAS_LDO9_CTRL_STATUS 0x10
-#define PALMAS_LDO9_CTRL_STATUS_SHIFT 4
+#define PALMAS_LDO9_CTRL_STATUS_SHIFT 0x04
#define PALMAS_LDO9_CTRL_MODE_SLEEP 0x04
-#define PALMAS_LDO9_CTRL_MODE_SLEEP_SHIFT 2
+#define PALMAS_LDO9_CTRL_MODE_SLEEP_SHIFT 0x02
#define PALMAS_LDO9_CTRL_MODE_ACTIVE 0x01
-#define PALMAS_LDO9_CTRL_MODE_ACTIVE_SHIFT 0
+#define PALMAS_LDO9_CTRL_MODE_ACTIVE_SHIFT 0x00
/* Bit definitions for LDO9_VOLTAGE */
-#define PALMAS_LDO9_VOLTAGE_VSEL_MASK 0x3f
-#define PALMAS_LDO9_VOLTAGE_VSEL_SHIFT 0
+#define PALMAS_LDO9_VOLTAGE_VSEL_MASK 0x3F
+#define PALMAS_LDO9_VOLTAGE_VSEL_SHIFT 0x00
/* Bit definitions for LDOLN_CTRL */
#define PALMAS_LDOLN_CTRL_WR_S 0x80
-#define PALMAS_LDOLN_CTRL_WR_S_SHIFT 7
+#define PALMAS_LDOLN_CTRL_WR_S_SHIFT 0x07
#define PALMAS_LDOLN_CTRL_STATUS 0x10
-#define PALMAS_LDOLN_CTRL_STATUS_SHIFT 4
+#define PALMAS_LDOLN_CTRL_STATUS_SHIFT 0x04
#define PALMAS_LDOLN_CTRL_MODE_SLEEP 0x04
-#define PALMAS_LDOLN_CTRL_MODE_SLEEP_SHIFT 2
+#define PALMAS_LDOLN_CTRL_MODE_SLEEP_SHIFT 0x02
#define PALMAS_LDOLN_CTRL_MODE_ACTIVE 0x01
-#define PALMAS_LDOLN_CTRL_MODE_ACTIVE_SHIFT 0
+#define PALMAS_LDOLN_CTRL_MODE_ACTIVE_SHIFT 0x00
/* Bit definitions for LDOLN_VOLTAGE */
-#define PALMAS_LDOLN_VOLTAGE_VSEL_MASK 0x3f
-#define PALMAS_LDOLN_VOLTAGE_VSEL_SHIFT 0
+#define PALMAS_LDOLN_VOLTAGE_VSEL_MASK 0x3F
+#define PALMAS_LDOLN_VOLTAGE_VSEL_SHIFT 0x00
/* Bit definitions for LDOUSB_CTRL */
#define PALMAS_LDOUSB_CTRL_WR_S 0x80
-#define PALMAS_LDOUSB_CTRL_WR_S_SHIFT 7
+#define PALMAS_LDOUSB_CTRL_WR_S_SHIFT 0x07
#define PALMAS_LDOUSB_CTRL_STATUS 0x10
-#define PALMAS_LDOUSB_CTRL_STATUS_SHIFT 4
+#define PALMAS_LDOUSB_CTRL_STATUS_SHIFT 0x04
#define PALMAS_LDOUSB_CTRL_MODE_SLEEP 0x04
-#define PALMAS_LDOUSB_CTRL_MODE_SLEEP_SHIFT 2
+#define PALMAS_LDOUSB_CTRL_MODE_SLEEP_SHIFT 0x02
#define PALMAS_LDOUSB_CTRL_MODE_ACTIVE 0x01
-#define PALMAS_LDOUSB_CTRL_MODE_ACTIVE_SHIFT 0
+#define PALMAS_LDOUSB_CTRL_MODE_ACTIVE_SHIFT 0x00
/* Bit definitions for LDOUSB_VOLTAGE */
-#define PALMAS_LDOUSB_VOLTAGE_VSEL_MASK 0x3f
-#define PALMAS_LDOUSB_VOLTAGE_VSEL_SHIFT 0
+#define PALMAS_LDOUSB_VOLTAGE_VSEL_MASK 0x3F
+#define PALMAS_LDOUSB_VOLTAGE_VSEL_SHIFT 0x00
/* Bit definitions for LDO_CTRL */
#define PALMAS_LDO_CTRL_LDOUSB_ON_VBUS_VSYS 0x01
-#define PALMAS_LDO_CTRL_LDOUSB_ON_VBUS_VSYS_SHIFT 0
+#define PALMAS_LDO_CTRL_LDOUSB_ON_VBUS_VSYS_SHIFT 0x00
/* Bit definitions for LDO_PD_CTRL1 */
#define PALMAS_LDO_PD_CTRL1_LDO8 0x80
-#define PALMAS_LDO_PD_CTRL1_LDO8_SHIFT 7
+#define PALMAS_LDO_PD_CTRL1_LDO8_SHIFT 0x07
#define PALMAS_LDO_PD_CTRL1_LDO7 0x40
-#define PALMAS_LDO_PD_CTRL1_LDO7_SHIFT 6
+#define PALMAS_LDO_PD_CTRL1_LDO7_SHIFT 0x06
#define PALMAS_LDO_PD_CTRL1_LDO6 0x20
-#define PALMAS_LDO_PD_CTRL1_LDO6_SHIFT 5
+#define PALMAS_LDO_PD_CTRL1_LDO6_SHIFT 0x05
#define PALMAS_LDO_PD_CTRL1_LDO5 0x10
-#define PALMAS_LDO_PD_CTRL1_LDO5_SHIFT 4
+#define PALMAS_LDO_PD_CTRL1_LDO5_SHIFT 0x04
#define PALMAS_LDO_PD_CTRL1_LDO4 0x08
-#define PALMAS_LDO_PD_CTRL1_LDO4_SHIFT 3
+#define PALMAS_LDO_PD_CTRL1_LDO4_SHIFT 0x03
#define PALMAS_LDO_PD_CTRL1_LDO3 0x04
-#define PALMAS_LDO_PD_CTRL1_LDO3_SHIFT 2
+#define PALMAS_LDO_PD_CTRL1_LDO3_SHIFT 0x02
#define PALMAS_LDO_PD_CTRL1_LDO2 0x02
-#define PALMAS_LDO_PD_CTRL1_LDO2_SHIFT 1
+#define PALMAS_LDO_PD_CTRL1_LDO2_SHIFT 0x01
#define PALMAS_LDO_PD_CTRL1_LDO1 0x01
-#define PALMAS_LDO_PD_CTRL1_LDO1_SHIFT 0
+#define PALMAS_LDO_PD_CTRL1_LDO1_SHIFT 0x00
/* Bit definitions for LDO_PD_CTRL2 */
#define PALMAS_LDO_PD_CTRL2_LDOUSB 0x04
-#define PALMAS_LDO_PD_CTRL2_LDOUSB_SHIFT 2
+#define PALMAS_LDO_PD_CTRL2_LDOUSB_SHIFT 0x02
#define PALMAS_LDO_PD_CTRL2_LDOLN 0x02
-#define PALMAS_LDO_PD_CTRL2_LDOLN_SHIFT 1
+#define PALMAS_LDO_PD_CTRL2_LDOLN_SHIFT 0x01
#define PALMAS_LDO_PD_CTRL2_LDO9 0x01
-#define PALMAS_LDO_PD_CTRL2_LDO9_SHIFT 0
+#define PALMAS_LDO_PD_CTRL2_LDO9_SHIFT 0x00
/* Bit definitions for LDO_SHORT_STATUS1 */
#define PALMAS_LDO_SHORT_STATUS1_LDO8 0x80
-#define PALMAS_LDO_SHORT_STATUS1_LDO8_SHIFT 7
+#define PALMAS_LDO_SHORT_STATUS1_LDO8_SHIFT 0x07
#define PALMAS_LDO_SHORT_STATUS1_LDO7 0x40
-#define PALMAS_LDO_SHORT_STATUS1_LDO7_SHIFT 6
+#define PALMAS_LDO_SHORT_STATUS1_LDO7_SHIFT 0x06
#define PALMAS_LDO_SHORT_STATUS1_LDO6 0x20
-#define PALMAS_LDO_SHORT_STATUS1_LDO6_SHIFT 5
+#define PALMAS_LDO_SHORT_STATUS1_LDO6_SHIFT 0x05
#define PALMAS_LDO_SHORT_STATUS1_LDO5 0x10
-#define PALMAS_LDO_SHORT_STATUS1_LDO5_SHIFT 4
+#define PALMAS_LDO_SHORT_STATUS1_LDO5_SHIFT 0x04
#define PALMAS_LDO_SHORT_STATUS1_LDO4 0x08
-#define PALMAS_LDO_SHORT_STATUS1_LDO4_SHIFT 3
+#define PALMAS_LDO_SHORT_STATUS1_LDO4_SHIFT 0x03
#define PALMAS_LDO_SHORT_STATUS1_LDO3 0x04
-#define PALMAS_LDO_SHORT_STATUS1_LDO3_SHIFT 2
+#define PALMAS_LDO_SHORT_STATUS1_LDO3_SHIFT 0x02
#define PALMAS_LDO_SHORT_STATUS1_LDO2 0x02
-#define PALMAS_LDO_SHORT_STATUS1_LDO2_SHIFT 1
+#define PALMAS_LDO_SHORT_STATUS1_LDO2_SHIFT 0x01
#define PALMAS_LDO_SHORT_STATUS1_LDO1 0x01
-#define PALMAS_LDO_SHORT_STATUS1_LDO1_SHIFT 0
+#define PALMAS_LDO_SHORT_STATUS1_LDO1_SHIFT 0x00
/* Bit definitions for LDO_SHORT_STATUS2 */
#define PALMAS_LDO_SHORT_STATUS2_LDOVANA 0x08
-#define PALMAS_LDO_SHORT_STATUS2_LDOVANA_SHIFT 3
+#define PALMAS_LDO_SHORT_STATUS2_LDOVANA_SHIFT 0x03
#define PALMAS_LDO_SHORT_STATUS2_LDOUSB 0x04
-#define PALMAS_LDO_SHORT_STATUS2_LDOUSB_SHIFT 2
+#define PALMAS_LDO_SHORT_STATUS2_LDOUSB_SHIFT 0x02
#define PALMAS_LDO_SHORT_STATUS2_LDOLN 0x02
-#define PALMAS_LDO_SHORT_STATUS2_LDOLN_SHIFT 1
+#define PALMAS_LDO_SHORT_STATUS2_LDOLN_SHIFT 0x01
#define PALMAS_LDO_SHORT_STATUS2_LDO9 0x01
-#define PALMAS_LDO_SHORT_STATUS2_LDO9_SHIFT 0
+#define PALMAS_LDO_SHORT_STATUS2_LDO9_SHIFT 0x00
/* Registers for function PMU_CONTROL */
-#define PALMAS_DEV_CTRL 0x0
-#define PALMAS_POWER_CTRL 0x1
-#define PALMAS_VSYS_LO 0x2
-#define PALMAS_VSYS_MON 0x3
-#define PALMAS_VBAT_MON 0x4
-#define PALMAS_WATCHDOG 0x5
-#define PALMAS_BOOT_STATUS 0x6
-#define PALMAS_BATTERY_BOUNCE 0x7
-#define PALMAS_BACKUP_BATTERY_CTRL 0x8
-#define PALMAS_LONG_PRESS_KEY 0x9
-#define PALMAS_OSC_THERM_CTRL 0xA
-#define PALMAS_BATDEBOUNCING 0xB
-#define PALMAS_SWOFF_HWRST 0xF
+#define PALMAS_DEV_CTRL 0x00
+#define PALMAS_POWER_CTRL 0x01
+#define PALMAS_VSYS_LO 0x02
+#define PALMAS_VSYS_MON 0x03
+#define PALMAS_VBAT_MON 0x04
+#define PALMAS_WATCHDOG 0x05
+#define PALMAS_BOOT_STATUS 0x06
+#define PALMAS_BATTERY_BOUNCE 0x07
+#define PALMAS_BACKUP_BATTERY_CTRL 0x08
+#define PALMAS_LONG_PRESS_KEY 0x09
+#define PALMAS_OSC_THERM_CTRL 0x0A
+#define PALMAS_BATDEBOUNCING 0x0B
+#define PALMAS_SWOFF_HWRST 0x0F
#define PALMAS_SWOFF_COLDRST 0x10
#define PALMAS_SWOFF_STATUS 0x11
#define PALMAS_PMU_CONFIG 0x12
@@ -1296,668 +1296,668 @@ enum usb_irq_events {
/* Bit definitions for DEV_CTRL */
#define PALMAS_DEV_CTRL_DEV_STATUS_MASK 0x0c
-#define PALMAS_DEV_CTRL_DEV_STATUS_SHIFT 2
+#define PALMAS_DEV_CTRL_DEV_STATUS_SHIFT 0x02
#define PALMAS_DEV_CTRL_SW_RST 0x02
-#define PALMAS_DEV_CTRL_SW_RST_SHIFT 1
+#define PALMAS_DEV_CTRL_SW_RST_SHIFT 0x01
#define PALMAS_DEV_CTRL_DEV_ON 0x01
-#define PALMAS_DEV_CTRL_DEV_ON_SHIFT 0
+#define PALMAS_DEV_CTRL_DEV_ON_SHIFT 0x00
/* Bit definitions for POWER_CTRL */
#define PALMAS_POWER_CTRL_ENABLE2_MASK 0x04
-#define PALMAS_POWER_CTRL_ENABLE2_MASK_SHIFT 2
+#define PALMAS_POWER_CTRL_ENABLE2_MASK_SHIFT 0x02
#define PALMAS_POWER_CTRL_ENABLE1_MASK 0x02
-#define PALMAS_POWER_CTRL_ENABLE1_MASK_SHIFT 1
+#define PALMAS_POWER_CTRL_ENABLE1_MASK_SHIFT 0x01
#define PALMAS_POWER_CTRL_NSLEEP_MASK 0x01
-#define PALMAS_POWER_CTRL_NSLEEP_MASK_SHIFT 0
+#define PALMAS_POWER_CTRL_NSLEEP_MASK_SHIFT 0x00
/* Bit definitions for VSYS_LO */
-#define PALMAS_VSYS_LO_THRESHOLD_MASK 0x1f
-#define PALMAS_VSYS_LO_THRESHOLD_SHIFT 0
+#define PALMAS_VSYS_LO_THRESHOLD_MASK 0x1F
+#define PALMAS_VSYS_LO_THRESHOLD_SHIFT 0x00
/* Bit definitions for VSYS_MON */
#define PALMAS_VSYS_MON_ENABLE 0x80
-#define PALMAS_VSYS_MON_ENABLE_SHIFT 7
-#define PALMAS_VSYS_MON_THRESHOLD_MASK 0x3f
-#define PALMAS_VSYS_MON_THRESHOLD_SHIFT 0
+#define PALMAS_VSYS_MON_ENABLE_SHIFT 0x07
+#define PALMAS_VSYS_MON_THRESHOLD_MASK 0x3F
+#define PALMAS_VSYS_MON_THRESHOLD_SHIFT 0x00
/* Bit definitions for VBAT_MON */
#define PALMAS_VBAT_MON_ENABLE 0x80
-#define PALMAS_VBAT_MON_ENABLE_SHIFT 7
-#define PALMAS_VBAT_MON_THRESHOLD_MASK 0x3f
-#define PALMAS_VBAT_MON_THRESHOLD_SHIFT 0
+#define PALMAS_VBAT_MON_ENABLE_SHIFT 0x07
+#define PALMAS_VBAT_MON_THRESHOLD_MASK 0x3F
+#define PALMAS_VBAT_MON_THRESHOLD_SHIFT 0x00
/* Bit definitions for WATCHDOG */
#define PALMAS_WATCHDOG_LOCK 0x20
-#define PALMAS_WATCHDOG_LOCK_SHIFT 5
+#define PALMAS_WATCHDOG_LOCK_SHIFT 0x05
#define PALMAS_WATCHDOG_ENABLE 0x10
-#define PALMAS_WATCHDOG_ENABLE_SHIFT 4
+#define PALMAS_WATCHDOG_ENABLE_SHIFT 0x04
#define PALMAS_WATCHDOG_MODE 0x08
-#define PALMAS_WATCHDOG_MODE_SHIFT 3
+#define PALMAS_WATCHDOG_MODE_SHIFT 0x03
#define PALMAS_WATCHDOG_TIMER_MASK 0x07
-#define PALMAS_WATCHDOG_TIMER_SHIFT 0
+#define PALMAS_WATCHDOG_TIMER_SHIFT 0x00
/* Bit definitions for BOOT_STATUS */
#define PALMAS_BOOT_STATUS_BOOT1 0x02
-#define PALMAS_BOOT_STATUS_BOOT1_SHIFT 1
+#define PALMAS_BOOT_STATUS_BOOT1_SHIFT 0x01
#define PALMAS_BOOT_STATUS_BOOT0 0x01
-#define PALMAS_BOOT_STATUS_BOOT0_SHIFT 0
+#define PALMAS_BOOT_STATUS_BOOT0_SHIFT 0x00
/* Bit definitions for BATTERY_BOUNCE */
-#define PALMAS_BATTERY_BOUNCE_BB_DELAY_MASK 0x3f
-#define PALMAS_BATTERY_BOUNCE_BB_DELAY_SHIFT 0
+#define PALMAS_BATTERY_BOUNCE_BB_DELAY_MASK 0x3F
+#define PALMAS_BATTERY_BOUNCE_BB_DELAY_SHIFT 0x00
/* Bit definitions for BACKUP_BATTERY_CTRL */
#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_18_15 0x80
-#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_18_15_SHIFT 7
+#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_18_15_SHIFT 0x07
#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_EN_SLP 0x40
-#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_EN_SLP_SHIFT 6
+#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_EN_SLP_SHIFT 0x06
#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_EN_OFF 0x20
-#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_EN_OFF_SHIFT 5
+#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_EN_OFF_SHIFT 0x05
#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_PWEN 0x10
-#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_PWEN_SHIFT 4
+#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_PWEN_SHIFT 0x04
#define PALMAS_BACKUP_BATTERY_CTRL_BBS_BBC_LOW_ICHRG 0x08
-#define PALMAS_BACKUP_BATTERY_CTRL_BBS_BBC_LOW_ICHRG_SHIFT 3
+#define PALMAS_BACKUP_BATTERY_CTRL_BBS_BBC_LOW_ICHRG_SHIFT 0x03
#define PALMAS_BACKUP_BATTERY_CTRL_BB_SEL_MASK 0x06
-#define PALMAS_BACKUP_BATTERY_CTRL_BB_SEL_SHIFT 1
+#define PALMAS_BACKUP_BATTERY_CTRL_BB_SEL_SHIFT 0x01
#define PALMAS_BACKUP_BATTERY_CTRL_BB_CHG_EN 0x01
-#define PALMAS_BACKUP_BATTERY_CTRL_BB_CHG_EN_SHIFT 0
+#define PALMAS_BACKUP_BATTERY_CTRL_BB_CHG_EN_SHIFT 0x00
/* Bit definitions for LONG_PRESS_KEY */
#define PALMAS_LONG_PRESS_KEY_LPK_LOCK 0x80
-#define PALMAS_LONG_PRESS_KEY_LPK_LOCK_SHIFT 7
+#define PALMAS_LONG_PRESS_KEY_LPK_LOCK_SHIFT 0x07
#define PALMAS_LONG_PRESS_KEY_LPK_INT_CLR 0x10
-#define PALMAS_LONG_PRESS_KEY_LPK_INT_CLR_SHIFT 4
+#define PALMAS_LONG_PRESS_KEY_LPK_INT_CLR_SHIFT 0x04
#define PALMAS_LONG_PRESS_KEY_LPK_TIME_MASK 0x0c
-#define PALMAS_LONG_PRESS_KEY_LPK_TIME_SHIFT 2
+#define PALMAS_LONG_PRESS_KEY_LPK_TIME_SHIFT 0x02
#define PALMAS_LONG_PRESS_KEY_PWRON_DEBOUNCE_MASK 0x03
-#define PALMAS_LONG_PRESS_KEY_PWRON_DEBOUNCE_SHIFT 0
+#define PALMAS_LONG_PRESS_KEY_PWRON_DEBOUNCE_SHIFT 0x00
/* Bit definitions for OSC_THERM_CTRL */
#define PALMAS_OSC_THERM_CTRL_VANA_ON_IN_SLEEP 0x80
-#define PALMAS_OSC_THERM_CTRL_VANA_ON_IN_SLEEP_SHIFT 7
+#define PALMAS_OSC_THERM_CTRL_VANA_ON_IN_SLEEP_SHIFT 0x07
#define PALMAS_OSC_THERM_CTRL_INT_MASK_IN_SLEEP 0x40
-#define PALMAS_OSC_THERM_CTRL_INT_MASK_IN_SLEEP_SHIFT 6
+#define PALMAS_OSC_THERM_CTRL_INT_MASK_IN_SLEEP_SHIFT 0x06
#define PALMAS_OSC_THERM_CTRL_RC15MHZ_ON_IN_SLEEP 0x20
-#define PALMAS_OSC_THERM_CTRL_RC15MHZ_ON_IN_SLEEP_SHIFT 5
+#define PALMAS_OSC_THERM_CTRL_RC15MHZ_ON_IN_SLEEP_SHIFT 0x05
#define PALMAS_OSC_THERM_CTRL_THERM_OFF_IN_SLEEP 0x10
-#define PALMAS_OSC_THERM_CTRL_THERM_OFF_IN_SLEEP_SHIFT 4
+#define PALMAS_OSC_THERM_CTRL_THERM_OFF_IN_SLEEP_SHIFT 0x04
#define PALMAS_OSC_THERM_CTRL_THERM_HD_SEL_MASK 0x0c
-#define PALMAS_OSC_THERM_CTRL_THERM_HD_SEL_SHIFT 2
+#define PALMAS_OSC_THERM_CTRL_THERM_HD_SEL_SHIFT 0x02
#define PALMAS_OSC_THERM_CTRL_OSC_BYPASS 0x02
-#define PALMAS_OSC_THERM_CTRL_OSC_BYPASS_SHIFT 1
+#define PALMAS_OSC_THERM_CTRL_OSC_BYPASS_SHIFT 0x01
#define PALMAS_OSC_THERM_CTRL_OSC_HPMODE 0x01
-#define PALMAS_OSC_THERM_CTRL_OSC_HPMODE_SHIFT 0
+#define PALMAS_OSC_THERM_CTRL_OSC_HPMODE_SHIFT 0x00
/* Bit definitions for BATDEBOUNCING */
#define PALMAS_BATDEBOUNCING_BAT_DEB_BYPASS 0x80
-#define PALMAS_BATDEBOUNCING_BAT_DEB_BYPASS_SHIFT 7
+#define PALMAS_BATDEBOUNCING_BAT_DEB_BYPASS_SHIFT 0x07
#define PALMAS_BATDEBOUNCING_BINS_DEB_MASK 0x78
-#define PALMAS_BATDEBOUNCING_BINS_DEB_SHIFT 3
+#define PALMAS_BATDEBOUNCING_BINS_DEB_SHIFT 0x03
#define PALMAS_BATDEBOUNCING_BEXT_DEB_MASK 0x07
-#define PALMAS_BATDEBOUNCING_BEXT_DEB_SHIFT 0
+#define PALMAS_BATDEBOUNCING_BEXT_DEB_SHIFT 0x00
/* Bit definitions for SWOFF_HWRST */
#define PALMAS_SWOFF_HWRST_PWRON_LPK 0x80
-#define PALMAS_SWOFF_HWRST_PWRON_LPK_SHIFT 7
+#define PALMAS_SWOFF_HWRST_PWRON_LPK_SHIFT 0x07
#define PALMAS_SWOFF_HWRST_PWRDOWN 0x40
-#define PALMAS_SWOFF_HWRST_PWRDOWN_SHIFT 6
+#define PALMAS_SWOFF_HWRST_PWRDOWN_SHIFT 0x06
#define PALMAS_SWOFF_HWRST_WTD 0x20
-#define PALMAS_SWOFF_HWRST_WTD_SHIFT 5
+#define PALMAS_SWOFF_HWRST_WTD_SHIFT 0x05
#define PALMAS_SWOFF_HWRST_TSHUT 0x10
-#define PALMAS_SWOFF_HWRST_TSHUT_SHIFT 4
+#define PALMAS_SWOFF_HWRST_TSHUT_SHIFT 0x04
#define PALMAS_SWOFF_HWRST_RESET_IN 0x08
-#define PALMAS_SWOFF_HWRST_RESET_IN_SHIFT 3
+#define PALMAS_SWOFF_HWRST_RESET_IN_SHIFT 0x03
#define PALMAS_SWOFF_HWRST_SW_RST 0x04
-#define PALMAS_SWOFF_HWRST_SW_RST_SHIFT 2
+#define PALMAS_SWOFF_HWRST_SW_RST_SHIFT 0x02
#define PALMAS_SWOFF_HWRST_VSYS_LO 0x02
-#define PALMAS_SWOFF_HWRST_VSYS_LO_SHIFT 1
+#define PALMAS_SWOFF_HWRST_VSYS_LO_SHIFT 0x01
#define PALMAS_SWOFF_HWRST_GPADC_SHUTDOWN 0x01
-#define PALMAS_SWOFF_HWRST_GPADC_SHUTDOWN_SHIFT 0
+#define PALMAS_SWOFF_HWRST_GPADC_SHUTDOWN_SHIFT 0x00
/* Bit definitions for SWOFF_COLDRST */
#define PALMAS_SWOFF_COLDRST_PWRON_LPK 0x80
-#define PALMAS_SWOFF_COLDRST_PWRON_LPK_SHIFT 7
+#define PALMAS_SWOFF_COLDRST_PWRON_LPK_SHIFT 0x07
#define PALMAS_SWOFF_COLDRST_PWRDOWN 0x40
-#define PALMAS_SWOFF_COLDRST_PWRDOWN_SHIFT 6
+#define PALMAS_SWOFF_COLDRST_PWRDOWN_SHIFT 0x06
#define PALMAS_SWOFF_COLDRST_WTD 0x20
-#define PALMAS_SWOFF_COLDRST_WTD_SHIFT 5
+#define PALMAS_SWOFF_COLDRST_WTD_SHIFT 0x05
#define PALMAS_SWOFF_COLDRST_TSHUT 0x10
-#define PALMAS_SWOFF_COLDRST_TSHUT_SHIFT 4
+#define PALMAS_SWOFF_COLDRST_TSHUT_SHIFT 0x04
#define PALMAS_SWOFF_COLDRST_RESET_IN 0x08
-#define PALMAS_SWOFF_COLDRST_RESET_IN_SHIFT 3
+#define PALMAS_SWOFF_COLDRST_RESET_IN_SHIFT 0x03
#define PALMAS_SWOFF_COLDRST_SW_RST 0x04
-#define PALMAS_SWOFF_COLDRST_SW_RST_SHIFT 2
+#define PALMAS_SWOFF_COLDRST_SW_RST_SHIFT 0x02
#define PALMAS_SWOFF_COLDRST_VSYS_LO 0x02
-#define PALMAS_SWOFF_COLDRST_VSYS_LO_SHIFT 1
+#define PALMAS_SWOFF_COLDRST_VSYS_LO_SHIFT 0x01
#define PALMAS_SWOFF_COLDRST_GPADC_SHUTDOWN 0x01
-#define PALMAS_SWOFF_COLDRST_GPADC_SHUTDOWN_SHIFT 0
+#define PALMAS_SWOFF_COLDRST_GPADC_SHUTDOWN_SHIFT 0x00
/* Bit definitions for SWOFF_STATUS */
#define PALMAS_SWOFF_STATUS_PWRON_LPK 0x80
-#define PALMAS_SWOFF_STATUS_PWRON_LPK_SHIFT 7
+#define PALMAS_SWOFF_STATUS_PWRON_LPK_SHIFT 0x07
#define PALMAS_SWOFF_STATUS_PWRDOWN 0x40
-#define PALMAS_SWOFF_STATUS_PWRDOWN_SHIFT 6
+#define PALMAS_SWOFF_STATUS_PWRDOWN_SHIFT 0x06
#define PALMAS_SWOFF_STATUS_WTD 0x20
-#define PALMAS_SWOFF_STATUS_WTD_SHIFT 5
+#define PALMAS_SWOFF_STATUS_WTD_SHIFT 0x05
#define PALMAS_SWOFF_STATUS_TSHUT 0x10
-#define PALMAS_SWOFF_STATUS_TSHUT_SHIFT 4
+#define PALMAS_SWOFF_STATUS_TSHUT_SHIFT 0x04
#define PALMAS_SWOFF_STATUS_RESET_IN 0x08
-#define PALMAS_SWOFF_STATUS_RESET_IN_SHIFT 3
+#define PALMAS_SWOFF_STATUS_RESET_IN_SHIFT 0x03
#define PALMAS_SWOFF_STATUS_SW_RST 0x04
-#define PALMAS_SWOFF_STATUS_SW_RST_SHIFT 2
+#define PALMAS_SWOFF_STATUS_SW_RST_SHIFT 0x02
#define PALMAS_SWOFF_STATUS_VSYS_LO 0x02
-#define PALMAS_SWOFF_STATUS_VSYS_LO_SHIFT 1
+#define PALMAS_SWOFF_STATUS_VSYS_LO_SHIFT 0x01
#define PALMAS_SWOFF_STATUS_GPADC_SHUTDOWN 0x01
-#define PALMAS_SWOFF_STATUS_GPADC_SHUTDOWN_SHIFT 0
+#define PALMAS_SWOFF_STATUS_GPADC_SHUTDOWN_SHIFT 0x00
/* Bit definitions for PMU_CONFIG */
#define PALMAS_PMU_CONFIG_MULTI_CELL_EN 0x40
-#define PALMAS_PMU_CONFIG_MULTI_CELL_EN_SHIFT 6
+#define PALMAS_PMU_CONFIG_MULTI_CELL_EN_SHIFT 0x06
#define PALMAS_PMU_CONFIG_SPARE_MASK 0x30
-#define PALMAS_PMU_CONFIG_SPARE_SHIFT 4
+#define PALMAS_PMU_CONFIG_SPARE_SHIFT 0x04
#define PALMAS_PMU_CONFIG_SWOFF_DLY_MASK 0x0c
-#define PALMAS_PMU_CONFIG_SWOFF_DLY_SHIFT 2
+#define PALMAS_PMU_CONFIG_SWOFF_DLY_SHIFT 0x02
#define PALMAS_PMU_CONFIG_GATE_RESET_OUT 0x02
-#define PALMAS_PMU_CONFIG_GATE_RESET_OUT_SHIFT 1
+#define PALMAS_PMU_CONFIG_GATE_RESET_OUT_SHIFT 0x01
#define PALMAS_PMU_CONFIG_AUTODEVON 0x01
-#define PALMAS_PMU_CONFIG_AUTODEVON_SHIFT 0
+#define PALMAS_PMU_CONFIG_AUTODEVON_SHIFT 0x00
/* Bit definitions for SPARE */
#define PALMAS_SPARE_SPARE_MASK 0xf8
-#define PALMAS_SPARE_SPARE_SHIFT 3
+#define PALMAS_SPARE_SPARE_SHIFT 0x03
#define PALMAS_SPARE_REGEN3_OD 0x04
-#define PALMAS_SPARE_REGEN3_OD_SHIFT 2
+#define PALMAS_SPARE_REGEN3_OD_SHIFT 0x02
#define PALMAS_SPARE_REGEN2_OD 0x02
-#define PALMAS_SPARE_REGEN2_OD_SHIFT 1
+#define PALMAS_SPARE_REGEN2_OD_SHIFT 0x01
#define PALMAS_SPARE_REGEN1_OD 0x01
-#define PALMAS_SPARE_REGEN1_OD_SHIFT 0
+#define PALMAS_SPARE_REGEN1_OD_SHIFT 0x00
/* Bit definitions for PMU_SECONDARY_INT */
#define PALMAS_PMU_SECONDARY_INT_VBUS_OVV_INT_SRC 0x80
-#define PALMAS_PMU_SECONDARY_INT_VBUS_OVV_INT_SRC_SHIFT 7
+#define PALMAS_PMU_SECONDARY_INT_VBUS_OVV_INT_SRC_SHIFT 0x07
#define PALMAS_PMU_SECONDARY_INT_CHARG_DET_N_INT_SRC 0x40
-#define PALMAS_PMU_SECONDARY_INT_CHARG_DET_N_INT_SRC_SHIFT 6
+#define PALMAS_PMU_SECONDARY_INT_CHARG_DET_N_INT_SRC_SHIFT 0x06
#define PALMAS_PMU_SECONDARY_INT_BB_INT_SRC 0x20
-#define PALMAS_PMU_SECONDARY_INT_BB_INT_SRC_SHIFT 5
+#define PALMAS_PMU_SECONDARY_INT_BB_INT_SRC_SHIFT 0x05
#define PALMAS_PMU_SECONDARY_INT_FBI_INT_SRC 0x10
-#define PALMAS_PMU_SECONDARY_INT_FBI_INT_SRC_SHIFT 4
+#define PALMAS_PMU_SECONDARY_INT_FBI_INT_SRC_SHIFT 0x04
#define PALMAS_PMU_SECONDARY_INT_VBUS_OVV_MASK 0x08
-#define PALMAS_PMU_SECONDARY_INT_VBUS_OVV_MASK_SHIFT 3
+#define PALMAS_PMU_SECONDARY_INT_VBUS_OVV_MASK_SHIFT 0x03
#define PALMAS_PMU_SECONDARY_INT_CHARG_DET_N_MASK 0x04
-#define PALMAS_PMU_SECONDARY_INT_CHARG_DET_N_MASK_SHIFT 2
+#define PALMAS_PMU_SECONDARY_INT_CHARG_DET_N_MASK_SHIFT 0x02
#define PALMAS_PMU_SECONDARY_INT_BB_MASK 0x02
-#define PALMAS_PMU_SECONDARY_INT_BB_MASK_SHIFT 1
+#define PALMAS_PMU_SECONDARY_INT_BB_MASK_SHIFT 0x01
#define PALMAS_PMU_SECONDARY_INT_FBI_MASK 0x01
-#define PALMAS_PMU_SECONDARY_INT_FBI_MASK_SHIFT 0
+#define PALMAS_PMU_SECONDARY_INT_FBI_MASK_SHIFT 0x00
/* Bit definitions for SW_REVISION */
-#define PALMAS_SW_REVISION_SW_REVISION_MASK 0xff
-#define PALMAS_SW_REVISION_SW_REVISION_SHIFT 0
+#define PALMAS_SW_REVISION_SW_REVISION_MASK 0xFF
+#define PALMAS_SW_REVISION_SW_REVISION_SHIFT 0x00
/* Bit definitions for EXT_CHRG_CTRL */
#define PALMAS_EXT_CHRG_CTRL_VBUS_OVV_STATUS 0x80
-#define PALMAS_EXT_CHRG_CTRL_VBUS_OVV_STATUS_SHIFT 7
+#define PALMAS_EXT_CHRG_CTRL_VBUS_OVV_STATUS_SHIFT 0x07
#define PALMAS_EXT_CHRG_CTRL_CHARG_DET_N_STATUS 0x40
-#define PALMAS_EXT_CHRG_CTRL_CHARG_DET_N_STATUS_SHIFT 6
+#define PALMAS_EXT_CHRG_CTRL_CHARG_DET_N_STATUS_SHIFT 0x06
#define PALMAS_EXT_CHRG_CTRL_VSYS_DEBOUNCE_DELAY 0x08
-#define PALMAS_EXT_CHRG_CTRL_VSYS_DEBOUNCE_DELAY_SHIFT 3
+#define PALMAS_EXT_CHRG_CTRL_VSYS_DEBOUNCE_DELAY_SHIFT 0x03
#define PALMAS_EXT_CHRG_CTRL_CHRG_DET_N 0x04
-#define PALMAS_EXT_CHRG_CTRL_CHRG_DET_N_SHIFT 2
+#define PALMAS_EXT_CHRG_CTRL_CHRG_DET_N_SHIFT 0x02
#define PALMAS_EXT_CHRG_CTRL_AUTO_ACA_EN 0x02
-#define PALMAS_EXT_CHRG_CTRL_AUTO_ACA_EN_SHIFT 1
+#define PALMAS_EXT_CHRG_CTRL_AUTO_ACA_EN_SHIFT 0x01
#define PALMAS_EXT_CHRG_CTRL_AUTO_LDOUSB_EN 0x01
-#define PALMAS_EXT_CHRG_CTRL_AUTO_LDOUSB_EN_SHIFT 0
+#define PALMAS_EXT_CHRG_CTRL_AUTO_LDOUSB_EN_SHIFT 0x00
/* Bit definitions for PMU_SECONDARY_INT2 */
#define PALMAS_PMU_SECONDARY_INT2_DVFS2_INT_SRC 0x20
-#define PALMAS_PMU_SECONDARY_INT2_DVFS2_INT_SRC_SHIFT 5
+#define PALMAS_PMU_SECONDARY_INT2_DVFS2_INT_SRC_SHIFT 0x05
#define PALMAS_PMU_SECONDARY_INT2_DVFS1_INT_SRC 0x10
-#define PALMAS_PMU_SECONDARY_INT2_DVFS1_INT_SRC_SHIFT 4
+#define PALMAS_PMU_SECONDARY_INT2_DVFS1_INT_SRC_SHIFT 0x04
#define PALMAS_PMU_SECONDARY_INT2_DVFS2_MASK 0x02
-#define PALMAS_PMU_SECONDARY_INT2_DVFS2_MASK_SHIFT 1
+#define PALMAS_PMU_SECONDARY_INT2_DVFS2_MASK_SHIFT 0x01
#define PALMAS_PMU_SECONDARY_INT2_DVFS1_MASK 0x01
-#define PALMAS_PMU_SECONDARY_INT2_DVFS1_MASK_SHIFT 0
+#define PALMAS_PMU_SECONDARY_INT2_DVFS1_MASK_SHIFT 0x00
/* Registers for function RESOURCE */
-#define PALMAS_CLK32KG_CTRL 0x0
-#define PALMAS_CLK32KGAUDIO_CTRL 0x1
-#define PALMAS_REGEN1_CTRL 0x2
-#define PALMAS_REGEN2_CTRL 0x3
-#define PALMAS_SYSEN1_CTRL 0x4
-#define PALMAS_SYSEN2_CTRL 0x5
-#define PALMAS_NSLEEP_RES_ASSIGN 0x6
-#define PALMAS_NSLEEP_SMPS_ASSIGN 0x7
-#define PALMAS_NSLEEP_LDO_ASSIGN1 0x8
-#define PALMAS_NSLEEP_LDO_ASSIGN2 0x9
-#define PALMAS_ENABLE1_RES_ASSIGN 0xA
-#define PALMAS_ENABLE1_SMPS_ASSIGN 0xB
-#define PALMAS_ENABLE1_LDO_ASSIGN1 0xC
-#define PALMAS_ENABLE1_LDO_ASSIGN2 0xD
-#define PALMAS_ENABLE2_RES_ASSIGN 0xE
-#define PALMAS_ENABLE2_SMPS_ASSIGN 0xF
+#define PALMAS_CLK32KG_CTRL 0x00
+#define PALMAS_CLK32KGAUDIO_CTRL 0x01
+#define PALMAS_REGEN1_CTRL 0x02
+#define PALMAS_REGEN2_CTRL 0x03
+#define PALMAS_SYSEN1_CTRL 0x04
+#define PALMAS_SYSEN2_CTRL 0x05
+#define PALMAS_NSLEEP_RES_ASSIGN 0x06
+#define PALMAS_NSLEEP_SMPS_ASSIGN 0x07
+#define PALMAS_NSLEEP_LDO_ASSIGN1 0x08
+#define PALMAS_NSLEEP_LDO_ASSIGN2 0x09
+#define PALMAS_ENABLE1_RES_ASSIGN 0x0A
+#define PALMAS_ENABLE1_SMPS_ASSIGN 0x0B
+#define PALMAS_ENABLE1_LDO_ASSIGN1 0x0C
+#define PALMAS_ENABLE1_LDO_ASSIGN2 0x0D
+#define PALMAS_ENABLE2_RES_ASSIGN 0x0E
+#define PALMAS_ENABLE2_SMPS_ASSIGN 0x0F
#define PALMAS_ENABLE2_LDO_ASSIGN1 0x10
#define PALMAS_ENABLE2_LDO_ASSIGN2 0x11
#define PALMAS_REGEN3_CTRL 0x12
/* Bit definitions for CLK32KG_CTRL */
#define PALMAS_CLK32KG_CTRL_STATUS 0x10
-#define PALMAS_CLK32KG_CTRL_STATUS_SHIFT 4
+#define PALMAS_CLK32KG_CTRL_STATUS_SHIFT 0x04
#define PALMAS_CLK32KG_CTRL_MODE_SLEEP 0x04
-#define PALMAS_CLK32KG_CTRL_MODE_SLEEP_SHIFT 2
+#define PALMAS_CLK32KG_CTRL_MODE_SLEEP_SHIFT 0x02
#define PALMAS_CLK32KG_CTRL_MODE_ACTIVE 0x01
-#define PALMAS_CLK32KG_CTRL_MODE_ACTIVE_SHIFT 0
+#define PALMAS_CLK32KG_CTRL_MODE_ACTIVE_SHIFT 0x00
/* Bit definitions for CLK32KGAUDIO_CTRL */
#define PALMAS_CLK32KGAUDIO_CTRL_STATUS 0x10
-#define PALMAS_CLK32KGAUDIO_CTRL_STATUS_SHIFT 4
+#define PALMAS_CLK32KGAUDIO_CTRL_STATUS_SHIFT 0x04
#define PALMAS_CLK32KGAUDIO_CTRL_RESERVED3 0x08
-#define PALMAS_CLK32KGAUDIO_CTRL_RESERVED3_SHIFT 3
+#define PALMAS_CLK32KGAUDIO_CTRL_RESERVED3_SHIFT 0x03
#define PALMAS_CLK32KGAUDIO_CTRL_MODE_SLEEP 0x04
-#define PALMAS_CLK32KGAUDIO_CTRL_MODE_SLEEP_SHIFT 2
+#define PALMAS_CLK32KGAUDIO_CTRL_MODE_SLEEP_SHIFT 0x02
#define PALMAS_CLK32KGAUDIO_CTRL_MODE_ACTIVE 0x01
-#define PALMAS_CLK32KGAUDIO_CTRL_MODE_ACTIVE_SHIFT 0
+#define PALMAS_CLK32KGAUDIO_CTRL_MODE_ACTIVE_SHIFT 0x00
/* Bit definitions for REGEN1_CTRL */
#define PALMAS_REGEN1_CTRL_STATUS 0x10
-#define PALMAS_REGEN1_CTRL_STATUS_SHIFT 4
+#define PALMAS_REGEN1_CTRL_STATUS_SHIFT 0x04
#define PALMAS_REGEN1_CTRL_MODE_SLEEP 0x04
-#define PALMAS_REGEN1_CTRL_MODE_SLEEP_SHIFT 2
+#define PALMAS_REGEN1_CTRL_MODE_SLEEP_SHIFT 0x02
#define PALMAS_REGEN1_CTRL_MODE_ACTIVE 0x01
-#define PALMAS_REGEN1_CTRL_MODE_ACTIVE_SHIFT 0
+#define PALMAS_REGEN1_CTRL_MODE_ACTIVE_SHIFT 0x00
/* Bit definitions for REGEN2_CTRL */
#define PALMAS_REGEN2_CTRL_STATUS 0x10
-#define PALMAS_REGEN2_CTRL_STATUS_SHIFT 4
+#define PALMAS_REGEN2_CTRL_STATUS_SHIFT 0x04
#define PALMAS_REGEN2_CTRL_MODE_SLEEP 0x04
-#define PALMAS_REGEN2_CTRL_MODE_SLEEP_SHIFT 2
+#define PALMAS_REGEN2_CTRL_MODE_SLEEP_SHIFT 0x02
#define PALMAS_REGEN2_CTRL_MODE_ACTIVE 0x01
-#define PALMAS_REGEN2_CTRL_MODE_ACTIVE_SHIFT 0
+#define PALMAS_REGEN2_CTRL_MODE_ACTIVE_SHIFT 0x00
/* Bit definitions for SYSEN1_CTRL */
#define PALMAS_SYSEN1_CTRL_STATUS 0x10
-#define PALMAS_SYSEN1_CTRL_STATUS_SHIFT 4
+#define PALMAS_SYSEN1_CTRL_STATUS_SHIFT 0x04
#define PALMAS_SYSEN1_CTRL_MODE_SLEEP 0x04
-#define PALMAS_SYSEN1_CTRL_MODE_SLEEP_SHIFT 2
+#define PALMAS_SYSEN1_CTRL_MODE_SLEEP_SHIFT 0x02
#define PALMAS_SYSEN1_CTRL_MODE_ACTIVE 0x01
-#define PALMAS_SYSEN1_CTRL_MODE_ACTIVE_SHIFT 0
+#define PALMAS_SYSEN1_CTRL_MODE_ACTIVE_SHIFT 0x00
/* Bit definitions for SYSEN2_CTRL */
#define PALMAS_SYSEN2_CTRL_STATUS 0x10
-#define PALMAS_SYSEN2_CTRL_STATUS_SHIFT 4
+#define PALMAS_SYSEN2_CTRL_STATUS_SHIFT 0x04
#define PALMAS_SYSEN2_CTRL_MODE_SLEEP 0x04
-#define PALMAS_SYSEN2_CTRL_MODE_SLEEP_SHIFT 2
+#define PALMAS_SYSEN2_CTRL_MODE_SLEEP_SHIFT 0x02
#define PALMAS_SYSEN2_CTRL_MODE_ACTIVE 0x01
-#define PALMAS_SYSEN2_CTRL_MODE_ACTIVE_SHIFT 0
+#define PALMAS_SYSEN2_CTRL_MODE_ACTIVE_SHIFT 0x00
/* Bit definitions for NSLEEP_RES_ASSIGN */
#define PALMAS_NSLEEP_RES_ASSIGN_REGEN3 0x40
-#define PALMAS_NSLEEP_RES_ASSIGN_REGEN3_SHIFT 6
+#define PALMAS_NSLEEP_RES_ASSIGN_REGEN3_SHIFT 0x06
#define PALMAS_NSLEEP_RES_ASSIGN_CLK32KGAUDIO 0x20
-#define PALMAS_NSLEEP_RES_ASSIGN_CLK32KGAUDIO_SHIFT 5
+#define PALMAS_NSLEEP_RES_ASSIGN_CLK32KGAUDIO_SHIFT 0x05
#define PALMAS_NSLEEP_RES_ASSIGN_CLK32KG 0x10
-#define PALMAS_NSLEEP_RES_ASSIGN_CLK32KG_SHIFT 4
+#define PALMAS_NSLEEP_RES_ASSIGN_CLK32KG_SHIFT 0x04
#define PALMAS_NSLEEP_RES_ASSIGN_SYSEN2 0x08
-#define PALMAS_NSLEEP_RES_ASSIGN_SYSEN2_SHIFT 3
+#define PALMAS_NSLEEP_RES_ASSIGN_SYSEN2_SHIFT 0x03
#define PALMAS_NSLEEP_RES_ASSIGN_SYSEN1 0x04
-#define PALMAS_NSLEEP_RES_ASSIGN_SYSEN1_SHIFT 2
+#define PALMAS_NSLEEP_RES_ASSIGN_SYSEN1_SHIFT 0x02
#define PALMAS_NSLEEP_RES_ASSIGN_REGEN2 0x02
-#define PALMAS_NSLEEP_RES_ASSIGN_REGEN2_SHIFT 1
+#define PALMAS_NSLEEP_RES_ASSIGN_REGEN2_SHIFT 0x01
#define PALMAS_NSLEEP_RES_ASSIGN_REGEN1 0x01
-#define PALMAS_NSLEEP_RES_ASSIGN_REGEN1_SHIFT 0
+#define PALMAS_NSLEEP_RES_ASSIGN_REGEN1_SHIFT 0x00
/* Bit definitions for NSLEEP_SMPS_ASSIGN */
#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS10 0x80
-#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS10_SHIFT 7
+#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS10_SHIFT 0x07
#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS9 0x40
-#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS9_SHIFT 6
+#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS9_SHIFT 0x06
#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS8 0x20
-#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS8_SHIFT 5
+#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS8_SHIFT 0x05
#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS7 0x10
-#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS7_SHIFT 4
+#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS7_SHIFT 0x04
#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS6 0x08
-#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS6_SHIFT 3
+#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS6_SHIFT 0x03
#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS45 0x04
-#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS45_SHIFT 2
+#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS45_SHIFT 0x02
#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS3 0x02
-#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS3_SHIFT 1
+#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS3_SHIFT 0x01
#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS12 0x01
-#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS12_SHIFT 0
+#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS12_SHIFT 0x00
/* Bit definitions for NSLEEP_LDO_ASSIGN1 */
#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO8 0x80
-#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO8_SHIFT 7
+#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO8_SHIFT 0x07
#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO7 0x40
-#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO7_SHIFT 6
+#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO7_SHIFT 0x06
#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO6 0x20
-#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO6_SHIFT 5
+#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO6_SHIFT 0x05
#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO5 0x10
-#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO5_SHIFT 4
+#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO5_SHIFT 0x04
#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO4 0x08
-#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO4_SHIFT 3
+#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO4_SHIFT 0x03
#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO3 0x04
-#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO3_SHIFT 2
+#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO3_SHIFT 0x02
#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO2 0x02
-#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO2_SHIFT 1
+#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO2_SHIFT 0x01
#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO1 0x01
-#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO1_SHIFT 0
+#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO1_SHIFT 0x00
/* Bit definitions for NSLEEP_LDO_ASSIGN2 */
#define PALMAS_NSLEEP_LDO_ASSIGN2_LDOUSB 0x04
-#define PALMAS_NSLEEP_LDO_ASSIGN2_LDOUSB_SHIFT 2
+#define PALMAS_NSLEEP_LDO_ASSIGN2_LDOUSB_SHIFT 0x02
#define PALMAS_NSLEEP_LDO_ASSIGN2_LDOLN 0x02
-#define PALMAS_NSLEEP_LDO_ASSIGN2_LDOLN_SHIFT 1
+#define PALMAS_NSLEEP_LDO_ASSIGN2_LDOLN_SHIFT 0x01
#define PALMAS_NSLEEP_LDO_ASSIGN2_LDO9 0x01
-#define PALMAS_NSLEEP_LDO_ASSIGN2_LDO9_SHIFT 0
+#define PALMAS_NSLEEP_LDO_ASSIGN2_LDO9_SHIFT 0x00
/* Bit definitions for ENABLE1_RES_ASSIGN */
#define PALMAS_ENABLE1_RES_ASSIGN_REGEN3 0x40
-#define PALMAS_ENABLE1_RES_ASSIGN_REGEN3_SHIFT 6
+#define PALMAS_ENABLE1_RES_ASSIGN_REGEN3_SHIFT 0x06
#define PALMAS_ENABLE1_RES_ASSIGN_CLK32KGAUDIO 0x20
-#define PALMAS_ENABLE1_RES_ASSIGN_CLK32KGAUDIO_SHIFT 5
+#define PALMAS_ENABLE1_RES_ASSIGN_CLK32KGAUDIO_SHIFT 0x05
#define PALMAS_ENABLE1_RES_ASSIGN_CLK32KG 0x10
-#define PALMAS_ENABLE1_RES_ASSIGN_CLK32KG_SHIFT 4
+#define PALMAS_ENABLE1_RES_ASSIGN_CLK32KG_SHIFT 0x04
#define PALMAS_ENABLE1_RES_ASSIGN_SYSEN2 0x08
-#define PALMAS_ENABLE1_RES_ASSIGN_SYSEN2_SHIFT 3
+#define PALMAS_ENABLE1_RES_ASSIGN_SYSEN2_SHIFT 0x03
#define PALMAS_ENABLE1_RES_ASSIGN_SYSEN1 0x04
-#define PALMAS_ENABLE1_RES_ASSIGN_SYSEN1_SHIFT 2
+#define PALMAS_ENABLE1_RES_ASSIGN_SYSEN1_SHIFT 0x02
#define PALMAS_ENABLE1_RES_ASSIGN_REGEN2 0x02
-#define PALMAS_ENABLE1_RES_ASSIGN_REGEN2_SHIFT 1
+#define PALMAS_ENABLE1_RES_ASSIGN_REGEN2_SHIFT 0x01
#define PALMAS_ENABLE1_RES_ASSIGN_REGEN1 0x01
-#define PALMAS_ENABLE1_RES_ASSIGN_REGEN1_SHIFT 0
+#define PALMAS_ENABLE1_RES_ASSIGN_REGEN1_SHIFT 0x00
/* Bit definitions for ENABLE1_SMPS_ASSIGN */
#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS10 0x80
-#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS10_SHIFT 7
+#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS10_SHIFT 0x07
#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS9 0x40
-#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS9_SHIFT 6
+#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS9_SHIFT 0x06
#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS8 0x20
-#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS8_SHIFT 5
+#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS8_SHIFT 0x05
#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS7 0x10
-#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS7_SHIFT 4
+#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS7_SHIFT 0x04
#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS6 0x08
-#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS6_SHIFT 3
+#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS6_SHIFT 0x03
#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS45 0x04
-#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS45_SHIFT 2
+#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS45_SHIFT 0x02
#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS3 0x02
-#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS3_SHIFT 1
+#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS3_SHIFT 0x01
#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS12 0x01
-#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS12_SHIFT 0
+#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS12_SHIFT 0x00
/* Bit definitions for ENABLE1_LDO_ASSIGN1 */
#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO8 0x80
-#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO8_SHIFT 7
+#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO8_SHIFT 0x07
#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO7 0x40
-#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO7_SHIFT 6
+#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO7_SHIFT 0x06
#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO6 0x20
-#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO6_SHIFT 5
+#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO6_SHIFT 0x05
#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO5 0x10
-#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO5_SHIFT 4
+#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO5_SHIFT 0x04
#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO4 0x08
-#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO4_SHIFT 3
+#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO4_SHIFT 0x03
#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO3 0x04
-#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO3_SHIFT 2
+#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO3_SHIFT 0x02
#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO2 0x02
-#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO2_SHIFT 1
+#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO2_SHIFT 0x01
#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO1 0x01
-#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO1_SHIFT 0
+#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO1_SHIFT 0x00
/* Bit definitions for ENABLE1_LDO_ASSIGN2 */
#define PALMAS_ENABLE1_LDO_ASSIGN2_LDOUSB 0x04
-#define PALMAS_ENABLE1_LDO_ASSIGN2_LDOUSB_SHIFT 2
+#define PALMAS_ENABLE1_LDO_ASSIGN2_LDOUSB_SHIFT 0x02
#define PALMAS_ENABLE1_LDO_ASSIGN2_LDOLN 0x02
-#define PALMAS_ENABLE1_LDO_ASSIGN2_LDOLN_SHIFT 1
+#define PALMAS_ENABLE1_LDO_ASSIGN2_LDOLN_SHIFT 0x01
#define PALMAS_ENABLE1_LDO_ASSIGN2_LDO9 0x01
-#define PALMAS_ENABLE1_LDO_ASSIGN2_LDO9_SHIFT 0
+#define PALMAS_ENABLE1_LDO_ASSIGN2_LDO9_SHIFT 0x00
/* Bit definitions for ENABLE2_RES_ASSIGN */
#define PALMAS_ENABLE2_RES_ASSIGN_REGEN3 0x40
-#define PALMAS_ENABLE2_RES_ASSIGN_REGEN3_SHIFT 6
+#define PALMAS_ENABLE2_RES_ASSIGN_REGEN3_SHIFT 0x06
#define PALMAS_ENABLE2_RES_ASSIGN_CLK32KGAUDIO 0x20
-#define PALMAS_ENABLE2_RES_ASSIGN_CLK32KGAUDIO_SHIFT 5
+#define PALMAS_ENABLE2_RES_ASSIGN_CLK32KGAUDIO_SHIFT 0x05
#define PALMAS_ENABLE2_RES_ASSIGN_CLK32KG 0x10
-#define PALMAS_ENABLE2_RES_ASSIGN_CLK32KG_SHIFT 4
+#define PALMAS_ENABLE2_RES_ASSIGN_CLK32KG_SHIFT 0x04
#define PALMAS_ENABLE2_RES_ASSIGN_SYSEN2 0x08
-#define PALMAS_ENABLE2_RES_ASSIGN_SYSEN2_SHIFT 3
+#define PALMAS_ENABLE2_RES_ASSIGN_SYSEN2_SHIFT 0x03
#define PALMAS_ENABLE2_RES_ASSIGN_SYSEN1 0x04
-#define PALMAS_ENABLE2_RES_ASSIGN_SYSEN1_SHIFT 2
+#define PALMAS_ENABLE2_RES_ASSIGN_SYSEN1_SHIFT 0x02
#define PALMAS_ENABLE2_RES_ASSIGN_REGEN2 0x02
-#define PALMAS_ENABLE2_RES_ASSIGN_REGEN2_SHIFT 1
+#define PALMAS_ENABLE2_RES_ASSIGN_REGEN2_SHIFT 0x01
#define PALMAS_ENABLE2_RES_ASSIGN_REGEN1 0x01
-#define PALMAS_ENABLE2_RES_ASSIGN_REGEN1_SHIFT 0
+#define PALMAS_ENABLE2_RES_ASSIGN_REGEN1_SHIFT 0x00
/* Bit definitions for ENABLE2_SMPS_ASSIGN */
#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS10 0x80
-#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS10_SHIFT 7
+#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS10_SHIFT 0x07
#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS9 0x40
-#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS9_SHIFT 6
+#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS9_SHIFT 0x06
#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS8 0x20
-#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS8_SHIFT 5
+#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS8_SHIFT 0x05
#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS7 0x10
-#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS7_SHIFT 4
+#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS7_SHIFT 0x04
#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS6 0x08
-#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS6_SHIFT 3
+#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS6_SHIFT 0x03
#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS45 0x04
-#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS45_SHIFT 2
+#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS45_SHIFT 0x02
#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS3 0x02
-#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS3_SHIFT 1
+#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS3_SHIFT 0x01
#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS12 0x01
-#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS12_SHIFT 0
+#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS12_SHIFT 0x00
/* Bit definitions for ENABLE2_LDO_ASSIGN1 */
#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO8 0x80
-#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO8_SHIFT 7
+#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO8_SHIFT 0x07
#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO7 0x40
-#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO7_SHIFT 6
+#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO7_SHIFT 0x06
#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO6 0x20
-#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO6_SHIFT 5
+#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO6_SHIFT 0x05
#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO5 0x10
-#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO5_SHIFT 4
+#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO5_SHIFT 0x04
#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO4 0x08
-#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO4_SHIFT 3
+#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO4_SHIFT 0x03
#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO3 0x04
-#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO3_SHIFT 2
+#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO3_SHIFT 0x02
#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO2 0x02
-#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO2_SHIFT 1
+#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO2_SHIFT 0x01
#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO1 0x01
-#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO1_SHIFT 0
+#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO1_SHIFT 0x00
/* Bit definitions for ENABLE2_LDO_ASSIGN2 */
#define PALMAS_ENABLE2_LDO_ASSIGN2_LDOUSB 0x04
-#define PALMAS_ENABLE2_LDO_ASSIGN2_LDOUSB_SHIFT 2
+#define PALMAS_ENABLE2_LDO_ASSIGN2_LDOUSB_SHIFT 0x02
#define PALMAS_ENABLE2_LDO_ASSIGN2_LDOLN 0x02
-#define PALMAS_ENABLE2_LDO_ASSIGN2_LDOLN_SHIFT 1
+#define PALMAS_ENABLE2_LDO_ASSIGN2_LDOLN_SHIFT 0x01
#define PALMAS_ENABLE2_LDO_ASSIGN2_LDO9 0x01
-#define PALMAS_ENABLE2_LDO_ASSIGN2_LDO9_SHIFT 0
+#define PALMAS_ENABLE2_LDO_ASSIGN2_LDO9_SHIFT 0x00
/* Bit definitions for REGEN3_CTRL */
#define PALMAS_REGEN3_CTRL_STATUS 0x10
-#define PALMAS_REGEN3_CTRL_STATUS_SHIFT 4
+#define PALMAS_REGEN3_CTRL_STATUS_SHIFT 0x04
#define PALMAS_REGEN3_CTRL_MODE_SLEEP 0x04
-#define PALMAS_REGEN3_CTRL_MODE_SLEEP_SHIFT 2
+#define PALMAS_REGEN3_CTRL_MODE_SLEEP_SHIFT 0x02
#define PALMAS_REGEN3_CTRL_MODE_ACTIVE 0x01
-#define PALMAS_REGEN3_CTRL_MODE_ACTIVE_SHIFT 0
+#define PALMAS_REGEN3_CTRL_MODE_ACTIVE_SHIFT 0x00
/* Registers for function PAD_CONTROL */
-#define PALMAS_OD_OUTPUT_CTRL2 0x2
-#define PALMAS_POLARITY_CTRL2 0x3
-#define PALMAS_PU_PD_INPUT_CTRL1 0x4
-#define PALMAS_PU_PD_INPUT_CTRL2 0x5
-#define PALMAS_PU_PD_INPUT_CTRL3 0x6
-#define PALMAS_PU_PD_INPUT_CTRL5 0x7
-#define PALMAS_OD_OUTPUT_CTRL 0x8
-#define PALMAS_POLARITY_CTRL 0x9
-#define PALMAS_PRIMARY_SECONDARY_PAD1 0xA
-#define PALMAS_PRIMARY_SECONDARY_PAD2 0xB
-#define PALMAS_I2C_SPI 0xC
-#define PALMAS_PU_PD_INPUT_CTRL4 0xD
-#define PALMAS_PRIMARY_SECONDARY_PAD3 0xE
-#define PALMAS_PRIMARY_SECONDARY_PAD4 0xF
+#define PALMAS_OD_OUTPUT_CTRL2 0x02
+#define PALMAS_POLARITY_CTRL2 0x03
+#define PALMAS_PU_PD_INPUT_CTRL1 0x04
+#define PALMAS_PU_PD_INPUT_CTRL2 0x05
+#define PALMAS_PU_PD_INPUT_CTRL3 0x06
+#define PALMAS_PU_PD_INPUT_CTRL5 0x07
+#define PALMAS_OD_OUTPUT_CTRL 0x08
+#define PALMAS_POLARITY_CTRL 0x09
+#define PALMAS_PRIMARY_SECONDARY_PAD1 0x0A
+#define PALMAS_PRIMARY_SECONDARY_PAD2 0x0B
+#define PALMAS_I2C_SPI 0x0C
+#define PALMAS_PU_PD_INPUT_CTRL4 0x0D
+#define PALMAS_PRIMARY_SECONDARY_PAD3 0x0E
+#define PALMAS_PRIMARY_SECONDARY_PAD4 0x0F
/* Bit definitions for PU_PD_INPUT_CTRL1 */
#define PALMAS_PU_PD_INPUT_CTRL1_RESET_IN_PD 0x40
-#define PALMAS_PU_PD_INPUT_CTRL1_RESET_IN_PD_SHIFT 6
+#define PALMAS_PU_PD_INPUT_CTRL1_RESET_IN_PD_SHIFT 0x06
#define PALMAS_PU_PD_INPUT_CTRL1_GPADC_START_PU 0x20
-#define PALMAS_PU_PD_INPUT_CTRL1_GPADC_START_PU_SHIFT 5
+#define PALMAS_PU_PD_INPUT_CTRL1_GPADC_START_PU_SHIFT 0x05
#define PALMAS_PU_PD_INPUT_CTRL1_GPADC_START_PD 0x10
-#define PALMAS_PU_PD_INPUT_CTRL1_GPADC_START_PD_SHIFT 4
+#define PALMAS_PU_PD_INPUT_CTRL1_GPADC_START_PD_SHIFT 0x04
#define PALMAS_PU_PD_INPUT_CTRL1_PWRDOWN_PD 0x04
-#define PALMAS_PU_PD_INPUT_CTRL1_PWRDOWN_PD_SHIFT 2
+#define PALMAS_PU_PD_INPUT_CTRL1_PWRDOWN_PD_SHIFT 0x02
#define PALMAS_PU_PD_INPUT_CTRL1_NRESWARM_PU 0x02
-#define PALMAS_PU_PD_INPUT_CTRL1_NRESWARM_PU_SHIFT 1
+#define PALMAS_PU_PD_INPUT_CTRL1_NRESWARM_PU_SHIFT 0x01
/* Bit definitions for PU_PD_INPUT_CTRL2 */
#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE2_PU 0x20
-#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE2_PU_SHIFT 5
+#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE2_PU_SHIFT 0x05
#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE2_PD 0x10
-#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE2_PD_SHIFT 4
+#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE2_PD_SHIFT 0x04
#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE1_PU 0x08
-#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE1_PU_SHIFT 3
+#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE1_PU_SHIFT 0x03
#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE1_PD 0x04
-#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE1_PD_SHIFT 2
+#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE1_PD_SHIFT 0x02
#define PALMAS_PU_PD_INPUT_CTRL2_NSLEEP_PU 0x02
-#define PALMAS_PU_PD_INPUT_CTRL2_NSLEEP_PU_SHIFT 1
+#define PALMAS_PU_PD_INPUT_CTRL2_NSLEEP_PU_SHIFT 0x01
#define PALMAS_PU_PD_INPUT_CTRL2_NSLEEP_PD 0x01
-#define PALMAS_PU_PD_INPUT_CTRL2_NSLEEP_PD_SHIFT 0
+#define PALMAS_PU_PD_INPUT_CTRL2_NSLEEP_PD_SHIFT 0x00
/* Bit definitions for PU_PD_INPUT_CTRL3 */
#define PALMAS_PU_PD_INPUT_CTRL3_ACOK_PD 0x40
-#define PALMAS_PU_PD_INPUT_CTRL3_ACOK_PD_SHIFT 6
+#define PALMAS_PU_PD_INPUT_CTRL3_ACOK_PD_SHIFT 0x06
#define PALMAS_PU_PD_INPUT_CTRL3_CHRG_DET_N_PD 0x10
-#define PALMAS_PU_PD_INPUT_CTRL3_CHRG_DET_N_PD_SHIFT 4
+#define PALMAS_PU_PD_INPUT_CTRL3_CHRG_DET_N_PD_SHIFT 0x04
#define PALMAS_PU_PD_INPUT_CTRL3_POWERHOLD_PD 0x04
-#define PALMAS_PU_PD_INPUT_CTRL3_POWERHOLD_PD_SHIFT 2
+#define PALMAS_PU_PD_INPUT_CTRL3_POWERHOLD_PD_SHIFT 0x02
#define PALMAS_PU_PD_INPUT_CTRL3_MSECURE_PD 0x01
-#define PALMAS_PU_PD_INPUT_CTRL3_MSECURE_PD_SHIFT 0
+#define PALMAS_PU_PD_INPUT_CTRL3_MSECURE_PD_SHIFT 0x00
/* Bit definitions for OD_OUTPUT_CTRL */
#define PALMAS_OD_OUTPUT_CTRL_PWM_2_OD 0x80
-#define PALMAS_OD_OUTPUT_CTRL_PWM_2_OD_SHIFT 7
+#define PALMAS_OD_OUTPUT_CTRL_PWM_2_OD_SHIFT 0x07
#define PALMAS_OD_OUTPUT_CTRL_VBUSDET_OD 0x40
-#define PALMAS_OD_OUTPUT_CTRL_VBUSDET_OD_SHIFT 6
+#define PALMAS_OD_OUTPUT_CTRL_VBUSDET_OD_SHIFT 0x06
#define PALMAS_OD_OUTPUT_CTRL_PWM_1_OD 0x20
-#define PALMAS_OD_OUTPUT_CTRL_PWM_1_OD_SHIFT 5
+#define PALMAS_OD_OUTPUT_CTRL_PWM_1_OD_SHIFT 0x05
#define PALMAS_OD_OUTPUT_CTRL_INT_OD 0x08
-#define PALMAS_OD_OUTPUT_CTRL_INT_OD_SHIFT 3
+#define PALMAS_OD_OUTPUT_CTRL_INT_OD_SHIFT 0x03
/* Bit definitions for POLARITY_CTRL */
#define PALMAS_POLARITY_CTRL_INT_POLARITY 0x80
-#define PALMAS_POLARITY_CTRL_INT_POLARITY_SHIFT 7
+#define PALMAS_POLARITY_CTRL_INT_POLARITY_SHIFT 0x07
#define PALMAS_POLARITY_CTRL_ENABLE2_POLARITY 0x40
-#define PALMAS_POLARITY_CTRL_ENABLE2_POLARITY_SHIFT 6
+#define PALMAS_POLARITY_CTRL_ENABLE2_POLARITY_SHIFT 0x06
#define PALMAS_POLARITY_CTRL_ENABLE1_POLARITY 0x20
-#define PALMAS_POLARITY_CTRL_ENABLE1_POLARITY_SHIFT 5
+#define PALMAS_POLARITY_CTRL_ENABLE1_POLARITY_SHIFT 0x05
#define PALMAS_POLARITY_CTRL_NSLEEP_POLARITY 0x10
-#define PALMAS_POLARITY_CTRL_NSLEEP_POLARITY_SHIFT 4
+#define PALMAS_POLARITY_CTRL_NSLEEP_POLARITY_SHIFT 0x04
#define PALMAS_POLARITY_CTRL_RESET_IN_POLARITY 0x08
-#define PALMAS_POLARITY_CTRL_RESET_IN_POLARITY_SHIFT 3
+#define PALMAS_POLARITY_CTRL_RESET_IN_POLARITY_SHIFT 0x03
#define PALMAS_POLARITY_CTRL_GPIO_3_CHRG_DET_N_POLARITY 0x04
-#define PALMAS_POLARITY_CTRL_GPIO_3_CHRG_DET_N_POLARITY_SHIFT 2
+#define PALMAS_POLARITY_CTRL_GPIO_3_CHRG_DET_N_POLARITY_SHIFT 0x02
#define PALMAS_POLARITY_CTRL_POWERGOOD_USB_PSEL_POLARITY 0x02
-#define PALMAS_POLARITY_CTRL_POWERGOOD_USB_PSEL_POLARITY_SHIFT 1
+#define PALMAS_POLARITY_CTRL_POWERGOOD_USB_PSEL_POLARITY_SHIFT 0x01
#define PALMAS_POLARITY_CTRL_PWRDOWN_POLARITY 0x01
-#define PALMAS_POLARITY_CTRL_PWRDOWN_POLARITY_SHIFT 0
+#define PALMAS_POLARITY_CTRL_PWRDOWN_POLARITY_SHIFT 0x00
/* Bit definitions for PRIMARY_SECONDARY_PAD1 */
#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_3 0x80
-#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_3_SHIFT 7
+#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_3_SHIFT 0x07
#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK 0x60
-#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_SHIFT 5
+#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_SHIFT 0x05
#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK 0x18
-#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_SHIFT 3
+#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_SHIFT 0x03
#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_0 0x04
-#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_0_SHIFT 2
+#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_0_SHIFT 0x02
#define PALMAS_PRIMARY_SECONDARY_PAD1_VAC 0x02
-#define PALMAS_PRIMARY_SECONDARY_PAD1_VAC_SHIFT 1
+#define PALMAS_PRIMARY_SECONDARY_PAD1_VAC_SHIFT 0x01
#define PALMAS_PRIMARY_SECONDARY_PAD1_POWERGOOD 0x01
-#define PALMAS_PRIMARY_SECONDARY_PAD1_POWERGOOD_SHIFT 0
+#define PALMAS_PRIMARY_SECONDARY_PAD1_POWERGOOD_SHIFT 0x00
/* Bit definitions for PRIMARY_SECONDARY_PAD2 */
#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_7_MASK 0x30
-#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_7_SHIFT 4
+#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_7_SHIFT 0x04
#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_6 0x08
-#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_6_SHIFT 3
+#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_6_SHIFT 0x03
#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_5_MASK 0x06
-#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_5_SHIFT 1
+#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_5_SHIFT 0x01
#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_4 0x01
-#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_4_SHIFT 0
+#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_4_SHIFT 0x00
/* Bit definitions for I2C_SPI */
#define PALMAS_I2C_SPI_I2C2OTP_EN 0x80
-#define PALMAS_I2C_SPI_I2C2OTP_EN_SHIFT 7
+#define PALMAS_I2C_SPI_I2C2OTP_EN_SHIFT 0x07
#define PALMAS_I2C_SPI_I2C2OTP_PAGESEL 0x40
-#define PALMAS_I2C_SPI_I2C2OTP_PAGESEL_SHIFT 6
+#define PALMAS_I2C_SPI_I2C2OTP_PAGESEL_SHIFT 0x06
#define PALMAS_I2C_SPI_ID_I2C2 0x20
-#define PALMAS_I2C_SPI_ID_I2C2_SHIFT 5
+#define PALMAS_I2C_SPI_ID_I2C2_SHIFT 0x05
#define PALMAS_I2C_SPI_I2C_SPI 0x10
-#define PALMAS_I2C_SPI_I2C_SPI_SHIFT 4
-#define PALMAS_I2C_SPI_ID_I2C1_MASK 0x0f
-#define PALMAS_I2C_SPI_ID_I2C1_SHIFT 0
+#define PALMAS_I2C_SPI_I2C_SPI_SHIFT 0x04
+#define PALMAS_I2C_SPI_ID_I2C1_MASK 0x0F
+#define PALMAS_I2C_SPI_ID_I2C1_SHIFT 0x00
/* Bit definitions for PU_PD_INPUT_CTRL4 */
#define PALMAS_PU_PD_INPUT_CTRL4_DVFS2_DAT_PD 0x40
-#define PALMAS_PU_PD_INPUT_CTRL4_DVFS2_DAT_PD_SHIFT 6
+#define PALMAS_PU_PD_INPUT_CTRL4_DVFS2_DAT_PD_SHIFT 0x06
#define PALMAS_PU_PD_INPUT_CTRL4_DVFS2_CLK_PD 0x10
-#define PALMAS_PU_PD_INPUT_CTRL4_DVFS2_CLK_PD_SHIFT 4
+#define PALMAS_PU_PD_INPUT_CTRL4_DVFS2_CLK_PD_SHIFT 0x04
#define PALMAS_PU_PD_INPUT_CTRL4_DVFS1_DAT_PD 0x04
-#define PALMAS_PU_PD_INPUT_CTRL4_DVFS1_DAT_PD_SHIFT 2
+#define PALMAS_PU_PD_INPUT_CTRL4_DVFS1_DAT_PD_SHIFT 0x02
#define PALMAS_PU_PD_INPUT_CTRL4_DVFS1_CLK_PD 0x01
-#define PALMAS_PU_PD_INPUT_CTRL4_DVFS1_CLK_PD_SHIFT 0
+#define PALMAS_PU_PD_INPUT_CTRL4_DVFS1_CLK_PD_SHIFT 0x00
/* Bit definitions for PRIMARY_SECONDARY_PAD3 */
#define PALMAS_PRIMARY_SECONDARY_PAD3_DVFS2 0x02
-#define PALMAS_PRIMARY_SECONDARY_PAD3_DVFS2_SHIFT 1
+#define PALMAS_PRIMARY_SECONDARY_PAD3_DVFS2_SHIFT 0x01
#define PALMAS_PRIMARY_SECONDARY_PAD3_DVFS1 0x01
-#define PALMAS_PRIMARY_SECONDARY_PAD3_DVFS1_SHIFT 0
+#define PALMAS_PRIMARY_SECONDARY_PAD3_DVFS1_SHIFT 0x00
/* Registers for function LED_PWM */
-#define PALMAS_LED_PERIOD_CTRL 0x0
-#define PALMAS_LED_CTRL 0x1
-#define PALMAS_PWM_CTRL1 0x2
-#define PALMAS_PWM_CTRL2 0x3
+#define PALMAS_LED_PERIOD_CTRL 0x00
+#define PALMAS_LED_CTRL 0x01
+#define PALMAS_PWM_CTRL1 0x02
+#define PALMAS_PWM_CTRL2 0x03
/* Bit definitions for LED_PERIOD_CTRL */
#define PALMAS_LED_PERIOD_CTRL_LED_2_PERIOD_MASK 0x38
-#define PALMAS_LED_PERIOD_CTRL_LED_2_PERIOD_SHIFT 3
+#define PALMAS_LED_PERIOD_CTRL_LED_2_PERIOD_SHIFT 0x03
#define PALMAS_LED_PERIOD_CTRL_LED_1_PERIOD_MASK 0x07
-#define PALMAS_LED_PERIOD_CTRL_LED_1_PERIOD_SHIFT 0
+#define PALMAS_LED_PERIOD_CTRL_LED_1_PERIOD_SHIFT 0x00
/* Bit definitions for LED_CTRL */
#define PALMAS_LED_CTRL_LED_2_SEQ 0x20
-#define PALMAS_LED_CTRL_LED_2_SEQ_SHIFT 5
+#define PALMAS_LED_CTRL_LED_2_SEQ_SHIFT 0x05
#define PALMAS_LED_CTRL_LED_1_SEQ 0x10
-#define PALMAS_LED_CTRL_LED_1_SEQ_SHIFT 4
+#define PALMAS_LED_CTRL_LED_1_SEQ_SHIFT 0x04
#define PALMAS_LED_CTRL_LED_2_ON_TIME_MASK 0x0c
-#define PALMAS_LED_CTRL_LED_2_ON_TIME_SHIFT 2
+#define PALMAS_LED_CTRL_LED_2_ON_TIME_SHIFT 0x02
#define PALMAS_LED_CTRL_LED_1_ON_TIME_MASK 0x03
-#define PALMAS_LED_CTRL_LED_1_ON_TIME_SHIFT 0
+#define PALMAS_LED_CTRL_LED_1_ON_TIME_SHIFT 0x00
/* Bit definitions for PWM_CTRL1 */
#define PALMAS_PWM_CTRL1_PWM_FREQ_EN 0x02
-#define PALMAS_PWM_CTRL1_PWM_FREQ_EN_SHIFT 1
+#define PALMAS_PWM_CTRL1_PWM_FREQ_EN_SHIFT 0x01
#define PALMAS_PWM_CTRL1_PWM_FREQ_SEL 0x01
-#define PALMAS_PWM_CTRL1_PWM_FREQ_SEL_SHIFT 0
+#define PALMAS_PWM_CTRL1_PWM_FREQ_SEL_SHIFT 0x00
/* Bit definitions for PWM_CTRL2 */
-#define PALMAS_PWM_CTRL2_PWM_DUTY_SEL_MASK 0xff
-#define PALMAS_PWM_CTRL2_PWM_DUTY_SEL_SHIFT 0
+#define PALMAS_PWM_CTRL2_PWM_DUTY_SEL_MASK 0xFF
+#define PALMAS_PWM_CTRL2_PWM_DUTY_SEL_SHIFT 0x00
/* Registers for function INTERRUPT */
-#define PALMAS_INT1_STATUS 0x0
-#define PALMAS_INT1_MASK 0x1
-#define PALMAS_INT1_LINE_STATE 0x2
-#define PALMAS_INT1_EDGE_DETECT1_RESERVED 0x3
-#define PALMAS_INT1_EDGE_DETECT2_RESERVED 0x4
-#define PALMAS_INT2_STATUS 0x5
-#define PALMAS_INT2_MASK 0x6
-#define PALMAS_INT2_LINE_STATE 0x7
-#define PALMAS_INT2_EDGE_DETECT1_RESERVED 0x8
-#define PALMAS_INT2_EDGE_DETECT2_RESERVED 0x9
-#define PALMAS_INT3_STATUS 0xA
-#define PALMAS_INT3_MASK 0xB
-#define PALMAS_INT3_LINE_STATE 0xC
-#define PALMAS_INT3_EDGE_DETECT1_RESERVED 0xD
-#define PALMAS_INT3_EDGE_DETECT2_RESERVED 0xE
-#define PALMAS_INT4_STATUS 0xF
+#define PALMAS_INT1_STATUS 0x00
+#define PALMAS_INT1_MASK 0x01
+#define PALMAS_INT1_LINE_STATE 0x02
+#define PALMAS_INT1_EDGE_DETECT1_RESERVED 0x03
+#define PALMAS_INT1_EDGE_DETECT2_RESERVED 0x04
+#define PALMAS_INT2_STATUS 0x05
+#define PALMAS_INT2_MASK 0x06
+#define PALMAS_INT2_LINE_STATE 0x07
+#define PALMAS_INT2_EDGE_DETECT1_RESERVED 0x08
+#define PALMAS_INT2_EDGE_DETECT2_RESERVED 0x09
+#define PALMAS_INT3_STATUS 0x0A
+#define PALMAS_INT3_MASK 0x0B
+#define PALMAS_INT3_LINE_STATE 0x0C
+#define PALMAS_INT3_EDGE_DETECT1_RESERVED 0x0D
+#define PALMAS_INT3_EDGE_DETECT2_RESERVED 0x0E
+#define PALMAS_INT4_STATUS 0x0F
#define PALMAS_INT4_MASK 0x10
#define PALMAS_INT4_LINE_STATE 0x11
#define PALMAS_INT4_EDGE_DETECT1 0x12
@@ -1966,276 +1966,276 @@ enum usb_irq_events {
/* Bit definitions for INT1_STATUS */
#define PALMAS_INT1_STATUS_VBAT_MON 0x80
-#define PALMAS_INT1_STATUS_VBAT_MON_SHIFT 7
+#define PALMAS_INT1_STATUS_VBAT_MON_SHIFT 0x07
#define PALMAS_INT1_STATUS_VSYS_MON 0x40
-#define PALMAS_INT1_STATUS_VSYS_MON_SHIFT 6
+#define PALMAS_INT1_STATUS_VSYS_MON_SHIFT 0x06
#define PALMAS_INT1_STATUS_HOTDIE 0x20
-#define PALMAS_INT1_STATUS_HOTDIE_SHIFT 5
+#define PALMAS_INT1_STATUS_HOTDIE_SHIFT 0x05
#define PALMAS_INT1_STATUS_PWRDOWN 0x10
-#define PALMAS_INT1_STATUS_PWRDOWN_SHIFT 4
+#define PALMAS_INT1_STATUS_PWRDOWN_SHIFT 0x04
#define PALMAS_INT1_STATUS_RPWRON 0x08
-#define PALMAS_INT1_STATUS_RPWRON_SHIFT 3
+#define PALMAS_INT1_STATUS_RPWRON_SHIFT 0x03
#define PALMAS_INT1_STATUS_LONG_PRESS_KEY 0x04
-#define PALMAS_INT1_STATUS_LONG_PRESS_KEY_SHIFT 2
+#define PALMAS_INT1_STATUS_LONG_PRESS_KEY_SHIFT 0x02
#define PALMAS_INT1_STATUS_PWRON 0x02
-#define PALMAS_INT1_STATUS_PWRON_SHIFT 1
+#define PALMAS_INT1_STATUS_PWRON_SHIFT 0x01
#define PALMAS_INT1_STATUS_CHARG_DET_N_VBUS_OVV 0x01
-#define PALMAS_INT1_STATUS_CHARG_DET_N_VBUS_OVV_SHIFT 0
+#define PALMAS_INT1_STATUS_CHARG_DET_N_VBUS_OVV_SHIFT 0x00
/* Bit definitions for INT1_MASK */
#define PALMAS_INT1_MASK_VBAT_MON 0x80
-#define PALMAS_INT1_MASK_VBAT_MON_SHIFT 7
+#define PALMAS_INT1_MASK_VBAT_MON_SHIFT 0x07
#define PALMAS_INT1_MASK_VSYS_MON 0x40
-#define PALMAS_INT1_MASK_VSYS_MON_SHIFT 6
+#define PALMAS_INT1_MASK_VSYS_MON_SHIFT 0x06
#define PALMAS_INT1_MASK_HOTDIE 0x20
-#define PALMAS_INT1_MASK_HOTDIE_SHIFT 5
+#define PALMAS_INT1_MASK_HOTDIE_SHIFT 0x05
#define PALMAS_INT1_MASK_PWRDOWN 0x10
-#define PALMAS_INT1_MASK_PWRDOWN_SHIFT 4
+#define PALMAS_INT1_MASK_PWRDOWN_SHIFT 0x04
#define PALMAS_INT1_MASK_RPWRON 0x08
-#define PALMAS_INT1_MASK_RPWRON_SHIFT 3
+#define PALMAS_INT1_MASK_RPWRON_SHIFT 0x03
#define PALMAS_INT1_MASK_LONG_PRESS_KEY 0x04
-#define PALMAS_INT1_MASK_LONG_PRESS_KEY_SHIFT 2
+#define PALMAS_INT1_MASK_LONG_PRESS_KEY_SHIFT 0x02
#define PALMAS_INT1_MASK_PWRON 0x02
-#define PALMAS_INT1_MASK_PWRON_SHIFT 1
+#define PALMAS_INT1_MASK_PWRON_SHIFT 0x01
#define PALMAS_INT1_MASK_CHARG_DET_N_VBUS_OVV 0x01
-#define PALMAS_INT1_MASK_CHARG_DET_N_VBUS_OVV_SHIFT 0
+#define PALMAS_INT1_MASK_CHARG_DET_N_VBUS_OVV_SHIFT 0x00
/* Bit definitions for INT1_LINE_STATE */
#define PALMAS_INT1_LINE_STATE_VBAT_MON 0x80
-#define PALMAS_INT1_LINE_STATE_VBAT_MON_SHIFT 7
+#define PALMAS_INT1_LINE_STATE_VBAT_MON_SHIFT 0x07
#define PALMAS_INT1_LINE_STATE_VSYS_MON 0x40
-#define PALMAS_INT1_LINE_STATE_VSYS_MON_SHIFT 6
+#define PALMAS_INT1_LINE_STATE_VSYS_MON_SHIFT 0x06
#define PALMAS_INT1_LINE_STATE_HOTDIE 0x20
-#define PALMAS_INT1_LINE_STATE_HOTDIE_SHIFT 5
+#define PALMAS_INT1_LINE_STATE_HOTDIE_SHIFT 0x05
#define PALMAS_INT1_LINE_STATE_PWRDOWN 0x10
-#define PALMAS_INT1_LINE_STATE_PWRDOWN_SHIFT 4
+#define PALMAS_INT1_LINE_STATE_PWRDOWN_SHIFT 0x04
#define PALMAS_INT1_LINE_STATE_RPWRON 0x08
-#define PALMAS_INT1_LINE_STATE_RPWRON_SHIFT 3
+#define PALMAS_INT1_LINE_STATE_RPWRON_SHIFT 0x03
#define PALMAS_INT1_LINE_STATE_LONG_PRESS_KEY 0x04
-#define PALMAS_INT1_LINE_STATE_LONG_PRESS_KEY_SHIFT 2
+#define PALMAS_INT1_LINE_STATE_LONG_PRESS_KEY_SHIFT 0x02
#define PALMAS_INT1_LINE_STATE_PWRON 0x02
-#define PALMAS_INT1_LINE_STATE_PWRON_SHIFT 1
+#define PALMAS_INT1_LINE_STATE_PWRON_SHIFT 0x01
#define PALMAS_INT1_LINE_STATE_CHARG_DET_N_VBUS_OVV 0x01
-#define PALMAS_INT1_LINE_STATE_CHARG_DET_N_VBUS_OVV_SHIFT 0
+#define PALMAS_INT1_LINE_STATE_CHARG_DET_N_VBUS_OVV_SHIFT 0x00
/* Bit definitions for INT2_STATUS */
#define PALMAS_INT2_STATUS_VAC_ACOK 0x80
-#define PALMAS_INT2_STATUS_VAC_ACOK_SHIFT 7
+#define PALMAS_INT2_STATUS_VAC_ACOK_SHIFT 0x07
#define PALMAS_INT2_STATUS_SHORT 0x40
-#define PALMAS_INT2_STATUS_SHORT_SHIFT 6
+#define PALMAS_INT2_STATUS_SHORT_SHIFT 0x06
#define PALMAS_INT2_STATUS_FBI_BB 0x20
-#define PALMAS_INT2_STATUS_FBI_BB_SHIFT 5
+#define PALMAS_INT2_STATUS_FBI_BB_SHIFT 0x05
#define PALMAS_INT2_STATUS_RESET_IN 0x10
-#define PALMAS_INT2_STATUS_RESET_IN_SHIFT 4
+#define PALMAS_INT2_STATUS_RESET_IN_SHIFT 0x04
#define PALMAS_INT2_STATUS_BATREMOVAL 0x08
-#define PALMAS_INT2_STATUS_BATREMOVAL_SHIFT 3
+#define PALMAS_INT2_STATUS_BATREMOVAL_SHIFT 0x03
#define PALMAS_INT2_STATUS_WDT 0x04
-#define PALMAS_INT2_STATUS_WDT_SHIFT 2
+#define PALMAS_INT2_STATUS_WDT_SHIFT 0x02
#define PALMAS_INT2_STATUS_RTC_TIMER 0x02
-#define PALMAS_INT2_STATUS_RTC_TIMER_SHIFT 1
+#define PALMAS_INT2_STATUS_RTC_TIMER_SHIFT 0x01
#define PALMAS_INT2_STATUS_RTC_ALARM 0x01
-#define PALMAS_INT2_STATUS_RTC_ALARM_SHIFT 0
+#define PALMAS_INT2_STATUS_RTC_ALARM_SHIFT 0x00
/* Bit definitions for INT2_MASK */
#define PALMAS_INT2_MASK_VAC_ACOK 0x80
-#define PALMAS_INT2_MASK_VAC_ACOK_SHIFT 7
+#define PALMAS_INT2_MASK_VAC_ACOK_SHIFT 0x07
#define PALMAS_INT2_MASK_SHORT 0x40
-#define PALMAS_INT2_MASK_SHORT_SHIFT 6
+#define PALMAS_INT2_MASK_SHORT_SHIFT 0x06
#define PALMAS_INT2_MASK_FBI_BB 0x20
-#define PALMAS_INT2_MASK_FBI_BB_SHIFT 5
+#define PALMAS_INT2_MASK_FBI_BB_SHIFT 0x05
#define PALMAS_INT2_MASK_RESET_IN 0x10
-#define PALMAS_INT2_MASK_RESET_IN_SHIFT 4
+#define PALMAS_INT2_MASK_RESET_IN_SHIFT 0x04
#define PALMAS_INT2_MASK_BATREMOVAL 0x08
-#define PALMAS_INT2_MASK_BATREMOVAL_SHIFT 3
+#define PALMAS_INT2_MASK_BATREMOVAL_SHIFT 0x03
#define PALMAS_INT2_MASK_WDT 0x04
-#define PALMAS_INT2_MASK_WDT_SHIFT 2
+#define PALMAS_INT2_MASK_WDT_SHIFT 0x02
#define PALMAS_INT2_MASK_RTC_TIMER 0x02
-#define PALMAS_INT2_MASK_RTC_TIMER_SHIFT 1
+#define PALMAS_INT2_MASK_RTC_TIMER_SHIFT 0x01
#define PALMAS_INT2_MASK_RTC_ALARM 0x01
-#define PALMAS_INT2_MASK_RTC_ALARM_SHIFT 0
+#define PALMAS_INT2_MASK_RTC_ALARM_SHIFT 0x00
/* Bit definitions for INT2_LINE_STATE */
#define PALMAS_INT2_LINE_STATE_VAC_ACOK 0x80
-#define PALMAS_INT2_LINE_STATE_VAC_ACOK_SHIFT 7
+#define PALMAS_INT2_LINE_STATE_VAC_ACOK_SHIFT 0x07
#define PALMAS_INT2_LINE_STATE_SHORT 0x40
-#define PALMAS_INT2_LINE_STATE_SHORT_SHIFT 6
+#define PALMAS_INT2_LINE_STATE_SHORT_SHIFT 0x06
#define PALMAS_INT2_LINE_STATE_FBI_BB 0x20
-#define PALMAS_INT2_LINE_STATE_FBI_BB_SHIFT 5
+#define PALMAS_INT2_LINE_STATE_FBI_BB_SHIFT 0x05
#define PALMAS_INT2_LINE_STATE_RESET_IN 0x10
-#define PALMAS_INT2_LINE_STATE_RESET_IN_SHIFT 4
+#define PALMAS_INT2_LINE_STATE_RESET_IN_SHIFT 0x04
#define PALMAS_INT2_LINE_STATE_BATREMOVAL 0x08
-#define PALMAS_INT2_LINE_STATE_BATREMOVAL_SHIFT 3
+#define PALMAS_INT2_LINE_STATE_BATREMOVAL_SHIFT 0x03
#define PALMAS_INT2_LINE_STATE_WDT 0x04
-#define PALMAS_INT2_LINE_STATE_WDT_SHIFT 2
+#define PALMAS_INT2_LINE_STATE_WDT_SHIFT 0x02
#define PALMAS_INT2_LINE_STATE_RTC_TIMER 0x02
-#define PALMAS_INT2_LINE_STATE_RTC_TIMER_SHIFT 1
+#define PALMAS_INT2_LINE_STATE_RTC_TIMER_SHIFT 0x01
#define PALMAS_INT2_LINE_STATE_RTC_ALARM 0x01
-#define PALMAS_INT2_LINE_STATE_RTC_ALARM_SHIFT 0
+#define PALMAS_INT2_LINE_STATE_RTC_ALARM_SHIFT 0x00
/* Bit definitions for INT3_STATUS */
#define PALMAS_INT3_STATUS_VBUS 0x80
-#define PALMAS_INT3_STATUS_VBUS_SHIFT 7
+#define PALMAS_INT3_STATUS_VBUS_SHIFT 0x07
#define PALMAS_INT3_STATUS_VBUS_OTG 0x40
-#define PALMAS_INT3_STATUS_VBUS_OTG_SHIFT 6
+#define PALMAS_INT3_STATUS_VBUS_OTG_SHIFT 0x06
#define PALMAS_INT3_STATUS_ID 0x20
-#define PALMAS_INT3_STATUS_ID_SHIFT 5
+#define PALMAS_INT3_STATUS_ID_SHIFT 0x05
#define PALMAS_INT3_STATUS_ID_OTG 0x10
-#define PALMAS_INT3_STATUS_ID_OTG_SHIFT 4
+#define PALMAS_INT3_STATUS_ID_OTG_SHIFT 0x04
#define PALMAS_INT3_STATUS_GPADC_EOC_RT 0x08
-#define PALMAS_INT3_STATUS_GPADC_EOC_RT_SHIFT 3
+#define PALMAS_INT3_STATUS_GPADC_EOC_RT_SHIFT 0x03
#define PALMAS_INT3_STATUS_GPADC_EOC_SW 0x04
-#define PALMAS_INT3_STATUS_GPADC_EOC_SW_SHIFT 2
+#define PALMAS_INT3_STATUS_GPADC_EOC_SW_SHIFT 0x02
#define PALMAS_INT3_STATUS_GPADC_AUTO_1 0x02
-#define PALMAS_INT3_STATUS_GPADC_AUTO_1_SHIFT 1
+#define PALMAS_INT3_STATUS_GPADC_AUTO_1_SHIFT 0x01
#define PALMAS_INT3_STATUS_GPADC_AUTO_0 0x01
-#define PALMAS_INT3_STATUS_GPADC_AUTO_0_SHIFT 0
+#define PALMAS_INT3_STATUS_GPADC_AUTO_0_SHIFT 0x00
/* Bit definitions for INT3_MASK */
#define PALMAS_INT3_MASK_VBUS 0x80
-#define PALMAS_INT3_MASK_VBUS_SHIFT 7
+#define PALMAS_INT3_MASK_VBUS_SHIFT 0x07
#define PALMAS_INT3_MASK_VBUS_OTG 0x40
-#define PALMAS_INT3_MASK_VBUS_OTG_SHIFT 6
+#define PALMAS_INT3_MASK_VBUS_OTG_SHIFT 0x06
#define PALMAS_INT3_MASK_ID 0x20
-#define PALMAS_INT3_MASK_ID_SHIFT 5
+#define PALMAS_INT3_MASK_ID_SHIFT 0x05
#define PALMAS_INT3_MASK_ID_OTG 0x10
-#define PALMAS_INT3_MASK_ID_OTG_SHIFT 4
+#define PALMAS_INT3_MASK_ID_OTG_SHIFT 0x04
#define PALMAS_INT3_MASK_GPADC_EOC_RT 0x08
-#define PALMAS_INT3_MASK_GPADC_EOC_RT_SHIFT 3
+#define PALMAS_INT3_MASK_GPADC_EOC_RT_SHIFT 0x03
#define PALMAS_INT3_MASK_GPADC_EOC_SW 0x04
-#define PALMAS_INT3_MASK_GPADC_EOC_SW_SHIFT 2
+#define PALMAS_INT3_MASK_GPADC_EOC_SW_SHIFT 0x02
#define PALMAS_INT3_MASK_GPADC_AUTO_1 0x02
-#define PALMAS_INT3_MASK_GPADC_AUTO_1_SHIFT 1
+#define PALMAS_INT3_MASK_GPADC_AUTO_1_SHIFT 0x01
#define PALMAS_INT3_MASK_GPADC_AUTO_0 0x01
-#define PALMAS_INT3_MASK_GPADC_AUTO_0_SHIFT 0
+#define PALMAS_INT3_MASK_GPADC_AUTO_0_SHIFT 0x00
/* Bit definitions for INT3_LINE_STATE */
#define PALMAS_INT3_LINE_STATE_VBUS 0x80
-#define PALMAS_INT3_LINE_STATE_VBUS_SHIFT 7
+#define PALMAS_INT3_LINE_STATE_VBUS_SHIFT 0x07
#define PALMAS_INT3_LINE_STATE_VBUS_OTG 0x40
-#define PALMAS_INT3_LINE_STATE_VBUS_OTG_SHIFT 6
+#define PALMAS_INT3_LINE_STATE_VBUS_OTG_SHIFT 0x06
#define PALMAS_INT3_LINE_STATE_ID 0x20
-#define PALMAS_INT3_LINE_STATE_ID_SHIFT 5
+#define PALMAS_INT3_LINE_STATE_ID_SHIFT 0x05
#define PALMAS_INT3_LINE_STATE_ID_OTG 0x10
-#define PALMAS_INT3_LINE_STATE_ID_OTG_SHIFT 4
+#define PALMAS_INT3_LINE_STATE_ID_OTG_SHIFT 0x04
#define PALMAS_INT3_LINE_STATE_GPADC_EOC_RT 0x08
-#define PALMAS_INT3_LINE_STATE_GPADC_EOC_RT_SHIFT 3
+#define PALMAS_INT3_LINE_STATE_GPADC_EOC_RT_SHIFT 0x03
#define PALMAS_INT3_LINE_STATE_GPADC_EOC_SW 0x04
-#define PALMAS_INT3_LINE_STATE_GPADC_EOC_SW_SHIFT 2
+#define PALMAS_INT3_LINE_STATE_GPADC_EOC_SW_SHIFT 0x02
#define PALMAS_INT3_LINE_STATE_GPADC_AUTO_1 0x02
-#define PALMAS_INT3_LINE_STATE_GPADC_AUTO_1_SHIFT 1
+#define PALMAS_INT3_LINE_STATE_GPADC_AUTO_1_SHIFT 0x01
#define PALMAS_INT3_LINE_STATE_GPADC_AUTO_0 0x01
-#define PALMAS_INT3_LINE_STATE_GPADC_AUTO_0_SHIFT 0
+#define PALMAS_INT3_LINE_STATE_GPADC_AUTO_0_SHIFT 0x00
/* Bit definitions for INT4_STATUS */
#define PALMAS_INT4_STATUS_GPIO_7 0x80
-#define PALMAS_INT4_STATUS_GPIO_7_SHIFT 7
+#define PALMAS_INT4_STATUS_GPIO_7_SHIFT 0x07
#define PALMAS_INT4_STATUS_GPIO_6 0x40
-#define PALMAS_INT4_STATUS_GPIO_6_SHIFT 6
+#define PALMAS_INT4_STATUS_GPIO_6_SHIFT 0x06
#define PALMAS_INT4_STATUS_GPIO_5 0x20
-#define PALMAS_INT4_STATUS_GPIO_5_SHIFT 5
+#define PALMAS_INT4_STATUS_GPIO_5_SHIFT 0x05
#define PALMAS_INT4_STATUS_GPIO_4 0x10
-#define PALMAS_INT4_STATUS_GPIO_4_SHIFT 4
+#define PALMAS_INT4_STATUS_GPIO_4_SHIFT 0x04
#define PALMAS_INT4_STATUS_GPIO_3 0x08
-#define PALMAS_INT4_STATUS_GPIO_3_SHIFT 3
+#define PALMAS_INT4_STATUS_GPIO_3_SHIFT 0x03
#define PALMAS_INT4_STATUS_GPIO_2 0x04
-#define PALMAS_INT4_STATUS_GPIO_2_SHIFT 2
+#define PALMAS_INT4_STATUS_GPIO_2_SHIFT 0x02
#define PALMAS_INT4_STATUS_GPIO_1 0x02
-#define PALMAS_INT4_STATUS_GPIO_1_SHIFT 1
+#define PALMAS_INT4_STATUS_GPIO_1_SHIFT 0x01
#define PALMAS_INT4_STATUS_GPIO_0 0x01
-#define PALMAS_INT4_STATUS_GPIO_0_SHIFT 0
+#define PALMAS_INT4_STATUS_GPIO_0_SHIFT 0x00
/* Bit definitions for INT4_MASK */
#define PALMAS_INT4_MASK_GPIO_7 0x80
-#define PALMAS_INT4_MASK_GPIO_7_SHIFT 7
+#define PALMAS_INT4_MASK_GPIO_7_SHIFT 0x07
#define PALMAS_INT4_MASK_GPIO_6 0x40
-#define PALMAS_INT4_MASK_GPIO_6_SHIFT 6
+#define PALMAS_INT4_MASK_GPIO_6_SHIFT 0x06
#define PALMAS_INT4_MASK_GPIO_5 0x20
-#define PALMAS_INT4_MASK_GPIO_5_SHIFT 5
+#define PALMAS_INT4_MASK_GPIO_5_SHIFT 0x05
#define PALMAS_INT4_MASK_GPIO_4 0x10
-#define PALMAS_INT4_MASK_GPIO_4_SHIFT 4
+#define PALMAS_INT4_MASK_GPIO_4_SHIFT 0x04
#define PALMAS_INT4_MASK_GPIO_3 0x08
-#define PALMAS_INT4_MASK_GPIO_3_SHIFT 3
+#define PALMAS_INT4_MASK_GPIO_3_SHIFT 0x03
#define PALMAS_INT4_MASK_GPIO_2 0x04
-#define PALMAS_INT4_MASK_GPIO_2_SHIFT 2
+#define PALMAS_INT4_MASK_GPIO_2_SHIFT 0x02
#define PALMAS_INT4_MASK_GPIO_1 0x02
-#define PALMAS_INT4_MASK_GPIO_1_SHIFT 1
+#define PALMAS_INT4_MASK_GPIO_1_SHIFT 0x01
#define PALMAS_INT4_MASK_GPIO_0 0x01
-#define PALMAS_INT4_MASK_GPIO_0_SHIFT 0
+#define PALMAS_INT4_MASK_GPIO_0_SHIFT 0x00
/* Bit definitions for INT4_LINE_STATE */
#define PALMAS_INT4_LINE_STATE_GPIO_7 0x80
-#define PALMAS_INT4_LINE_STATE_GPIO_7_SHIFT 7
+#define PALMAS_INT4_LINE_STATE_GPIO_7_SHIFT 0x07
#define PALMAS_INT4_LINE_STATE_GPIO_6 0x40
-#define PALMAS_INT4_LINE_STATE_GPIO_6_SHIFT 6
+#define PALMAS_INT4_LINE_STATE_GPIO_6_SHIFT 0x06
#define PALMAS_INT4_LINE_STATE_GPIO_5 0x20
-#define PALMAS_INT4_LINE_STATE_GPIO_5_SHIFT 5
+#define PALMAS_INT4_LINE_STATE_GPIO_5_SHIFT 0x05
#define PALMAS_INT4_LINE_STATE_GPIO_4 0x10
-#define PALMAS_INT4_LINE_STATE_GPIO_4_SHIFT 4
+#define PALMAS_INT4_LINE_STATE_GPIO_4_SHIFT 0x04
#define PALMAS_INT4_LINE_STATE_GPIO_3 0x08
-#define PALMAS_INT4_LINE_STATE_GPIO_3_SHIFT 3
+#define PALMAS_INT4_LINE_STATE_GPIO_3_SHIFT 0x03
#define PALMAS_INT4_LINE_STATE_GPIO_2 0x04
-#define PALMAS_INT4_LINE_STATE_GPIO_2_SHIFT 2
+#define PALMAS_INT4_LINE_STATE_GPIO_2_SHIFT 0x02
#define PALMAS_INT4_LINE_STATE_GPIO_1 0x02
-#define PALMAS_INT4_LINE_STATE_GPIO_1_SHIFT 1
+#define PALMAS_INT4_LINE_STATE_GPIO_1_SHIFT 0x01
#define PALMAS_INT4_LINE_STATE_GPIO_0 0x01
-#define PALMAS_INT4_LINE_STATE_GPIO_0_SHIFT 0
+#define PALMAS_INT4_LINE_STATE_GPIO_0_SHIFT 0x00
/* Bit definitions for INT4_EDGE_DETECT1 */
#define PALMAS_INT4_EDGE_DETECT1_GPIO_3_RISING 0x80
-#define PALMAS_INT4_EDGE_DETECT1_GPIO_3_RISING_SHIFT 7
+#define PALMAS_INT4_EDGE_DETECT1_GPIO_3_RISING_SHIFT 0x07
#define PALMAS_INT4_EDGE_DETECT1_GPIO_3_FALLING 0x40
-#define PALMAS_INT4_EDGE_DETECT1_GPIO_3_FALLING_SHIFT 6
+#define PALMAS_INT4_EDGE_DETECT1_GPIO_3_FALLING_SHIFT 0x06
#define PALMAS_INT4_EDGE_DETECT1_GPIO_2_RISING 0x20
-#define PALMAS_INT4_EDGE_DETECT1_GPIO_2_RISING_SHIFT 5
+#define PALMAS_INT4_EDGE_DETECT1_GPIO_2_RISING_SHIFT 0x05
#define PALMAS_INT4_EDGE_DETECT1_GPIO_2_FALLING 0x10
-#define PALMAS_INT4_EDGE_DETECT1_GPIO_2_FALLING_SHIFT 4
+#define PALMAS_INT4_EDGE_DETECT1_GPIO_2_FALLING_SHIFT 0x04
#define PALMAS_INT4_EDGE_DETECT1_GPIO_1_RISING 0x08
-#define PALMAS_INT4_EDGE_DETECT1_GPIO_1_RISING_SHIFT 3
+#define PALMAS_INT4_EDGE_DETECT1_GPIO_1_RISING_SHIFT 0x03
#define PALMAS_INT4_EDGE_DETECT1_GPIO_1_FALLING 0x04
-#define PALMAS_INT4_EDGE_DETECT1_GPIO_1_FALLING_SHIFT 2
+#define PALMAS_INT4_EDGE_DETECT1_GPIO_1_FALLING_SHIFT 0x02
#define PALMAS_INT4_EDGE_DETECT1_GPIO_0_RISING 0x02
-#define PALMAS_INT4_EDGE_DETECT1_GPIO_0_RISING_SHIFT 1
+#define PALMAS_INT4_EDGE_DETECT1_GPIO_0_RISING_SHIFT 0x01
#define PALMAS_INT4_EDGE_DETECT1_GPIO_0_FALLING 0x01
-#define PALMAS_INT4_EDGE_DETECT1_GPIO_0_FALLING_SHIFT 0
+#define PALMAS_INT4_EDGE_DETECT1_GPIO_0_FALLING_SHIFT 0x00
/* Bit definitions for INT4_EDGE_DETECT2 */
#define PALMAS_INT4_EDGE_DETECT2_GPIO_7_RISING 0x80
-#define PALMAS_INT4_EDGE_DETECT2_GPIO_7_RISING_SHIFT 7
+#define PALMAS_INT4_EDGE_DETECT2_GPIO_7_RISING_SHIFT 0x07
#define PALMAS_INT4_EDGE_DETECT2_GPIO_7_FALLING 0x40
-#define PALMAS_INT4_EDGE_DETECT2_GPIO_7_FALLING_SHIFT 6
+#define PALMAS_INT4_EDGE_DETECT2_GPIO_7_FALLING_SHIFT 0x06
#define PALMAS_INT4_EDGE_DETECT2_GPIO_6_RISING 0x20
-#define PALMAS_INT4_EDGE_DETECT2_GPIO_6_RISING_SHIFT 5
+#define PALMAS_INT4_EDGE_DETECT2_GPIO_6_RISING_SHIFT 0x05
#define PALMAS_INT4_EDGE_DETECT2_GPIO_6_FALLING 0x10
-#define PALMAS_INT4_EDGE_DETECT2_GPIO_6_FALLING_SHIFT 4
+#define PALMAS_INT4_EDGE_DETECT2_GPIO_6_FALLING_SHIFT 0x04
#define PALMAS_INT4_EDGE_DETECT2_GPIO_5_RISING 0x08
-#define PALMAS_INT4_EDGE_DETECT2_GPIO_5_RISING_SHIFT 3
+#define PALMAS_INT4_EDGE_DETECT2_GPIO_5_RISING_SHIFT 0x03
#define PALMAS_INT4_EDGE_DETECT2_GPIO_5_FALLING 0x04
-#define PALMAS_INT4_EDGE_DETECT2_GPIO_5_FALLING_SHIFT 2
+#define PALMAS_INT4_EDGE_DETECT2_GPIO_5_FALLING_SHIFT 0x02
#define PALMAS_INT4_EDGE_DETECT2_GPIO_4_RISING 0x02
-#define PALMAS_INT4_EDGE_DETECT2_GPIO_4_RISING_SHIFT 1
+#define PALMAS_INT4_EDGE_DETECT2_GPIO_4_RISING_SHIFT 0x01
#define PALMAS_INT4_EDGE_DETECT2_GPIO_4_FALLING 0x01
-#define PALMAS_INT4_EDGE_DETECT2_GPIO_4_FALLING_SHIFT 0
+#define PALMAS_INT4_EDGE_DETECT2_GPIO_4_FALLING_SHIFT 0x00
/* Bit definitions for INT_CTRL */
#define PALMAS_INT_CTRL_INT_PENDING 0x04
-#define PALMAS_INT_CTRL_INT_PENDING_SHIFT 2
+#define PALMAS_INT_CTRL_INT_PENDING_SHIFT 0x02
#define PALMAS_INT_CTRL_INT_CLEAR 0x01
-#define PALMAS_INT_CTRL_INT_CLEAR_SHIFT 0
+#define PALMAS_INT_CTRL_INT_CLEAR_SHIFT 0x00
/* Registers for function USB_OTG */
-#define PALMAS_USB_WAKEUP 0x3
-#define PALMAS_USB_VBUS_CTRL_SET 0x4
-#define PALMAS_USB_VBUS_CTRL_CLR 0x5
-#define PALMAS_USB_ID_CTRL_SET 0x6
-#define PALMAS_USB_ID_CTRL_CLEAR 0x7
-#define PALMAS_USB_VBUS_INT_SRC 0x8
-#define PALMAS_USB_VBUS_INT_LATCH_SET 0x9
-#define PALMAS_USB_VBUS_INT_LATCH_CLR 0xA
-#define PALMAS_USB_VBUS_INT_EN_LO_SET 0xB
-#define PALMAS_USB_VBUS_INT_EN_LO_CLR 0xC
-#define PALMAS_USB_VBUS_INT_EN_HI_SET 0xD
-#define PALMAS_USB_VBUS_INT_EN_HI_CLR 0xE
-#define PALMAS_USB_ID_INT_SRC 0xF
+#define PALMAS_USB_WAKEUP 0x03
+#define PALMAS_USB_VBUS_CTRL_SET 0x04
+#define PALMAS_USB_VBUS_CTRL_CLR 0x05
+#define PALMAS_USB_ID_CTRL_SET 0x06
+#define PALMAS_USB_ID_CTRL_CLEAR 0x07
+#define PALMAS_USB_VBUS_INT_SRC 0x08
+#define PALMAS_USB_VBUS_INT_LATCH_SET 0x09
+#define PALMAS_USB_VBUS_INT_LATCH_CLR 0x0A
+#define PALMAS_USB_VBUS_INT_EN_LO_SET 0x0B
+#define PALMAS_USB_VBUS_INT_EN_LO_CLR 0x0C
+#define PALMAS_USB_VBUS_INT_EN_HI_SET 0x0D
+#define PALMAS_USB_VBUS_INT_EN_HI_CLR 0x0E
+#define PALMAS_USB_ID_INT_SRC 0x0F
#define PALMAS_USB_ID_INT_LATCH_SET 0x10
#define PALMAS_USB_ID_INT_LATCH_CLR 0x11
#define PALMAS_USB_ID_INT_EN_LO_SET 0x12
@@ -2250,306 +2250,306 @@ enum usb_irq_events {
/* Bit definitions for USB_WAKEUP */
#define PALMAS_USB_WAKEUP_ID_WK_UP_COMP 0x01
-#define PALMAS_USB_WAKEUP_ID_WK_UP_COMP_SHIFT 0
+#define PALMAS_USB_WAKEUP_ID_WK_UP_COMP_SHIFT 0x00
/* Bit definitions for USB_VBUS_CTRL_SET */
#define PALMAS_USB_VBUS_CTRL_SET_VBUS_CHRG_VSYS 0x80
-#define PALMAS_USB_VBUS_CTRL_SET_VBUS_CHRG_VSYS_SHIFT 7
+#define PALMAS_USB_VBUS_CTRL_SET_VBUS_CHRG_VSYS_SHIFT 0x07
#define PALMAS_USB_VBUS_CTRL_SET_VBUS_DISCHRG 0x20
-#define PALMAS_USB_VBUS_CTRL_SET_VBUS_DISCHRG_SHIFT 5
+#define PALMAS_USB_VBUS_CTRL_SET_VBUS_DISCHRG_SHIFT 0x05
#define PALMAS_USB_VBUS_CTRL_SET_VBUS_IADP_SRC 0x10
-#define PALMAS_USB_VBUS_CTRL_SET_VBUS_IADP_SRC_SHIFT 4
+#define PALMAS_USB_VBUS_CTRL_SET_VBUS_IADP_SRC_SHIFT 0x04
#define PALMAS_USB_VBUS_CTRL_SET_VBUS_IADP_SINK 0x08
-#define PALMAS_USB_VBUS_CTRL_SET_VBUS_IADP_SINK_SHIFT 3
+#define PALMAS_USB_VBUS_CTRL_SET_VBUS_IADP_SINK_SHIFT 0x03
#define PALMAS_USB_VBUS_CTRL_SET_VBUS_ACT_COMP 0x04
-#define PALMAS_USB_VBUS_CTRL_SET_VBUS_ACT_COMP_SHIFT 2
+#define PALMAS_USB_VBUS_CTRL_SET_VBUS_ACT_COMP_SHIFT 0x02
/* Bit definitions for USB_VBUS_CTRL_CLR */
#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_CHRG_VSYS 0x80
-#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_CHRG_VSYS_SHIFT 7
+#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_CHRG_VSYS_SHIFT 0x07
#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_DISCHRG 0x20
-#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_DISCHRG_SHIFT 5
+#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_DISCHRG_SHIFT 0x05
#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_IADP_SRC 0x10
-#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_IADP_SRC_SHIFT 4
+#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_IADP_SRC_SHIFT 0x04
#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_IADP_SINK 0x08
-#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_IADP_SINK_SHIFT 3
+#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_IADP_SINK_SHIFT 0x03
#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_ACT_COMP 0x04
-#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_ACT_COMP_SHIFT 2
+#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_ACT_COMP_SHIFT 0x02
/* Bit definitions for USB_ID_CTRL_SET */
#define PALMAS_USB_ID_CTRL_SET_ID_PU_220K 0x80
-#define PALMAS_USB_ID_CTRL_SET_ID_PU_220K_SHIFT 7
+#define PALMAS_USB_ID_CTRL_SET_ID_PU_220K_SHIFT 0x07
#define PALMAS_USB_ID_CTRL_SET_ID_PU_100K 0x40
-#define PALMAS_USB_ID_CTRL_SET_ID_PU_100K_SHIFT 6
+#define PALMAS_USB_ID_CTRL_SET_ID_PU_100K_SHIFT 0x06
#define PALMAS_USB_ID_CTRL_SET_ID_GND_DRV 0x20
-#define PALMAS_USB_ID_CTRL_SET_ID_GND_DRV_SHIFT 5
+#define PALMAS_USB_ID_CTRL_SET_ID_GND_DRV_SHIFT 0x05
#define PALMAS_USB_ID_CTRL_SET_ID_SRC_16U 0x10
-#define PALMAS_USB_ID_CTRL_SET_ID_SRC_16U_SHIFT 4
+#define PALMAS_USB_ID_CTRL_SET_ID_SRC_16U_SHIFT 0x04
#define PALMAS_USB_ID_CTRL_SET_ID_SRC_5U 0x08
-#define PALMAS_USB_ID_CTRL_SET_ID_SRC_5U_SHIFT 3
+#define PALMAS_USB_ID_CTRL_SET_ID_SRC_5U_SHIFT 0x03
#define PALMAS_USB_ID_CTRL_SET_ID_ACT_COMP 0x04
-#define PALMAS_USB_ID_CTRL_SET_ID_ACT_COMP_SHIFT 2
+#define PALMAS_USB_ID_CTRL_SET_ID_ACT_COMP_SHIFT 0x02
/* Bit definitions for USB_ID_CTRL_CLEAR */
#define PALMAS_USB_ID_CTRL_CLEAR_ID_PU_220K 0x80
-#define PALMAS_USB_ID_CTRL_CLEAR_ID_PU_220K_SHIFT 7
+#define PALMAS_USB_ID_CTRL_CLEAR_ID_PU_220K_SHIFT 0x07
#define PALMAS_USB_ID_CTRL_CLEAR_ID_PU_100K 0x40
-#define PALMAS_USB_ID_CTRL_CLEAR_ID_PU_100K_SHIFT 6
+#define PALMAS_USB_ID_CTRL_CLEAR_ID_PU_100K_SHIFT 0x06
#define PALMAS_USB_ID_CTRL_CLEAR_ID_GND_DRV 0x20
-#define PALMAS_USB_ID_CTRL_CLEAR_ID_GND_DRV_SHIFT 5
+#define PALMAS_USB_ID_CTRL_CLEAR_ID_GND_DRV_SHIFT 0x05
#define PALMAS_USB_ID_CTRL_CLEAR_ID_SRC_16U 0x10
-#define PALMAS_USB_ID_CTRL_CLEAR_ID_SRC_16U_SHIFT 4
+#define PALMAS_USB_ID_CTRL_CLEAR_ID_SRC_16U_SHIFT 0x04
#define PALMAS_USB_ID_CTRL_CLEAR_ID_SRC_5U 0x08
-#define PALMAS_USB_ID_CTRL_CLEAR_ID_SRC_5U_SHIFT 3
+#define PALMAS_USB_ID_CTRL_CLEAR_ID_SRC_5U_SHIFT 0x03
#define PALMAS_USB_ID_CTRL_CLEAR_ID_ACT_COMP 0x04
-#define PALMAS_USB_ID_CTRL_CLEAR_ID_ACT_COMP_SHIFT 2
+#define PALMAS_USB_ID_CTRL_CLEAR_ID_ACT_COMP_SHIFT 0x02
/* Bit definitions for USB_VBUS_INT_SRC */
#define PALMAS_USB_VBUS_INT_SRC_VOTG_SESS_VLD 0x80
-#define PALMAS_USB_VBUS_INT_SRC_VOTG_SESS_VLD_SHIFT 7
+#define PALMAS_USB_VBUS_INT_SRC_VOTG_SESS_VLD_SHIFT 0x07
#define PALMAS_USB_VBUS_INT_SRC_VADP_PRB 0x40
-#define PALMAS_USB_VBUS_INT_SRC_VADP_PRB_SHIFT 6
+#define PALMAS_USB_VBUS_INT_SRC_VADP_PRB_SHIFT 0x06
#define PALMAS_USB_VBUS_INT_SRC_VADP_SNS 0x20
-#define PALMAS_USB_VBUS_INT_SRC_VADP_SNS_SHIFT 5
+#define PALMAS_USB_VBUS_INT_SRC_VADP_SNS_SHIFT 0x05
#define PALMAS_USB_VBUS_INT_SRC_VA_VBUS_VLD 0x08
-#define PALMAS_USB_VBUS_INT_SRC_VA_VBUS_VLD_SHIFT 3
+#define PALMAS_USB_VBUS_INT_SRC_VA_VBUS_VLD_SHIFT 0x03
#define PALMAS_USB_VBUS_INT_SRC_VA_SESS_VLD 0x04
-#define PALMAS_USB_VBUS_INT_SRC_VA_SESS_VLD_SHIFT 2
+#define PALMAS_USB_VBUS_INT_SRC_VA_SESS_VLD_SHIFT 0x02
#define PALMAS_USB_VBUS_INT_SRC_VB_SESS_VLD 0x02
-#define PALMAS_USB_VBUS_INT_SRC_VB_SESS_VLD_SHIFT 1
+#define PALMAS_USB_VBUS_INT_SRC_VB_SESS_VLD_SHIFT 0x01
#define PALMAS_USB_VBUS_INT_SRC_VB_SESS_END 0x01
-#define PALMAS_USB_VBUS_INT_SRC_VB_SESS_END_SHIFT 0
+#define PALMAS_USB_VBUS_INT_SRC_VB_SESS_END_SHIFT 0x00
/* Bit definitions for USB_VBUS_INT_LATCH_SET */
#define PALMAS_USB_VBUS_INT_LATCH_SET_VOTG_SESS_VLD 0x80
-#define PALMAS_USB_VBUS_INT_LATCH_SET_VOTG_SESS_VLD_SHIFT 7
+#define PALMAS_USB_VBUS_INT_LATCH_SET_VOTG_SESS_VLD_SHIFT 0x07
#define PALMAS_USB_VBUS_INT_LATCH_SET_VADP_PRB 0x40
-#define PALMAS_USB_VBUS_INT_LATCH_SET_VADP_PRB_SHIFT 6
+#define PALMAS_USB_VBUS_INT_LATCH_SET_VADP_PRB_SHIFT 0x06
#define PALMAS_USB_VBUS_INT_LATCH_SET_VADP_SNS 0x20
-#define PALMAS_USB_VBUS_INT_LATCH_SET_VADP_SNS_SHIFT 5
+#define PALMAS_USB_VBUS_INT_LATCH_SET_VADP_SNS_SHIFT 0x05
#define PALMAS_USB_VBUS_INT_LATCH_SET_ADP 0x10
-#define PALMAS_USB_VBUS_INT_LATCH_SET_ADP_SHIFT 4
+#define PALMAS_USB_VBUS_INT_LATCH_SET_ADP_SHIFT 0x04
#define PALMAS_USB_VBUS_INT_LATCH_SET_VA_VBUS_VLD 0x08
-#define PALMAS_USB_VBUS_INT_LATCH_SET_VA_VBUS_VLD_SHIFT 3
+#define PALMAS_USB_VBUS_INT_LATCH_SET_VA_VBUS_VLD_SHIFT 0x03
#define PALMAS_USB_VBUS_INT_LATCH_SET_VA_SESS_VLD 0x04
-#define PALMAS_USB_VBUS_INT_LATCH_SET_VA_SESS_VLD_SHIFT 2
+#define PALMAS_USB_VBUS_INT_LATCH_SET_VA_SESS_VLD_SHIFT 0x02
#define PALMAS_USB_VBUS_INT_LATCH_SET_VB_SESS_VLD 0x02
-#define PALMAS_USB_VBUS_INT_LATCH_SET_VB_SESS_VLD_SHIFT 1
+#define PALMAS_USB_VBUS_INT_LATCH_SET_VB_SESS_VLD_SHIFT 0x01
#define PALMAS_USB_VBUS_INT_LATCH_SET_VB_SESS_END 0x01
-#define PALMAS_USB_VBUS_INT_LATCH_SET_VB_SESS_END_SHIFT 0
+#define PALMAS_USB_VBUS_INT_LATCH_SET_VB_SESS_END_SHIFT 0x00
/* Bit definitions for USB_VBUS_INT_LATCH_CLR */
#define PALMAS_USB_VBUS_INT_LATCH_CLR_VOTG_SESS_VLD 0x80
-#define PALMAS_USB_VBUS_INT_LATCH_CLR_VOTG_SESS_VLD_SHIFT 7
+#define PALMAS_USB_VBUS_INT_LATCH_CLR_VOTG_SESS_VLD_SHIFT 0x07
#define PALMAS_USB_VBUS_INT_LATCH_CLR_VADP_PRB 0x40
-#define PALMAS_USB_VBUS_INT_LATCH_CLR_VADP_PRB_SHIFT 6
+#define PALMAS_USB_VBUS_INT_LATCH_CLR_VADP_PRB_SHIFT 0x06
#define PALMAS_USB_VBUS_INT_LATCH_CLR_VADP_SNS 0x20
-#define PALMAS_USB_VBUS_INT_LATCH_CLR_VADP_SNS_SHIFT 5
+#define PALMAS_USB_VBUS_INT_LATCH_CLR_VADP_SNS_SHIFT 0x05
#define PALMAS_USB_VBUS_INT_LATCH_CLR_ADP 0x10
-#define PALMAS_USB_VBUS_INT_LATCH_CLR_ADP_SHIFT 4
+#define PALMAS_USB_VBUS_INT_LATCH_CLR_ADP_SHIFT 0x04
#define PALMAS_USB_VBUS_INT_LATCH_CLR_VA_VBUS_VLD 0x08
-#define PALMAS_USB_VBUS_INT_LATCH_CLR_VA_VBUS_VLD_SHIFT 3
+#define PALMAS_USB_VBUS_INT_LATCH_CLR_VA_VBUS_VLD_SHIFT 0x03
#define PALMAS_USB_VBUS_INT_LATCH_CLR_VA_SESS_VLD 0x04
-#define PALMAS_USB_VBUS_INT_LATCH_CLR_VA_SESS_VLD_SHIFT 2
+#define PALMAS_USB_VBUS_INT_LATCH_CLR_VA_SESS_VLD_SHIFT 0x02
#define PALMAS_USB_VBUS_INT_LATCH_CLR_VB_SESS_VLD 0x02
-#define PALMAS_USB_VBUS_INT_LATCH_CLR_VB_SESS_VLD_SHIFT 1
+#define PALMAS_USB_VBUS_INT_LATCH_CLR_VB_SESS_VLD_SHIFT 0x01
#define PALMAS_USB_VBUS_INT_LATCH_CLR_VB_SESS_END 0x01
-#define PALMAS_USB_VBUS_INT_LATCH_CLR_VB_SESS_END_SHIFT 0
+#define PALMAS_USB_VBUS_INT_LATCH_CLR_VB_SESS_END_SHIFT 0x00
/* Bit definitions for USB_VBUS_INT_EN_LO_SET */
#define PALMAS_USB_VBUS_INT_EN_LO_SET_VOTG_SESS_VLD 0x80
-#define PALMAS_USB_VBUS_INT_EN_LO_SET_VOTG_SESS_VLD_SHIFT 7
+#define PALMAS_USB_VBUS_INT_EN_LO_SET_VOTG_SESS_VLD_SHIFT 0x07
#define PALMAS_USB_VBUS_INT_EN_LO_SET_VADP_PRB 0x40
-#define PALMAS_USB_VBUS_INT_EN_LO_SET_VADP_PRB_SHIFT 6
+#define PALMAS_USB_VBUS_INT_EN_LO_SET_VADP_PRB_SHIFT 0x06
#define PALMAS_USB_VBUS_INT_EN_LO_SET_VADP_SNS 0x20
-#define PALMAS_USB_VBUS_INT_EN_LO_SET_VADP_SNS_SHIFT 5
+#define PALMAS_USB_VBUS_INT_EN_LO_SET_VADP_SNS_SHIFT 0x05
#define PALMAS_USB_VBUS_INT_EN_LO_SET_VA_VBUS_VLD 0x08
-#define PALMAS_USB_VBUS_INT_EN_LO_SET_VA_VBUS_VLD_SHIFT 3
+#define PALMAS_USB_VBUS_INT_EN_LO_SET_VA_VBUS_VLD_SHIFT 0x03
#define PALMAS_USB_VBUS_INT_EN_LO_SET_VA_SESS_VLD 0x04
-#define PALMAS_USB_VBUS_INT_EN_LO_SET_VA_SESS_VLD_SHIFT 2
+#define PALMAS_USB_VBUS_INT_EN_LO_SET_VA_SESS_VLD_SHIFT 0x02
#define PALMAS_USB_VBUS_INT_EN_LO_SET_VB_SESS_VLD 0x02
-#define PALMAS_USB_VBUS_INT_EN_LO_SET_VB_SESS_VLD_SHIFT 1
+#define PALMAS_USB_VBUS_INT_EN_LO_SET_VB_SESS_VLD_SHIFT 0x01
#define PALMAS_USB_VBUS_INT_EN_LO_SET_VB_SESS_END 0x01
-#define PALMAS_USB_VBUS_INT_EN_LO_SET_VB_SESS_END_SHIFT 0
+#define PALMAS_USB_VBUS_INT_EN_LO_SET_VB_SESS_END_SHIFT 0x00
/* Bit definitions for USB_VBUS_INT_EN_LO_CLR */
#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VOTG_SESS_VLD 0x80
-#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VOTG_SESS_VLD_SHIFT 7
+#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VOTG_SESS_VLD_SHIFT 0x07
#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VADP_PRB 0x40
-#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VADP_PRB_SHIFT 6
+#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VADP_PRB_SHIFT 0x06
#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VADP_SNS 0x20
-#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VADP_SNS_SHIFT 5
+#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VADP_SNS_SHIFT 0x05
#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VA_VBUS_VLD 0x08
-#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VA_VBUS_VLD_SHIFT 3
+#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VA_VBUS_VLD_SHIFT 0x03
#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VA_SESS_VLD 0x04
-#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VA_SESS_VLD_SHIFT 2
+#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VA_SESS_VLD_SHIFT 0x02
#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VB_SESS_VLD 0x02
-#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VB_SESS_VLD_SHIFT 1
+#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VB_SESS_VLD_SHIFT 0x01
#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VB_SESS_END 0x01
-#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VB_SESS_END_SHIFT 0
+#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VB_SESS_END_SHIFT 0x00
/* Bit definitions for USB_VBUS_INT_EN_HI_SET */
#define PALMAS_USB_VBUS_INT_EN_HI_SET_VOTG_SESS_VLD 0x80
-#define PALMAS_USB_VBUS_INT_EN_HI_SET_VOTG_SESS_VLD_SHIFT 7
+#define PALMAS_USB_VBUS_INT_EN_HI_SET_VOTG_SESS_VLD_SHIFT 0x07
#define PALMAS_USB_VBUS_INT_EN_HI_SET_VADP_PRB 0x40
-#define PALMAS_USB_VBUS_INT_EN_HI_SET_VADP_PRB_SHIFT 6
+#define PALMAS_USB_VBUS_INT_EN_HI_SET_VADP_PRB_SHIFT 0x06
#define PALMAS_USB_VBUS_INT_EN_HI_SET_VADP_SNS 0x20
-#define PALMAS_USB_VBUS_INT_EN_HI_SET_VADP_SNS_SHIFT 5
+#define PALMAS_USB_VBUS_INT_EN_HI_SET_VADP_SNS_SHIFT 0x05
#define PALMAS_USB_VBUS_INT_EN_HI_SET_ADP 0x10
-#define PALMAS_USB_VBUS_INT_EN_HI_SET_ADP_SHIFT 4
+#define PALMAS_USB_VBUS_INT_EN_HI_SET_ADP_SHIFT 0x04
#define PALMAS_USB_VBUS_INT_EN_HI_SET_VA_VBUS_VLD 0x08
-#define PALMAS_USB_VBUS_INT_EN_HI_SET_VA_VBUS_VLD_SHIFT 3
+#define PALMAS_USB_VBUS_INT_EN_HI_SET_VA_VBUS_VLD_SHIFT 0x03
#define PALMAS_USB_VBUS_INT_EN_HI_SET_VA_SESS_VLD 0x04
-#define PALMAS_USB_VBUS_INT_EN_HI_SET_VA_SESS_VLD_SHIFT 2
+#define PALMAS_USB_VBUS_INT_EN_HI_SET_VA_SESS_VLD_SHIFT 0x02
#define PALMAS_USB_VBUS_INT_EN_HI_SET_VB_SESS_VLD 0x02
-#define PALMAS_USB_VBUS_INT_EN_HI_SET_VB_SESS_VLD_SHIFT 1
+#define PALMAS_USB_VBUS_INT_EN_HI_SET_VB_SESS_VLD_SHIFT 0x01
#define PALMAS_USB_VBUS_INT_EN_HI_SET_VB_SESS_END 0x01
-#define PALMAS_USB_VBUS_INT_EN_HI_SET_VB_SESS_END_SHIFT 0
+#define PALMAS_USB_VBUS_INT_EN_HI_SET_VB_SESS_END_SHIFT 0x00
/* Bit definitions for USB_VBUS_INT_EN_HI_CLR */
#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VOTG_SESS_VLD 0x80
-#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VOTG_SESS_VLD_SHIFT 7
+#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VOTG_SESS_VLD_SHIFT 0x07
#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VADP_PRB 0x40
-#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VADP_PRB_SHIFT 6
+#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VADP_PRB_SHIFT 0x06
#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VADP_SNS 0x20
-#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VADP_SNS_SHIFT 5
+#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VADP_SNS_SHIFT 0x05
#define PALMAS_USB_VBUS_INT_EN_HI_CLR_ADP 0x10
-#define PALMAS_USB_VBUS_INT_EN_HI_CLR_ADP_SHIFT 4
+#define PALMAS_USB_VBUS_INT_EN_HI_CLR_ADP_SHIFT 0x04
#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VA_VBUS_VLD 0x08
-#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VA_VBUS_VLD_SHIFT 3
+#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VA_VBUS_VLD_SHIFT 0x03
#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VA_SESS_VLD 0x04
-#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VA_SESS_VLD_SHIFT 2
+#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VA_SESS_VLD_SHIFT 0x02
#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VB_SESS_VLD 0x02
-#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VB_SESS_VLD_SHIFT 1
+#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VB_SESS_VLD_SHIFT 0x01
#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VB_SESS_END 0x01
-#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VB_SESS_END_SHIFT 0
+#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VB_SESS_END_SHIFT 0x00
/* Bit definitions for USB_ID_INT_SRC */
#define PALMAS_USB_ID_INT_SRC_ID_FLOAT 0x10
-#define PALMAS_USB_ID_INT_SRC_ID_FLOAT_SHIFT 4
+#define PALMAS_USB_ID_INT_SRC_ID_FLOAT_SHIFT 0x04
#define PALMAS_USB_ID_INT_SRC_ID_A 0x08
-#define PALMAS_USB_ID_INT_SRC_ID_A_SHIFT 3
+#define PALMAS_USB_ID_INT_SRC_ID_A_SHIFT 0x03
#define PALMAS_USB_ID_INT_SRC_ID_B 0x04
-#define PALMAS_USB_ID_INT_SRC_ID_B_SHIFT 2
+#define PALMAS_USB_ID_INT_SRC_ID_B_SHIFT 0x02
#define PALMAS_USB_ID_INT_SRC_ID_C 0x02
-#define PALMAS_USB_ID_INT_SRC_ID_C_SHIFT 1
+#define PALMAS_USB_ID_INT_SRC_ID_C_SHIFT 0x01
#define PALMAS_USB_ID_INT_SRC_ID_GND 0x01
-#define PALMAS_USB_ID_INT_SRC_ID_GND_SHIFT 0
+#define PALMAS_USB_ID_INT_SRC_ID_GND_SHIFT 0x00
/* Bit definitions for USB_ID_INT_LATCH_SET */
#define PALMAS_USB_ID_INT_LATCH_SET_ID_FLOAT 0x10
-#define PALMAS_USB_ID_INT_LATCH_SET_ID_FLOAT_SHIFT 4
+#define PALMAS_USB_ID_INT_LATCH_SET_ID_FLOAT_SHIFT 0x04
#define PALMAS_USB_ID_INT_LATCH_SET_ID_A 0x08
-#define PALMAS_USB_ID_INT_LATCH_SET_ID_A_SHIFT 3
+#define PALMAS_USB_ID_INT_LATCH_SET_ID_A_SHIFT 0x03
#define PALMAS_USB_ID_INT_LATCH_SET_ID_B 0x04
-#define PALMAS_USB_ID_INT_LATCH_SET_ID_B_SHIFT 2
+#define PALMAS_USB_ID_INT_LATCH_SET_ID_B_SHIFT 0x02
#define PALMAS_USB_ID_INT_LATCH_SET_ID_C 0x02
-#define PALMAS_USB_ID_INT_LATCH_SET_ID_C_SHIFT 1
+#define PALMAS_USB_ID_INT_LATCH_SET_ID_C_SHIFT 0x01
#define PALMAS_USB_ID_INT_LATCH_SET_ID_GND 0x01
-#define PALMAS_USB_ID_INT_LATCH_SET_ID_GND_SHIFT 0
+#define PALMAS_USB_ID_INT_LATCH_SET_ID_GND_SHIFT 0x00
/* Bit definitions for USB_ID_INT_LATCH_CLR */
#define PALMAS_USB_ID_INT_LATCH_CLR_ID_FLOAT 0x10
-#define PALMAS_USB_ID_INT_LATCH_CLR_ID_FLOAT_SHIFT 4
+#define PALMAS_USB_ID_INT_LATCH_CLR_ID_FLOAT_SHIFT 0x04
#define PALMAS_USB_ID_INT_LATCH_CLR_ID_A 0x08
-#define PALMAS_USB_ID_INT_LATCH_CLR_ID_A_SHIFT 3
+#define PALMAS_USB_ID_INT_LATCH_CLR_ID_A_SHIFT 0x03
#define PALMAS_USB_ID_INT_LATCH_CLR_ID_B 0x04
-#define PALMAS_USB_ID_INT_LATCH_CLR_ID_B_SHIFT 2
+#define PALMAS_USB_ID_INT_LATCH_CLR_ID_B_SHIFT 0x02
#define PALMAS_USB_ID_INT_LATCH_CLR_ID_C 0x02
-#define PALMAS_USB_ID_INT_LATCH_CLR_ID_C_SHIFT 1
+#define PALMAS_USB_ID_INT_LATCH_CLR_ID_C_SHIFT 0x01
#define PALMAS_USB_ID_INT_LATCH_CLR_ID_GND 0x01
-#define PALMAS_USB_ID_INT_LATCH_CLR_ID_GND_SHIFT 0
+#define PALMAS_USB_ID_INT_LATCH_CLR_ID_GND_SHIFT 0x00
/* Bit definitions for USB_ID_INT_EN_LO_SET */
#define PALMAS_USB_ID_INT_EN_LO_SET_ID_FLOAT 0x10
-#define PALMAS_USB_ID_INT_EN_LO_SET_ID_FLOAT_SHIFT 4
+#define PALMAS_USB_ID_INT_EN_LO_SET_ID_FLOAT_SHIFT 0x04
#define PALMAS_USB_ID_INT_EN_LO_SET_ID_A 0x08
-#define PALMAS_USB_ID_INT_EN_LO_SET_ID_A_SHIFT 3
+#define PALMAS_USB_ID_INT_EN_LO_SET_ID_A_SHIFT 0x03
#define PALMAS_USB_ID_INT_EN_LO_SET_ID_B 0x04
-#define PALMAS_USB_ID_INT_EN_LO_SET_ID_B_SHIFT 2
+#define PALMAS_USB_ID_INT_EN_LO_SET_ID_B_SHIFT 0x02
#define PALMAS_USB_ID_INT_EN_LO_SET_ID_C 0x02
-#define PALMAS_USB_ID_INT_EN_LO_SET_ID_C_SHIFT 1
+#define PALMAS_USB_ID_INT_EN_LO_SET_ID_C_SHIFT 0x01
#define PALMAS_USB_ID_INT_EN_LO_SET_ID_GND 0x01
-#define PALMAS_USB_ID_INT_EN_LO_SET_ID_GND_SHIFT 0
+#define PALMAS_USB_ID_INT_EN_LO_SET_ID_GND_SHIFT 0x00
/* Bit definitions for USB_ID_INT_EN_LO_CLR */
#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_FLOAT 0x10
-#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_FLOAT_SHIFT 4
+#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_FLOAT_SHIFT 0x04
#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_A 0x08
-#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_A_SHIFT 3
+#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_A_SHIFT 0x03
#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_B 0x04
-#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_B_SHIFT 2
+#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_B_SHIFT 0x02
#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_C 0x02
-#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_C_SHIFT 1
+#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_C_SHIFT 0x01
#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_GND 0x01
-#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_GND_SHIFT 0
+#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_GND_SHIFT 0x00
/* Bit definitions for USB_ID_INT_EN_HI_SET */
#define PALMAS_USB_ID_INT_EN_HI_SET_ID_FLOAT 0x10
-#define PALMAS_USB_ID_INT_EN_HI_SET_ID_FLOAT_SHIFT 4
+#define PALMAS_USB_ID_INT_EN_HI_SET_ID_FLOAT_SHIFT 0x04
#define PALMAS_USB_ID_INT_EN_HI_SET_ID_A 0x08
-#define PALMAS_USB_ID_INT_EN_HI_SET_ID_A_SHIFT 3
+#define PALMAS_USB_ID_INT_EN_HI_SET_ID_A_SHIFT 0x03
#define PALMAS_USB_ID_INT_EN_HI_SET_ID_B 0x04
-#define PALMAS_USB_ID_INT_EN_HI_SET_ID_B_SHIFT 2
+#define PALMAS_USB_ID_INT_EN_HI_SET_ID_B_SHIFT 0x02
#define PALMAS_USB_ID_INT_EN_HI_SET_ID_C 0x02
-#define PALMAS_USB_ID_INT_EN_HI_SET_ID_C_SHIFT 1
+#define PALMAS_USB_ID_INT_EN_HI_SET_ID_C_SHIFT 0x01
#define PALMAS_USB_ID_INT_EN_HI_SET_ID_GND 0x01
-#define PALMAS_USB_ID_INT_EN_HI_SET_ID_GND_SHIFT 0
+#define PALMAS_USB_ID_INT_EN_HI_SET_ID_GND_SHIFT 0x00
/* Bit definitions for USB_ID_INT_EN_HI_CLR */
#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_FLOAT 0x10
-#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_FLOAT_SHIFT 4
+#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_FLOAT_SHIFT 0x04
#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_A 0x08
-#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_A_SHIFT 3
+#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_A_SHIFT 0x03
#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_B 0x04
-#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_B_SHIFT 2
+#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_B_SHIFT 0x02
#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_C 0x02
-#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_C_SHIFT 1
+#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_C_SHIFT 0x01
#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_GND 0x01
-#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_GND_SHIFT 0
+#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_GND_SHIFT 0x00
/* Bit definitions for USB_OTG_ADP_CTRL */
#define PALMAS_USB_OTG_ADP_CTRL_ADP_EN 0x04
-#define PALMAS_USB_OTG_ADP_CTRL_ADP_EN_SHIFT 2
+#define PALMAS_USB_OTG_ADP_CTRL_ADP_EN_SHIFT 0x02
#define PALMAS_USB_OTG_ADP_CTRL_ADP_MODE_MASK 0x03
-#define PALMAS_USB_OTG_ADP_CTRL_ADP_MODE_SHIFT 0
+#define PALMAS_USB_OTG_ADP_CTRL_ADP_MODE_SHIFT 0x00
/* Bit definitions for USB_OTG_ADP_HIGH */
-#define PALMAS_USB_OTG_ADP_HIGH_T_ADP_HIGH_MASK 0xff
-#define PALMAS_USB_OTG_ADP_HIGH_T_ADP_HIGH_SHIFT 0
+#define PALMAS_USB_OTG_ADP_HIGH_T_ADP_HIGH_MASK 0xFF
+#define PALMAS_USB_OTG_ADP_HIGH_T_ADP_HIGH_SHIFT 0x00
/* Bit definitions for USB_OTG_ADP_LOW */
-#define PALMAS_USB_OTG_ADP_LOW_T_ADP_LOW_MASK 0xff
-#define PALMAS_USB_OTG_ADP_LOW_T_ADP_LOW_SHIFT 0
+#define PALMAS_USB_OTG_ADP_LOW_T_ADP_LOW_MASK 0xFF
+#define PALMAS_USB_OTG_ADP_LOW_T_ADP_LOW_SHIFT 0x00
/* Bit definitions for USB_OTG_ADP_RISE */
-#define PALMAS_USB_OTG_ADP_RISE_T_ADP_RISE_MASK 0xff
-#define PALMAS_USB_OTG_ADP_RISE_T_ADP_RISE_SHIFT 0
+#define PALMAS_USB_OTG_ADP_RISE_T_ADP_RISE_MASK 0xFF
+#define PALMAS_USB_OTG_ADP_RISE_T_ADP_RISE_SHIFT 0x00
/* Bit definitions for USB_OTG_REVISION */
#define PALMAS_USB_OTG_REVISION_OTG_REV 0x01
-#define PALMAS_USB_OTG_REVISION_OTG_REV_SHIFT 0
+#define PALMAS_USB_OTG_REVISION_OTG_REV_SHIFT 0x00
/* Registers for function VIBRATOR */
-#define PALMAS_VIBRA_CTRL 0x0
+#define PALMAS_VIBRA_CTRL 0x00
/* Bit definitions for VIBRA_CTRL */
#define PALMAS_VIBRA_CTRL_PWM_DUTY_SEL_MASK 0x06
-#define PALMAS_VIBRA_CTRL_PWM_DUTY_SEL_SHIFT 1
+#define PALMAS_VIBRA_CTRL_PWM_DUTY_SEL_SHIFT 0x01
#define PALMAS_VIBRA_CTRL_PWM_FREQ_SEL 0x01
-#define PALMAS_VIBRA_CTRL_PWM_FREQ_SEL_SHIFT 0
+#define PALMAS_VIBRA_CTRL_PWM_FREQ_SEL_SHIFT 0x00
/* Registers for function GPIO */
-#define PALMAS_GPIO_DATA_IN 0x0
-#define PALMAS_GPIO_DATA_DIR 0x1
-#define PALMAS_GPIO_DATA_OUT 0x2
-#define PALMAS_GPIO_DEBOUNCE_EN 0x3
-#define PALMAS_GPIO_CLEAR_DATA_OUT 0x4
-#define PALMAS_GPIO_SET_DATA_OUT 0x5
-#define PALMAS_PU_PD_GPIO_CTRL1 0x6
-#define PALMAS_PU_PD_GPIO_CTRL2 0x7
-#define PALMAS_OD_OUTPUT_GPIO_CTRL 0x8
-#define PALMAS_GPIO_DATA_IN2 0x9
+#define PALMAS_GPIO_DATA_IN 0x00
+#define PALMAS_GPIO_DATA_DIR 0x01
+#define PALMAS_GPIO_DATA_OUT 0x02
+#define PALMAS_GPIO_DEBOUNCE_EN 0x03
+#define PALMAS_GPIO_CLEAR_DATA_OUT 0x04
+#define PALMAS_GPIO_SET_DATA_OUT 0x05
+#define PALMAS_PU_PD_GPIO_CTRL1 0x06
+#define PALMAS_PU_PD_GPIO_CTRL2 0x07
+#define PALMAS_OD_OUTPUT_GPIO_CTRL 0x08
+#define PALMAS_GPIO_DATA_IN2 0x09
#define PALMAS_GPIO_DATA_DIR2 0x0A
#define PALMAS_GPIO_DATA_OUT2 0x0B
#define PALMAS_GPIO_DEBOUNCE_EN2 0x0C
@@ -2561,167 +2561,167 @@ enum usb_irq_events {
/* Bit definitions for GPIO_DATA_IN */
#define PALMAS_GPIO_DATA_IN_GPIO_7_IN 0x80
-#define PALMAS_GPIO_DATA_IN_GPIO_7_IN_SHIFT 7
+#define PALMAS_GPIO_DATA_IN_GPIO_7_IN_SHIFT 0x07
#define PALMAS_GPIO_DATA_IN_GPIO_6_IN 0x40
-#define PALMAS_GPIO_DATA_IN_GPIO_6_IN_SHIFT 6
+#define PALMAS_GPIO_DATA_IN_GPIO_6_IN_SHIFT 0x06
#define PALMAS_GPIO_DATA_IN_GPIO_5_IN 0x20
-#define PALMAS_GPIO_DATA_IN_GPIO_5_IN_SHIFT 5
+#define PALMAS_GPIO_DATA_IN_GPIO_5_IN_SHIFT 0x05
#define PALMAS_GPIO_DATA_IN_GPIO_4_IN 0x10
-#define PALMAS_GPIO_DATA_IN_GPIO_4_IN_SHIFT 4
+#define PALMAS_GPIO_DATA_IN_GPIO_4_IN_SHIFT 0x04
#define PALMAS_GPIO_DATA_IN_GPIO_3_IN 0x08
-#define PALMAS_GPIO_DATA_IN_GPIO_3_IN_SHIFT 3
+#define PALMAS_GPIO_DATA_IN_GPIO_3_IN_SHIFT 0x03
#define PALMAS_GPIO_DATA_IN_GPIO_2_IN 0x04
-#define PALMAS_GPIO_DATA_IN_GPIO_2_IN_SHIFT 2
+#define PALMAS_GPIO_DATA_IN_GPIO_2_IN_SHIFT 0x02
#define PALMAS_GPIO_DATA_IN_GPIO_1_IN 0x02
-#define PALMAS_GPIO_DATA_IN_GPIO_1_IN_SHIFT 1
+#define PALMAS_GPIO_DATA_IN_GPIO_1_IN_SHIFT 0x01
#define PALMAS_GPIO_DATA_IN_GPIO_0_IN 0x01
-#define PALMAS_GPIO_DATA_IN_GPIO_0_IN_SHIFT 0
+#define PALMAS_GPIO_DATA_IN_GPIO_0_IN_SHIFT 0x00
/* Bit definitions for GPIO_DATA_DIR */
#define PALMAS_GPIO_DATA_DIR_GPIO_7_DIR 0x80
-#define PALMAS_GPIO_DATA_DIR_GPIO_7_DIR_SHIFT 7
+#define PALMAS_GPIO_DATA_DIR_GPIO_7_DIR_SHIFT 0x07
#define PALMAS_GPIO_DATA_DIR_GPIO_6_DIR 0x40
-#define PALMAS_GPIO_DATA_DIR_GPIO_6_DIR_SHIFT 6
+#define PALMAS_GPIO_DATA_DIR_GPIO_6_DIR_SHIFT 0x06
#define PALMAS_GPIO_DATA_DIR_GPIO_5_DIR 0x20
-#define PALMAS_GPIO_DATA_DIR_GPIO_5_DIR_SHIFT 5
+#define PALMAS_GPIO_DATA_DIR_GPIO_5_DIR_SHIFT 0x05
#define PALMAS_GPIO_DATA_DIR_GPIO_4_DIR 0x10
-#define PALMAS_GPIO_DATA_DIR_GPIO_4_DIR_SHIFT 4
+#define PALMAS_GPIO_DATA_DIR_GPIO_4_DIR_SHIFT 0x04
#define PALMAS_GPIO_DATA_DIR_GPIO_3_DIR 0x08
-#define PALMAS_GPIO_DATA_DIR_GPIO_3_DIR_SHIFT 3
+#define PALMAS_GPIO_DATA_DIR_GPIO_3_DIR_SHIFT 0x03
#define PALMAS_GPIO_DATA_DIR_GPIO_2_DIR 0x04
-#define PALMAS_GPIO_DATA_DIR_GPIO_2_DIR_SHIFT 2
+#define PALMAS_GPIO_DATA_DIR_GPIO_2_DIR_SHIFT 0x02
#define PALMAS_GPIO_DATA_DIR_GPIO_1_DIR 0x02
-#define PALMAS_GPIO_DATA_DIR_GPIO_1_DIR_SHIFT 1
+#define PALMAS_GPIO_DATA_DIR_GPIO_1_DIR_SHIFT 0x01
#define PALMAS_GPIO_DATA_DIR_GPIO_0_DIR 0x01
-#define PALMAS_GPIO_DATA_DIR_GPIO_0_DIR_SHIFT 0
+#define PALMAS_GPIO_DATA_DIR_GPIO_0_DIR_SHIFT 0x00
/* Bit definitions for GPIO_DATA_OUT */
#define PALMAS_GPIO_DATA_OUT_GPIO_7_OUT 0x80
-#define PALMAS_GPIO_DATA_OUT_GPIO_7_OUT_SHIFT 7
+#define PALMAS_GPIO_DATA_OUT_GPIO_7_OUT_SHIFT 0x07
#define PALMAS_GPIO_DATA_OUT_GPIO_6_OUT 0x40
-#define PALMAS_GPIO_DATA_OUT_GPIO_6_OUT_SHIFT 6
+#define PALMAS_GPIO_DATA_OUT_GPIO_6_OUT_SHIFT 0x06
#define PALMAS_GPIO_DATA_OUT_GPIO_5_OUT 0x20
-#define PALMAS_GPIO_DATA_OUT_GPIO_5_OUT_SHIFT 5
+#define PALMAS_GPIO_DATA_OUT_GPIO_5_OUT_SHIFT 0x05
#define PALMAS_GPIO_DATA_OUT_GPIO_4_OUT 0x10
-#define PALMAS_GPIO_DATA_OUT_GPIO_4_OUT_SHIFT 4
+#define PALMAS_GPIO_DATA_OUT_GPIO_4_OUT_SHIFT 0x04
#define PALMAS_GPIO_DATA_OUT_GPIO_3_OUT 0x08
-#define PALMAS_GPIO_DATA_OUT_GPIO_3_OUT_SHIFT 3
+#define PALMAS_GPIO_DATA_OUT_GPIO_3_OUT_SHIFT 0x03
#define PALMAS_GPIO_DATA_OUT_GPIO_2_OUT 0x04
-#define PALMAS_GPIO_DATA_OUT_GPIO_2_OUT_SHIFT 2
+#define PALMAS_GPIO_DATA_OUT_GPIO_2_OUT_SHIFT 0x02
#define PALMAS_GPIO_DATA_OUT_GPIO_1_OUT 0x02
-#define PALMAS_GPIO_DATA_OUT_GPIO_1_OUT_SHIFT 1
+#define PALMAS_GPIO_DATA_OUT_GPIO_1_OUT_SHIFT 0x01
#define PALMAS_GPIO_DATA_OUT_GPIO_0_OUT 0x01
-#define PALMAS_GPIO_DATA_OUT_GPIO_0_OUT_SHIFT 0
+#define PALMAS_GPIO_DATA_OUT_GPIO_0_OUT_SHIFT 0x00
/* Bit definitions for GPIO_DEBOUNCE_EN */
#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_7_DEBOUNCE_EN 0x80
-#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_7_DEBOUNCE_EN_SHIFT 7
+#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_7_DEBOUNCE_EN_SHIFT 0x07
#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_6_DEBOUNCE_EN 0x40
-#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_6_DEBOUNCE_EN_SHIFT 6
+#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_6_DEBOUNCE_EN_SHIFT 0x06
#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_5_DEBOUNCE_EN 0x20
-#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_5_DEBOUNCE_EN_SHIFT 5
+#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_5_DEBOUNCE_EN_SHIFT 0x05
#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_4_DEBOUNCE_EN 0x10
-#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_4_DEBOUNCE_EN_SHIFT 4
+#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_4_DEBOUNCE_EN_SHIFT 0x04
#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_3_DEBOUNCE_EN 0x08
-#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_3_DEBOUNCE_EN_SHIFT 3
+#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_3_DEBOUNCE_EN_SHIFT 0x03
#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_2_DEBOUNCE_EN 0x04
-#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_2_DEBOUNCE_EN_SHIFT 2
+#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_2_DEBOUNCE_EN_SHIFT 0x02
#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_1_DEBOUNCE_EN 0x02
-#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_1_DEBOUNCE_EN_SHIFT 1
+#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_1_DEBOUNCE_EN_SHIFT 0x01
#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_0_DEBOUNCE_EN 0x01
-#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_0_DEBOUNCE_EN_SHIFT 0
+#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_0_DEBOUNCE_EN_SHIFT 0x00
/* Bit definitions for GPIO_CLEAR_DATA_OUT */
#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_7_CLEAR_DATA_OUT 0x80
-#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_7_CLEAR_DATA_OUT_SHIFT 7
+#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_7_CLEAR_DATA_OUT_SHIFT 0x07
#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_6_CLEAR_DATA_OUT 0x40
-#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_6_CLEAR_DATA_OUT_SHIFT 6
+#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_6_CLEAR_DATA_OUT_SHIFT 0x06
#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_5_CLEAR_DATA_OUT 0x20
-#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_5_CLEAR_DATA_OUT_SHIFT 5
+#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_5_CLEAR_DATA_OUT_SHIFT 0x05
#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_4_CLEAR_DATA_OUT 0x10
-#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_4_CLEAR_DATA_OUT_SHIFT 4
+#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_4_CLEAR_DATA_OUT_SHIFT 0x04
#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_3_CLEAR_DATA_OUT 0x08
-#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_3_CLEAR_DATA_OUT_SHIFT 3
+#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_3_CLEAR_DATA_OUT_SHIFT 0x03
#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_2_CLEAR_DATA_OUT 0x04
-#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_2_CLEAR_DATA_OUT_SHIFT 2
+#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_2_CLEAR_DATA_OUT_SHIFT 0x02
#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_1_CLEAR_DATA_OUT 0x02
-#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_1_CLEAR_DATA_OUT_SHIFT 1
+#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_1_CLEAR_DATA_OUT_SHIFT 0x01
#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_0_CLEAR_DATA_OUT 0x01
-#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_0_CLEAR_DATA_OUT_SHIFT 0
+#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_0_CLEAR_DATA_OUT_SHIFT 0x00
/* Bit definitions for GPIO_SET_DATA_OUT */
#define PALMAS_GPIO_SET_DATA_OUT_GPIO_7_SET_DATA_OUT 0x80
-#define PALMAS_GPIO_SET_DATA_OUT_GPIO_7_SET_DATA_OUT_SHIFT 7
+#define PALMAS_GPIO_SET_DATA_OUT_GPIO_7_SET_DATA_OUT_SHIFT 0x07
#define PALMAS_GPIO_SET_DATA_OUT_GPIO_6_SET_DATA_OUT 0x40
-#define PALMAS_GPIO_SET_DATA_OUT_GPIO_6_SET_DATA_OUT_SHIFT 6
+#define PALMAS_GPIO_SET_DATA_OUT_GPIO_6_SET_DATA_OUT_SHIFT 0x06
#define PALMAS_GPIO_SET_DATA_OUT_GPIO_5_SET_DATA_OUT 0x20
-#define PALMAS_GPIO_SET_DATA_OUT_GPIO_5_SET_DATA_OUT_SHIFT 5
+#define PALMAS_GPIO_SET_DATA_OUT_GPIO_5_SET_DATA_OUT_SHIFT 0x05
#define PALMAS_GPIO_SET_DATA_OUT_GPIO_4_SET_DATA_OUT 0x10
-#define PALMAS_GPIO_SET_DATA_OUT_GPIO_4_SET_DATA_OUT_SHIFT 4
+#define PALMAS_GPIO_SET_DATA_OUT_GPIO_4_SET_DATA_OUT_SHIFT 0x04
#define PALMAS_GPIO_SET_DATA_OUT_GPIO_3_SET_DATA_OUT 0x08
-#define PALMAS_GPIO_SET_DATA_OUT_GPIO_3_SET_DATA_OUT_SHIFT 3
+#define PALMAS_GPIO_SET_DATA_OUT_GPIO_3_SET_DATA_OUT_SHIFT 0x03
#define PALMAS_GPIO_SET_DATA_OUT_GPIO_2_SET_DATA_OUT 0x04
-#define PALMAS_GPIO_SET_DATA_OUT_GPIO_2_SET_DATA_OUT_SHIFT 2
+#define PALMAS_GPIO_SET_DATA_OUT_GPIO_2_SET_DATA_OUT_SHIFT 0x02
#define PALMAS_GPIO_SET_DATA_OUT_GPIO_1_SET_DATA_OUT 0x02
-#define PALMAS_GPIO_SET_DATA_OUT_GPIO_1_SET_DATA_OUT_SHIFT 1
+#define PALMAS_GPIO_SET_DATA_OUT_GPIO_1_SET_DATA_OUT_SHIFT 0x01
#define PALMAS_GPIO_SET_DATA_OUT_GPIO_0_SET_DATA_OUT 0x01
-#define PALMAS_GPIO_SET_DATA_OUT_GPIO_0_SET_DATA_OUT_SHIFT 0
+#define PALMAS_GPIO_SET_DATA_OUT_GPIO_0_SET_DATA_OUT_SHIFT 0x00
/* Bit definitions for PU_PD_GPIO_CTRL1 */
#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_3_PD 0x40
-#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_3_PD_SHIFT 6
+#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_3_PD_SHIFT 0x06
#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_2_PU 0x20
-#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_2_PU_SHIFT 5
+#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_2_PU_SHIFT 0x05
#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_2_PD 0x10
-#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_2_PD_SHIFT 4
+#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_2_PD_SHIFT 0x04
#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_1_PU 0x08
-#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_1_PU_SHIFT 3
+#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_1_PU_SHIFT 0x03
#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_1_PD 0x04
-#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_1_PD_SHIFT 2
+#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_1_PD_SHIFT 0x02
#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_0_PD 0x01
-#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_0_PD_SHIFT 0
+#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_0_PD_SHIFT 0x00
/* Bit definitions for PU_PD_GPIO_CTRL2 */
#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_7_PD 0x40
-#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_7_PD_SHIFT 6
+#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_7_PD_SHIFT 0x06
#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_6_PU 0x20
-#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_6_PU_SHIFT 5
+#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_6_PU_SHIFT 0x05
#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_6_PD 0x10
-#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_6_PD_SHIFT 4
+#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_6_PD_SHIFT 0x04
#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_5_PU 0x08
-#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_5_PU_SHIFT 3
+#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_5_PU_SHIFT 0x03
#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_5_PD 0x04
-#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_5_PD_SHIFT 2
+#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_5_PD_SHIFT 0x02
#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_4_PU 0x02
-#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_4_PU_SHIFT 1
+#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_4_PU_SHIFT 0x01
#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_4_PD 0x01
-#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_4_PD_SHIFT 0
+#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_4_PD_SHIFT 0x00
/* Bit definitions for OD_OUTPUT_GPIO_CTRL */
#define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_5_OD 0x20
-#define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_5_OD_SHIFT 5
+#define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_5_OD_SHIFT 0x05
#define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_2_OD 0x04
-#define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_2_OD_SHIFT 2
+#define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_2_OD_SHIFT 0x02
#define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_1_OD 0x02
-#define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_1_OD_SHIFT 1
+#define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_1_OD_SHIFT 0x01
/* Registers for function GPADC */
-#define PALMAS_GPADC_CTRL1 0x0
-#define PALMAS_GPADC_CTRL2 0x1
-#define PALMAS_GPADC_RT_CTRL 0x2
-#define PALMAS_GPADC_AUTO_CTRL 0x3
-#define PALMAS_GPADC_STATUS 0x4
-#define PALMAS_GPADC_RT_SELECT 0x5
-#define PALMAS_GPADC_RT_CONV0_LSB 0x6
-#define PALMAS_GPADC_RT_CONV0_MSB 0x7
-#define PALMAS_GPADC_AUTO_SELECT 0x8
-#define PALMAS_GPADC_AUTO_CONV0_LSB 0x9
-#define PALMAS_GPADC_AUTO_CONV0_MSB 0xA
-#define PALMAS_GPADC_AUTO_CONV1_LSB 0xB
-#define PALMAS_GPADC_AUTO_CONV1_MSB 0xC
-#define PALMAS_GPADC_SW_SELECT 0xD
-#define PALMAS_GPADC_SW_CONV0_LSB 0xE
-#define PALMAS_GPADC_SW_CONV0_MSB 0xF
+#define PALMAS_GPADC_CTRL1 0x00
+#define PALMAS_GPADC_CTRL2 0x01
+#define PALMAS_GPADC_RT_CTRL 0x02
+#define PALMAS_GPADC_AUTO_CTRL 0x03
+#define PALMAS_GPADC_STATUS 0x04
+#define PALMAS_GPADC_RT_SELECT 0x05
+#define PALMAS_GPADC_RT_CONV0_LSB 0x06
+#define PALMAS_GPADC_RT_CONV0_MSB 0x07
+#define PALMAS_GPADC_AUTO_SELECT 0x08
+#define PALMAS_GPADC_AUTO_CONV0_LSB 0x09
+#define PALMAS_GPADC_AUTO_CONV0_MSB 0x0A
+#define PALMAS_GPADC_AUTO_CONV1_LSB 0x0B
+#define PALMAS_GPADC_AUTO_CONV1_MSB 0x0C
+#define PALMAS_GPADC_SW_SELECT 0x0D
+#define PALMAS_GPADC_SW_CONV0_LSB 0x0E
+#define PALMAS_GPADC_SW_CONV0_MSB 0x0F
#define PALMAS_GPADC_THRES_CONV0_LSB 0x10
#define PALMAS_GPADC_THRES_CONV0_MSB 0x11
#define PALMAS_GPADC_THRES_CONV1_LSB 0x12
@@ -2731,150 +2731,150 @@ enum usb_irq_events {
/* Bit definitions for GPADC_CTRL1 */
#define PALMAS_GPADC_CTRL1_RESERVED_MASK 0xc0
-#define PALMAS_GPADC_CTRL1_RESERVED_SHIFT 6
+#define PALMAS_GPADC_CTRL1_RESERVED_SHIFT 0x06
#define PALMAS_GPADC_CTRL1_CURRENT_SRC_CH3_MASK 0x30
-#define PALMAS_GPADC_CTRL1_CURRENT_SRC_CH3_SHIFT 4
+#define PALMAS_GPADC_CTRL1_CURRENT_SRC_CH3_SHIFT 0x04
#define PALMAS_GPADC_CTRL1_CURRENT_SRC_CH0_MASK 0x0c
-#define PALMAS_GPADC_CTRL1_CURRENT_SRC_CH0_SHIFT 2
+#define PALMAS_GPADC_CTRL1_CURRENT_SRC_CH0_SHIFT 0x02
#define PALMAS_GPADC_CTRL1_BAT_REMOVAL_DET 0x02
-#define PALMAS_GPADC_CTRL1_BAT_REMOVAL_DET_SHIFT 1
+#define PALMAS_GPADC_CTRL1_BAT_REMOVAL_DET_SHIFT 0x01
#define PALMAS_GPADC_CTRL1_GPADC_FORCE 0x01
-#define PALMAS_GPADC_CTRL1_GPADC_FORCE_SHIFT 0
+#define PALMAS_GPADC_CTRL1_GPADC_FORCE_SHIFT 0x00
/* Bit definitions for GPADC_CTRL2 */
#define PALMAS_GPADC_CTRL2_RESERVED_MASK 0x06
-#define PALMAS_GPADC_CTRL2_RESERVED_SHIFT 1
+#define PALMAS_GPADC_CTRL2_RESERVED_SHIFT 0x01
/* Bit definitions for GPADC_RT_CTRL */
#define PALMAS_GPADC_RT_CTRL_EXTEND_DELAY 0x02
-#define PALMAS_GPADC_RT_CTRL_EXTEND_DELAY_SHIFT 1
+#define PALMAS_GPADC_RT_CTRL_EXTEND_DELAY_SHIFT 0x01
#define PALMAS_GPADC_RT_CTRL_START_POLARITY 0x01
-#define PALMAS_GPADC_RT_CTRL_START_POLARITY_SHIFT 0
+#define PALMAS_GPADC_RT_CTRL_START_POLARITY_SHIFT 0x00
/* Bit definitions for GPADC_AUTO_CTRL */
#define PALMAS_GPADC_AUTO_CTRL_SHUTDOWN_CONV1 0x80
-#define PALMAS_GPADC_AUTO_CTRL_SHUTDOWN_CONV1_SHIFT 7
+#define PALMAS_GPADC_AUTO_CTRL_SHUTDOWN_CONV1_SHIFT 0x07
#define PALMAS_GPADC_AUTO_CTRL_SHUTDOWN_CONV0 0x40
-#define PALMAS_GPADC_AUTO_CTRL_SHUTDOWN_CONV0_SHIFT 6
+#define PALMAS_GPADC_AUTO_CTRL_SHUTDOWN_CONV0_SHIFT 0x06
#define PALMAS_GPADC_AUTO_CTRL_AUTO_CONV1_EN 0x20
-#define PALMAS_GPADC_AUTO_CTRL_AUTO_CONV1_EN_SHIFT 5
+#define PALMAS_GPADC_AUTO_CTRL_AUTO_CONV1_EN_SHIFT 0x05
#define PALMAS_GPADC_AUTO_CTRL_AUTO_CONV0_EN 0x10
-#define PALMAS_GPADC_AUTO_CTRL_AUTO_CONV0_EN_SHIFT 4
-#define PALMAS_GPADC_AUTO_CTRL_COUNTER_CONV_MASK 0x0f
-#define PALMAS_GPADC_AUTO_CTRL_COUNTER_CONV_SHIFT 0
+#define PALMAS_GPADC_AUTO_CTRL_AUTO_CONV0_EN_SHIFT 0x04
+#define PALMAS_GPADC_AUTO_CTRL_COUNTER_CONV_MASK 0x0F
+#define PALMAS_GPADC_AUTO_CTRL_COUNTER_CONV_SHIFT 0x00
/* Bit definitions for GPADC_STATUS */
#define PALMAS_GPADC_STATUS_GPADC_AVAILABLE 0x10
-#define PALMAS_GPADC_STATUS_GPADC_AVAILABLE_SHIFT 4
+#define PALMAS_GPADC_STATUS_GPADC_AVAILABLE_SHIFT 0x04
/* Bit definitions for GPADC_RT_SELECT */
#define PALMAS_GPADC_RT_SELECT_RT_CONV_EN 0x80
-#define PALMAS_GPADC_RT_SELECT_RT_CONV_EN_SHIFT 7
-#define PALMAS_GPADC_RT_SELECT_RT_CONV0_SEL_MASK 0x0f
-#define PALMAS_GPADC_RT_SELECT_RT_CONV0_SEL_SHIFT 0
+#define PALMAS_GPADC_RT_SELECT_RT_CONV_EN_SHIFT 0x07
+#define PALMAS_GPADC_RT_SELECT_RT_CONV0_SEL_MASK 0x0F
+#define PALMAS_GPADC_RT_SELECT_RT_CONV0_SEL_SHIFT 0x00
/* Bit definitions for GPADC_RT_CONV0_LSB */
-#define PALMAS_GPADC_RT_CONV0_LSB_RT_CONV0_LSB_MASK 0xff
-#define PALMAS_GPADC_RT_CONV0_LSB_RT_CONV0_LSB_SHIFT 0
+#define PALMAS_GPADC_RT_CONV0_LSB_RT_CONV0_LSB_MASK 0xFF
+#define PALMAS_GPADC_RT_CONV0_LSB_RT_CONV0_LSB_SHIFT 0x00
/* Bit definitions for GPADC_RT_CONV0_MSB */
-#define PALMAS_GPADC_RT_CONV0_MSB_RT_CONV0_MSB_MASK 0x0f
-#define PALMAS_GPADC_RT_CONV0_MSB_RT_CONV0_MSB_SHIFT 0
+#define PALMAS_GPADC_RT_CONV0_MSB_RT_CONV0_MSB_MASK 0x0F
+#define PALMAS_GPADC_RT_CONV0_MSB_RT_CONV0_MSB_SHIFT 0x00
/* Bit definitions for GPADC_AUTO_SELECT */
-#define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV1_SEL_MASK 0xf0
-#define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV1_SEL_SHIFT 4
-#define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV0_SEL_MASK 0x0f
-#define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV0_SEL_SHIFT 0
+#define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV1_SEL_MASK 0xF0
+#define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV1_SEL_SHIFT 0x04
+#define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV0_SEL_MASK 0x0F
+#define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV0_SEL_SHIFT 0x00
/* Bit definitions for GPADC_AUTO_CONV0_LSB */
-#define PALMAS_GPADC_AUTO_CONV0_LSB_AUTO_CONV0_LSB_MASK 0xff
-#define PALMAS_GPADC_AUTO_CONV0_LSB_AUTO_CONV0_LSB_SHIFT 0
+#define PALMAS_GPADC_AUTO_CONV0_LSB_AUTO_CONV0_LSB_MASK 0xFF
+#define PALMAS_GPADC_AUTO_CONV0_LSB_AUTO_CONV0_LSB_SHIFT 0x00
/* Bit definitions for GPADC_AUTO_CONV0_MSB */
-#define PALMAS_GPADC_AUTO_CONV0_MSB_AUTO_CONV0_MSB_MASK 0x0f
-#define PALMAS_GPADC_AUTO_CONV0_MSB_AUTO_CONV0_MSB_SHIFT 0
+#define PALMAS_GPADC_AUTO_CONV0_MSB_AUTO_CONV0_MSB_MASK 0x0F
+#define PALMAS_GPADC_AUTO_CONV0_MSB_AUTO_CONV0_MSB_SHIFT 0x00
/* Bit definitions for GPADC_AUTO_CONV1_LSB */
-#define PALMAS_GPADC_AUTO_CONV1_LSB_AUTO_CONV1_LSB_MASK 0xff
-#define PALMAS_GPADC_AUTO_CONV1_LSB_AUTO_CONV1_LSB_SHIFT 0
+#define PALMAS_GPADC_AUTO_CONV1_LSB_AUTO_CONV1_LSB_MASK 0xFF
+#define PALMAS_GPADC_AUTO_CONV1_LSB_AUTO_CONV1_LSB_SHIFT 0x00
/* Bit definitions for GPADC_AUTO_CONV1_MSB */
-#define PALMAS_GPADC_AUTO_CONV1_MSB_AUTO_CONV1_MSB_MASK 0x0f
-#define PALMAS_GPADC_AUTO_CONV1_MSB_AUTO_CONV1_MSB_SHIFT 0
+#define PALMAS_GPADC_AUTO_CONV1_MSB_AUTO_CONV1_MSB_MASK 0x0F
+#define PALMAS_GPADC_AUTO_CONV1_MSB_AUTO_CONV1_MSB_SHIFT 0x00
/* Bit definitions for GPADC_SW_SELECT */
#define PALMAS_GPADC_SW_SELECT_SW_CONV_EN 0x80
-#define PALMAS_GPADC_SW_SELECT_SW_CONV_EN_SHIFT 7
+#define PALMAS_GPADC_SW_SELECT_SW_CONV_EN_SHIFT 0x07
#define PALMAS_GPADC_SW_SELECT_SW_START_CONV0 0x10
-#define PALMAS_GPADC_SW_SELECT_SW_START_CONV0_SHIFT 4
-#define PALMAS_GPADC_SW_SELECT_SW_CONV0_SEL_MASK 0x0f
-#define PALMAS_GPADC_SW_SELECT_SW_CONV0_SEL_SHIFT 0
+#define PALMAS_GPADC_SW_SELECT_SW_START_CONV0_SHIFT 0x04
+#define PALMAS_GPADC_SW_SELECT_SW_CONV0_SEL_MASK 0x0F
+#define PALMAS_GPADC_SW_SELECT_SW_CONV0_SEL_SHIFT 0x00
/* Bit definitions for GPADC_SW_CONV0_LSB */
-#define PALMAS_GPADC_SW_CONV0_LSB_SW_CONV0_LSB_MASK 0xff
-#define PALMAS_GPADC_SW_CONV0_LSB_SW_CONV0_LSB_SHIFT 0
+#define PALMAS_GPADC_SW_CONV0_LSB_SW_CONV0_LSB_MASK 0xFF
+#define PALMAS_GPADC_SW_CONV0_LSB_SW_CONV0_LSB_SHIFT 0x00
/* Bit definitions for GPADC_SW_CONV0_MSB */
-#define PALMAS_GPADC_SW_CONV0_MSB_SW_CONV0_MSB_MASK 0x0f
-#define PALMAS_GPADC_SW_CONV0_MSB_SW_CONV0_MSB_SHIFT 0
+#define PALMAS_GPADC_SW_CONV0_MSB_SW_CONV0_MSB_MASK 0x0F
+#define PALMAS_GPADC_SW_CONV0_MSB_SW_CONV0_MSB_SHIFT 0x00
/* Bit definitions for GPADC_THRES_CONV0_LSB */
-#define PALMAS_GPADC_THRES_CONV0_LSB_THRES_CONV0_LSB_MASK 0xff
-#define PALMAS_GPADC_THRES_CONV0_LSB_THRES_CONV0_LSB_SHIFT 0
+#define PALMAS_GPADC_THRES_CONV0_LSB_THRES_CONV0_LSB_MASK 0xFF
+#define PALMAS_GPADC_THRES_CONV0_LSB_THRES_CONV0_LSB_SHIFT 0x00
/* Bit definitions for GPADC_THRES_CONV0_MSB */
#define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_POL 0x80
-#define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_POL_SHIFT 7
-#define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_MSB_MASK 0x0f
-#define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_MSB_SHIFT 0
+#define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_POL_SHIFT 0x07
+#define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_MSB_MASK 0x0F
+#define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_MSB_SHIFT 0x00
/* Bit definitions for GPADC_THRES_CONV1_LSB */
-#define PALMAS_GPADC_THRES_CONV1_LSB_THRES_CONV1_LSB_MASK 0xff
-#define PALMAS_GPADC_THRES_CONV1_LSB_THRES_CONV1_LSB_SHIFT 0
+#define PALMAS_GPADC_THRES_CONV1_LSB_THRES_CONV1_LSB_MASK 0xFF
+#define PALMAS_GPADC_THRES_CONV1_LSB_THRES_CONV1_LSB_SHIFT 0x00
/* Bit definitions for GPADC_THRES_CONV1_MSB */
#define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_POL 0x80
-#define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_POL_SHIFT 7
-#define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_MSB_MASK 0x0f
-#define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_MSB_SHIFT 0
+#define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_POL_SHIFT 0x07
+#define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_MSB_MASK 0x0F
+#define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_MSB_SHIFT 0x00
/* Bit definitions for GPADC_SMPS_ILMONITOR_EN */
#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_EN 0x20
-#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_EN_SHIFT 5
+#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_EN_SHIFT 0x05
#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_REXT 0x10
-#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_REXT_SHIFT 4
-#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_SEL_MASK 0x0f
-#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_SEL_SHIFT 0
+#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_REXT_SHIFT 0x04
+#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_SEL_MASK 0x0F
+#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_SEL_SHIFT 0x00
/* Bit definitions for GPADC_SMPS_VSEL_MONITORING */
#define PALMAS_GPADC_SMPS_VSEL_MONITORING_ACTIVE_PHASE 0x80
-#define PALMAS_GPADC_SMPS_VSEL_MONITORING_ACTIVE_PHASE_SHIFT 7
-#define PALMAS_GPADC_SMPS_VSEL_MONITORING_SMPS_VSEL_MONITORING_MASK 0x7f
-#define PALMAS_GPADC_SMPS_VSEL_MONITORING_SMPS_VSEL_MONITORING_SHIFT 0
+#define PALMAS_GPADC_SMPS_VSEL_MONITORING_ACTIVE_PHASE_SHIFT 0x07
+#define PALMAS_GPADC_SMPS_VSEL_MONITORING_SMPS_VSEL_MONITORING_MASK 0x7F
+#define PALMAS_GPADC_SMPS_VSEL_MONITORING_SMPS_VSEL_MONITORING_SHIFT 0x00
/* Registers for function GPADC */
-#define PALMAS_GPADC_TRIM1 0x0
-#define PALMAS_GPADC_TRIM2 0x1
-#define PALMAS_GPADC_TRIM3 0x2
-#define PALMAS_GPADC_TRIM4 0x3
-#define PALMAS_GPADC_TRIM5 0x4
-#define PALMAS_GPADC_TRIM6 0x5
-#define PALMAS_GPADC_TRIM7 0x6
-#define PALMAS_GPADC_TRIM8 0x7
-#define PALMAS_GPADC_TRIM9 0x8
-#define PALMAS_GPADC_TRIM10 0x9
-#define PALMAS_GPADC_TRIM11 0xA
-#define PALMAS_GPADC_TRIM12 0xB
-#define PALMAS_GPADC_TRIM13 0xC
-#define PALMAS_GPADC_TRIM14 0xD
-#define PALMAS_GPADC_TRIM15 0xE
-#define PALMAS_GPADC_TRIM16 0xF
+#define PALMAS_GPADC_TRIM1 0x00
+#define PALMAS_GPADC_TRIM2 0x01
+#define PALMAS_GPADC_TRIM3 0x02
+#define PALMAS_GPADC_TRIM4 0x03
+#define PALMAS_GPADC_TRIM5 0x04
+#define PALMAS_GPADC_TRIM6 0x05
+#define PALMAS_GPADC_TRIM7 0x06
+#define PALMAS_GPADC_TRIM8 0x07
+#define PALMAS_GPADC_TRIM9 0x08
+#define PALMAS_GPADC_TRIM10 0x09
+#define PALMAS_GPADC_TRIM11 0x0A
+#define PALMAS_GPADC_TRIM12 0x0B
+#define PALMAS_GPADC_TRIM13 0x0C
+#define PALMAS_GPADC_TRIM14 0x0D
+#define PALMAS_GPADC_TRIM15 0x0E
+#define PALMAS_GPADC_TRIM16 0x0F
static inline int palmas_read(struct palmas *palmas, unsigned int base,
unsigned int reg, unsigned int *val)
{
- unsigned int addr = PALMAS_BASE_TO_REG(base, reg);
+ unsigned int addr = PALMAS_BASE_TO_REG(base, reg);
int slave_id = PALMAS_BASE_TO_SLAVE(base);
return regmap_read(palmas->regmap[slave_id], addr, val);
diff --git a/include/linux/mfd/pm8xxx/core.h b/include/linux/mfd/pm8xxx/core.h
deleted file mode 100644
index bd2f4f64e931..000000000000
--- a/include/linux/mfd/pm8xxx/core.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-/*
- * Qualcomm PMIC 8xxx driver header file
- *
- */
-
-#ifndef __MFD_PM8XXX_CORE_H
-#define __MFD_PM8XXX_CORE_H
-
-#include <linux/mfd/core.h>
-
-struct pm8xxx_drvdata {
- int (*pmic_readb) (const struct device *dev, u16 addr, u8 *val);
- int (*pmic_writeb) (const struct device *dev, u16 addr, u8 val);
- int (*pmic_read_buf) (const struct device *dev, u16 addr, u8 *buf,
- int n);
- int (*pmic_write_buf) (const struct device *dev, u16 addr, u8 *buf,
- int n);
- int (*pmic_read_irq_stat) (const struct device *dev, int irq);
- void *pm_chip_data;
-};
-
-static inline int pm8xxx_readb(const struct device *dev, u16 addr, u8 *val)
-{
- struct pm8xxx_drvdata *dd = dev_get_drvdata(dev);
-
- if (!dd)
- return -EINVAL;
- return dd->pmic_readb(dev, addr, val);
-}
-
-static inline int pm8xxx_writeb(const struct device *dev, u16 addr, u8 val)
-{
- struct pm8xxx_drvdata *dd = dev_get_drvdata(dev);
-
- if (!dd)
- return -EINVAL;
- return dd->pmic_writeb(dev, addr, val);
-}
-
-static inline int pm8xxx_read_buf(const struct device *dev, u16 addr, u8 *buf,
- int n)
-{
- struct pm8xxx_drvdata *dd = dev_get_drvdata(dev);
-
- if (!dd)
- return -EINVAL;
- return dd->pmic_read_buf(dev, addr, buf, n);
-}
-
-static inline int pm8xxx_write_buf(const struct device *dev, u16 addr, u8 *buf,
- int n)
-{
- struct pm8xxx_drvdata *dd = dev_get_drvdata(dev);
-
- if (!dd)
- return -EINVAL;
- return dd->pmic_write_buf(dev, addr, buf, n);
-}
-
-static inline int pm8xxx_read_irq_stat(const struct device *dev, int irq)
-{
- struct pm8xxx_drvdata *dd = dev_get_drvdata(dev);
-
- if (!dd)
- return -EINVAL;
- return dd->pmic_read_irq_stat(dev, irq);
-}
-
-#endif
diff --git a/include/linux/mfd/rdc321x.h b/include/linux/mfd/rdc321x.h
index 4bdf19c8eedf..442743a8f915 100644
--- a/include/linux/mfd/rdc321x.h
+++ b/include/linux/mfd/rdc321x.h
@@ -12,7 +12,7 @@
#define RDC321X_GPIO_CTRL_REG2 0x84
#define RDC321X_GPIO_DATA_REG2 0x88
-#define RDC321X_MAX_GPIO 58
+#define RDC321X_NUM_GPIO 59
struct rdc321x_gpio_pdata {
struct pci_dev *sb_pdev;
diff --git a/include/linux/mfd/rtsx_common.h b/include/linux/mfd/rtsx_common.h
index 7c36cc55d2c7..443176ee1ab0 100644
--- a/include/linux/mfd/rtsx_common.h
+++ b/include/linux/mfd/rtsx_common.h
@@ -45,7 +45,6 @@ struct platform_device;
struct rtsx_slot {
struct platform_device *p_dev;
void (*card_event)(struct platform_device *p_dev);
- void (*done_transfer)(struct platform_device *p_dev);
};
#endif
diff --git a/include/linux/mfd/rtsx_pci.h b/include/linux/mfd/rtsx_pci.h
index 8d6bbd609ad9..a3835976f7c6 100644
--- a/include/linux/mfd/rtsx_pci.h
+++ b/include/linux/mfd/rtsx_pci.h
@@ -943,12 +943,6 @@ void rtsx_pci_send_cmd_no_wait(struct rtsx_pcr *pcr);
int rtsx_pci_send_cmd(struct rtsx_pcr *pcr, int timeout);
int rtsx_pci_transfer_data(struct rtsx_pcr *pcr, struct scatterlist *sglist,
int num_sg, bool read, int timeout);
-int rtsx_pci_dma_map_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist,
- int num_sg, bool read);
-int rtsx_pci_dma_unmap_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist,
- int num_sg, bool read);
-int rtsx_pci_dma_transfer(struct rtsx_pcr *pcr, struct scatterlist *sglist,
- int sg_count, bool read);
int rtsx_pci_read_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len);
int rtsx_pci_write_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len);
int rtsx_pci_card_pull_ctl_enable(struct rtsx_pcr *pcr, int card);
diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/core.h
index 157e32b6ca28..47d84242940b 100644
--- a/include/linux/mfd/samsung/core.h
+++ b/include/linux/mfd/samsung/core.h
@@ -24,35 +24,36 @@ enum sec_device_type {
};
/**
- * struct sec_pmic_dev - s5m87xx master device for sub-drivers
- * @dev: master device of the chip (can be used to access platform data)
- * @pdata: pointer to private data used to pass platform data to child
- * @i2c: i2c client private data for regulator
- * @rtc: i2c client private data for rtc
- * @iolock: mutex for serializing io access
- * @irqlock: mutex for buslock
- * @irq_base: base IRQ number for sec-pmic, required for IRQs
- * @irq: generic IRQ number for s5m87xx
- * @ono: power onoff IRQ number for s5m87xx
- * @irq_masks_cur: currently active value
- * @irq_masks_cache: cached hardware value
- * @type: indicate which s5m87xx "variant" is used
+ * struct sec_pmic_dev - s2m/s5m master device for sub-drivers
+ * @dev: Master device of the chip
+ * @pdata: Platform data populated with data from DTS
+ * or board files
+ * @regmap_pmic: Regmap associated with PMIC's I2C address
+ * @i2c: I2C client of the main driver
+ * @device_type: Type of device, matches enum sec_device_type
+ * @irq_base: Base IRQ number for device, required for IRQs
+ * @irq: Generic IRQ number for device
+ * @irq_data: Runtime data structure for IRQ controller
+ * @ono: Power onoff IRQ number for s5m87xx
+ * @wakeup: Whether or not this is a wakeup device
+ * @wtsr_smpl: Whether or not to enable in RTC driver the Watchdog
+ * Timer Software Reset (registers set to default value
+ * after PWRHOLD falling) and Sudden Momentary Power Loss
+ * (PMIC will enter power on sequence after short drop in
+ * VBATT voltage).
*/
struct sec_pmic_dev {
struct device *dev;
struct sec_platform_data *pdata;
struct regmap *regmap_pmic;
- struct regmap *regmap_rtc;
struct i2c_client *i2c;
- struct i2c_client *rtc;
- int device_type;
+ unsigned long device_type;
int irq_base;
int irq;
struct regmap_irq_chip_data *irq_data;
int ono;
- unsigned long type;
bool wakeup;
bool wtsr_smpl;
};
diff --git a/include/linux/mfd/samsung/rtc.h b/include/linux/mfd/samsung/rtc.h
index 3e02b768d537..b6401e7661c7 100644
--- a/include/linux/mfd/samsung/rtc.h
+++ b/include/linux/mfd/samsung/rtc.h
@@ -18,38 +18,38 @@
#ifndef __LINUX_MFD_SEC_RTC_H
#define __LINUX_MFD_SEC_RTC_H
-enum sec_rtc_reg {
- SEC_RTC_SEC,
- SEC_RTC_MIN,
- SEC_RTC_HOUR,
- SEC_RTC_WEEKDAY,
- SEC_RTC_DATE,
- SEC_RTC_MONTH,
- SEC_RTC_YEAR1,
- SEC_RTC_YEAR2,
- SEC_ALARM0_SEC,
- SEC_ALARM0_MIN,
- SEC_ALARM0_HOUR,
- SEC_ALARM0_WEEKDAY,
- SEC_ALARM0_DATE,
- SEC_ALARM0_MONTH,
- SEC_ALARM0_YEAR1,
- SEC_ALARM0_YEAR2,
- SEC_ALARM1_SEC,
- SEC_ALARM1_MIN,
- SEC_ALARM1_HOUR,
- SEC_ALARM1_WEEKDAY,
- SEC_ALARM1_DATE,
- SEC_ALARM1_MONTH,
- SEC_ALARM1_YEAR1,
- SEC_ALARM1_YEAR2,
- SEC_ALARM0_CONF,
- SEC_ALARM1_CONF,
- SEC_RTC_STATUS,
- SEC_WTSR_SMPL_CNTL,
- SEC_RTC_UDR_CON,
+enum s5m_rtc_reg {
+ S5M_RTC_SEC,
+ S5M_RTC_MIN,
+ S5M_RTC_HOUR,
+ S5M_RTC_WEEKDAY,
+ S5M_RTC_DATE,
+ S5M_RTC_MONTH,
+ S5M_RTC_YEAR1,
+ S5M_RTC_YEAR2,
+ S5M_ALARM0_SEC,
+ S5M_ALARM0_MIN,
+ S5M_ALARM0_HOUR,
+ S5M_ALARM0_WEEKDAY,
+ S5M_ALARM0_DATE,
+ S5M_ALARM0_MONTH,
+ S5M_ALARM0_YEAR1,
+ S5M_ALARM0_YEAR2,
+ S5M_ALARM1_SEC,
+ S5M_ALARM1_MIN,
+ S5M_ALARM1_HOUR,
+ S5M_ALARM1_WEEKDAY,
+ S5M_ALARM1_DATE,
+ S5M_ALARM1_MONTH,
+ S5M_ALARM1_YEAR1,
+ S5M_ALARM1_YEAR2,
+ S5M_ALARM0_CONF,
+ S5M_ALARM1_CONF,
+ S5M_RTC_STATUS,
+ S5M_WTSR_SMPL_CNTL,
+ S5M_RTC_UDR_CON,
- SEC_RTC_REG_MAX,
+ S5M_RTC_REG_MAX,
};
enum s2mps_rtc_reg {
@@ -88,9 +88,9 @@ enum s2mps_rtc_reg {
#define HOUR_12 (1 << 7)
#define HOUR_AMPM (1 << 6)
#define HOUR_PM (1 << 5)
-#define ALARM0_STATUS (1 << 1)
-#define ALARM1_STATUS (1 << 2)
-#define UPDATE_AD (1 << 0)
+#define S5M_ALARM0_STATUS (1 << 1)
+#define S5M_ALARM1_STATUS (1 << 2)
+#define S5M_UPDATE_AD (1 << 0)
#define S2MPS_ALARM0_STATUS (1 << 2)
#define S2MPS_ALARM1_STATUS (1 << 1)
@@ -101,16 +101,26 @@ enum s2mps_rtc_reg {
#define MODEL24_SHIFT 1
#define MODEL24_MASK (1 << MODEL24_SHIFT)
/* RTC Update Register1 */
-#define RTC_UDR_SHIFT 0
-#define RTC_UDR_MASK (1 << RTC_UDR_SHIFT)
+#define S5M_RTC_UDR_SHIFT 0
+#define S5M_RTC_UDR_MASK (1 << S5M_RTC_UDR_SHIFT)
#define S2MPS_RTC_WUDR_SHIFT 4
#define S2MPS_RTC_WUDR_MASK (1 << S2MPS_RTC_WUDR_SHIFT)
#define S2MPS_RTC_RUDR_SHIFT 0
#define S2MPS_RTC_RUDR_MASK (1 << S2MPS_RTC_RUDR_SHIFT)
#define RTC_TCON_SHIFT 1
#define RTC_TCON_MASK (1 << RTC_TCON_SHIFT)
-#define RTC_TIME_EN_SHIFT 3
-#define RTC_TIME_EN_MASK (1 << RTC_TIME_EN_SHIFT)
+#define S5M_RTC_TIME_EN_SHIFT 3
+#define S5M_RTC_TIME_EN_MASK (1 << S5M_RTC_TIME_EN_SHIFT)
+/*
+ * UDR_T field in S5M_RTC_UDR_CON register determines the time needed
+ * for updating alarm and time registers. Default is 7.32 ms.
+ */
+#define S5M_RTC_UDR_T_SHIFT 6
+#define S5M_RTC_UDR_T_MASK (0x3 << S5M_RTC_UDR_T_SHIFT)
+#define S5M_RTC_UDR_T_7320_US (0x0 << S5M_RTC_UDR_T_SHIFT)
+#define S5M_RTC_UDR_T_1830_US (0x1 << S5M_RTC_UDR_T_SHIFT)
+#define S5M_RTC_UDR_T_3660_US (0x2 << S5M_RTC_UDR_T_SHIFT)
+#define S5M_RTC_UDR_T_450_US (0x3 << S5M_RTC_UDR_T_SHIFT)
/* RTC Hour register */
#define HOUR_PM_SHIFT 6
diff --git a/include/linux/mfd/samsung/s2mps14.h b/include/linux/mfd/samsung/s2mps14.h
index 4b449b8ac548..900cd7a04314 100644
--- a/include/linux/mfd/samsung/s2mps14.h
+++ b/include/linux/mfd/samsung/s2mps14.h
@@ -148,6 +148,8 @@ enum s2mps14_regulators {
#define S2MPS14_ENABLE_SHIFT 6
/* On/Off controlled by PWREN */
#define S2MPS14_ENABLE_SUSPEND (0x01 << S2MPS14_ENABLE_SHIFT)
+/* On/Off controlled by LDO10EN or EMMCEN */
+#define S2MPS14_ENABLE_EXT_CONTROL (0x00 << S2MPS14_ENABLE_SHIFT)
#define S2MPS14_LDO_N_VOLTAGES (S2MPS14_LDO_VSEL_MASK + 1)
#define S2MPS14_BUCK_N_VOLTAGES (S2MPS14_BUCK_VSEL_MASK + 1)
diff --git a/include/linux/mfd/stmpe.h b/include/linux/mfd/stmpe.h
index 48395a69a7e9..575a86c7fcbd 100644
--- a/include/linux/mfd/stmpe.h
+++ b/include/linux/mfd/stmpe.h
@@ -11,6 +11,7 @@
#include <linux/mutex.h>
struct device;
+struct regulator;
enum stmpe_block {
STMPE_BLOCK_GPIO = 1 << 0,
@@ -62,6 +63,8 @@ struct stmpe_client_info;
/**
* struct stmpe - STMPE MFD structure
+ * @vcc: optional VCC regulator
+ * @vio: optional VIO regulator
* @lock: lock protecting I/O operations
* @irq_lock: IRQ bus lock
* @dev: device, mostly for dev_dbg()
@@ -73,13 +76,14 @@ struct stmpe_client_info;
* @regs: list of addresses of registers which are at different addresses on
* different variants. Indexed by one of STMPE_IDX_*.
* @irq: irq number for stmpe
- * @irq_base: starting IRQ number for internal IRQs
* @num_gpios: number of gpios, differs for variants
* @ier: cache of IER registers for bus_lock
* @oldier: cache of IER registers for bus_lock
* @pdata: platform data
*/
struct stmpe {
+ struct regulator *vcc;
+ struct regulator *vio;
struct mutex lock;
struct mutex irq_lock;
struct device *dev;
@@ -91,7 +95,6 @@ struct stmpe {
const u8 *regs;
int irq;
- int irq_base;
int num_gpios;
u8 ier[2];
u8 oldier[2];
@@ -132,8 +135,6 @@ struct stmpe_keypad_platform_data {
/**
* struct stmpe_gpio_platform_data - STMPE GPIO platform data
- * @gpio_base: first gpio number assigned. A maximum of
- * %STMPE_NR_GPIOS GPIOs will be allocated.
* @norequest_mask: bitmask specifying which GPIOs should _not_ be
* requestable due to different usage (e.g. touch, keypad)
* STMPE_GPIO_NOREQ_* macros can be used here.
@@ -141,7 +142,6 @@ struct stmpe_keypad_platform_data {
* @remove: board specific remove callback
*/
struct stmpe_gpio_platform_data {
- int gpio_base;
unsigned norequest_mask;
void (*setup)(struct stmpe *stmpe, unsigned gpio_base);
void (*remove)(struct stmpe *stmpe, unsigned gpio_base);
@@ -195,8 +195,6 @@ struct stmpe_ts_platform_data {
* @irq_trigger: IRQ trigger to use for the interrupt to the host
* @autosleep: bool to enable/disable stmpe autosleep
* @autosleep_timeout: inactivity timeout in milliseconds for autosleep
- * @irq_base: base IRQ number. %STMPE_NR_IRQS irqs will be used, or
- * %STMPE_NR_INTERNAL_IRQS if the GPIO driver is not used.
* @irq_over_gpio: true if gpio is used to get irq
* @irq_gpio: gpio number over which irq will be requested (significant only if
* irq_over_gpio is true)
@@ -207,7 +205,6 @@ struct stmpe_ts_platform_data {
struct stmpe_platform_data {
int id;
unsigned int blocks;
- int irq_base;
unsigned int irq_trigger;
bool autosleep;
bool irq_over_gpio;
@@ -219,10 +216,4 @@ struct stmpe_platform_data {
struct stmpe_ts_platform_data *ts;
};
-#define STMPE_NR_INTERNAL_IRQS 9
-#define STMPE_INT_GPIO(x) (STMPE_NR_INTERNAL_IRQS + (x))
-
-#define STMPE_NR_GPIOS 24
-#define STMPE_NR_IRQS STMPE_INT_GPIO(STMPE_NR_GPIOS)
-
#endif
diff --git a/include/linux/mfd/syscon.h b/include/linux/mfd/syscon.h
index 8789fa3c7fd9..75e543b78f53 100644
--- a/include/linux/mfd/syscon.h
+++ b/include/linux/mfd/syscon.h
@@ -15,6 +15,8 @@
#ifndef __LINUX_MFD_SYSCON_H__
#define __LINUX_MFD_SYSCON_H__
+#include <linux/err.h>
+
struct device_node;
#ifdef CONFIG_MFD_SYSCON
diff --git a/include/linux/mfd/syscon/exynos5-pmu.h b/include/linux/mfd/syscon/exynos5-pmu.h
new file mode 100644
index 000000000000..00ef24bf6ede
--- /dev/null
+++ b/include/linux/mfd/syscon/exynos5-pmu.h
@@ -0,0 +1,44 @@
+/*
+ * Exynos5 SoC series Power Management Unit (PMU) register offsets
+ * and bit definitions.
+ *
+ * Copyright (C) 2014 Samsung Electronics Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_
+#define _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_
+
+/* Exynos5 PMU register definitions */
+#define EXYNOS5_HDMI_PHY_CONTROL (0x700)
+#define EXYNOS5_USBDRD_PHY_CONTROL (0x704)
+
+/* Exynos5250 specific register definitions */
+#define EXYNOS5_USBHOST_PHY_CONTROL (0x708)
+#define EXYNOS5_EFNAND_PHY_CONTROL (0x70c)
+#define EXYNOS5_MIPI_PHY0_CONTROL (0x710)
+#define EXYNOS5_MIPI_PHY1_CONTROL (0x714)
+#define EXYNOS5_ADC_PHY_CONTROL (0x718)
+#define EXYNOS5_MTCADC_PHY_CONTROL (0x71c)
+#define EXYNOS5_DPTX_PHY_CONTROL (0x720)
+#define EXYNOS5_SATA_PHY_CONTROL (0x724)
+
+/* Exynos5420 specific register definitions */
+#define EXYNOS5420_USBDRD1_PHY_CONTROL (0x708)
+#define EXYNOS5420_USBHOST_PHY_CONTROL (0x70c)
+#define EXYNOS5420_MIPI_PHY0_CONTROL (0x714)
+#define EXYNOS5420_MIPI_PHY1_CONTROL (0x718)
+#define EXYNOS5420_MIPI_PHY2_CONTROL (0x71c)
+#define EXYNOS5420_ADC_PHY_CONTROL (0x720)
+#define EXYNOS5420_MTCADC_PHY_CONTROL (0x724)
+#define EXYNOS5420_DPTX_PHY_CONTROL (0x728)
+
+#define EXYNOS5_PHY_ENABLE BIT(0)
+
+#define EXYNOS5_MIPI_PHY_S_RESETN BIT(1)
+#define EXYNOS5_MIPI_PHY_M_RESETN BIT(2)
+
+#endif /* _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_ */
diff --git a/include/linux/mfd/tc3589x.h b/include/linux/mfd/tc3589x.h
index 6b8e1ff4672b..e6088c2e2092 100644
--- a/include/linux/mfd/tc3589x.h
+++ b/include/linux/mfd/tc3589x.h
@@ -111,7 +111,6 @@ enum tx3589x_block {
#define TC3589x_INT_PORIRQ 7
#define TC3589x_NR_INTERNAL_IRQS 8
-#define TC3589x_INT_GPIO(x) (TC3589x_NR_INTERNAL_IRQS + (x))
struct tc3589x {
struct mutex lock;
diff --git a/include/linux/mfd/tps65090.h b/include/linux/mfd/tps65090.h
index 3f43069413e7..0bf2708df150 100644
--- a/include/linux/mfd/tps65090.h
+++ b/include/linux/mfd/tps65090.h
@@ -64,6 +64,20 @@ enum {
TPS65090_REGULATOR_MAX,
};
+/* Register addresses */
+#define TPS65090_REG_INTR_STS 0x00
+#define TPS65090_REG_INTR_STS2 0x01
+#define TPS65090_REG_INTR_MASK 0x02
+#define TPS65090_REG_INTR_MASK2 0x03
+#define TPS65090_REG_CG_CTRL0 0x04
+#define TPS65090_REG_CG_CTRL1 0x05
+#define TPS65090_REG_CG_CTRL2 0x06
+#define TPS65090_REG_CG_CTRL3 0x07
+#define TPS65090_REG_CG_CTRL4 0x08
+#define TPS65090_REG_CG_CTRL5 0x09
+#define TPS65090_REG_CG_STATUS1 0x0a
+#define TPS65090_REG_CG_STATUS2 0x0b
+
struct tps65090 {
struct device *dev;
struct regmap *rmap;
@@ -78,11 +92,16 @@ struct tps65090 {
* DCDC1, DCDC2 and DCDC3.
* @gpio: Gpio number if external control is enabled and controlled through
* gpio.
+ * @overcurrent_wait_valid: True if the overcurrent_wait should be applied.
+ * @overcurrent_wait: Value to set as the overcurrent wait time. This is the
+ * actual bitfield value, not a time in ms (valid value are 0 - 3).
*/
struct tps65090_regulator_plat_data {
struct regulator_init_data *reg_init_data;
bool enable_ext_control;
int gpio;
+ bool overcurrent_wait_valid;
+ int overcurrent_wait;
};
struct tps65090_platform_data {
diff --git a/include/linux/mfd/tps65217.h b/include/linux/mfd/tps65217.h
index 54b5458ec084..95d6938737fd 100644
--- a/include/linux/mfd/tps65217.h
+++ b/include/linux/mfd/tps65217.h
@@ -254,7 +254,6 @@ struct tps65217 {
struct tps65217_board *pdata;
unsigned long id;
struct regulator_desc desc[TPS65217_NUM_REGULATOR];
- struct regulator_dev *rdev[TPS65217_NUM_REGULATOR];
struct regmap *regmap;
};
diff --git a/include/linux/mfd/tps65218.h b/include/linux/mfd/tps65218.h
index d2e357df5a0e..2f9b593246ee 100644
--- a/include/linux/mfd/tps65218.h
+++ b/include/linux/mfd/tps65218.h
@@ -267,7 +267,6 @@ struct tps65218 {
u32 irq_mask;
struct regmap_irq_chip_data *irq_data;
struct regulator_desc desc[TPS65218_NUM_REGULATOR];
- struct regulator_dev *rdev[TPS65218_NUM_REGULATOR];
struct tps_info *info[TPS65218_NUM_REGULATOR];
struct regmap *regmap;
};
diff --git a/include/linux/mfd/tps6586x.h b/include/linux/mfd/tps6586x.h
index cbecec2e353a..96187ed9f9bb 100644
--- a/include/linux/mfd/tps6586x.h
+++ b/include/linux/mfd/tps6586x.h
@@ -17,6 +17,8 @@
#define TPS658621A 0x15
#define TPS658621CD 0x2c
#define TPS658623 0x1b
+#define TPS658640 0x01
+#define TPS658640v2 0x02
#define TPS658643 0x03
enum {
diff --git a/include/linux/mfd/twl6040.h b/include/linux/mfd/twl6040.h
index 81f639bc1ae6..8f9fc3d26e6d 100644
--- a/include/linux/mfd/twl6040.h
+++ b/include/linux/mfd/twl6040.h
@@ -28,6 +28,7 @@
#include <linux/interrupt.h>
#include <linux/mfd/core.h>
#include <linux/regulator/consumer.h>
+#include <linux/clk.h>
#define TWL6040_REG_ASICID 0x01
#define TWL6040_REG_ASICREV 0x02
@@ -157,6 +158,7 @@
#define TWL6040_I2CSEL 0x01
#define TWL6040_RESETSPLIT 0x04
#define TWL6040_INTCLRMODE 0x08
+#define TWL6040_I2CMODE(x) ((x & 0x3) << 4)
/* STATUS (0x2E) fields */
@@ -222,6 +224,7 @@ struct twl6040 {
struct regmap *regmap;
struct regmap_irq_chip_data *irq_data;
struct regulator_bulk_data supplies[2]; /* supplies for vio, v2v1 */
+ struct clk *clk32k;
struct mutex mutex;
struct mutex irq_mutex;
struct mfd_cell cells[TWL6040_CELLS];
diff --git a/include/linux/migrate.h b/include/linux/migrate.h
index 84a31ad0b791..a2901c414664 100644
--- a/include/linux/migrate.h
+++ b/include/linux/migrate.h
@@ -5,7 +5,9 @@
#include <linux/mempolicy.h>
#include <linux/migrate_mode.h>
-typedef struct page *new_page_t(struct page *, unsigned long private, int **);
+typedef struct page *new_page_t(struct page *page, unsigned long private,
+ int **reason);
+typedef void free_page_t(struct page *page, unsigned long private);
/*
* Return values from addresss_space_operations.migratepage():
@@ -38,7 +40,7 @@ enum migrate_reason {
extern void putback_movable_pages(struct list_head *l);
extern int migrate_page(struct address_space *,
struct page *, struct page *, enum migrate_mode);
-extern int migrate_pages(struct list_head *l, new_page_t x,
+extern int migrate_pages(struct list_head *l, new_page_t new, free_page_t free,
unsigned long private, enum migrate_mode mode, int reason);
extern int migrate_prep(void);
@@ -56,8 +58,9 @@ extern int migrate_page_move_mapping(struct address_space *mapping,
#else
static inline void putback_movable_pages(struct list_head *l) {}
-static inline int migrate_pages(struct list_head *l, new_page_t x,
- unsigned long private, enum migrate_mode mode, int reason)
+static inline int migrate_pages(struct list_head *l, new_page_t new,
+ free_page_t free, unsigned long private, enum migrate_mode mode,
+ int reason)
{ return -ENOSYS; }
static inline int migrate_prep(void) { return -ENOSYS; }
diff --git a/include/linux/miscdevice.h b/include/linux/miscdevice.h
index 51e26f3cd3b3..ee80dd7d9f60 100644
--- a/include/linux/miscdevice.h
+++ b/include/linux/miscdevice.h
@@ -64,7 +64,7 @@ struct miscdevice {
umode_t mode;
};
-extern int misc_register(struct miscdevice * misc);
+extern int misc_register(struct miscdevice *misc);
extern int misc_deregister(struct miscdevice *misc);
#define MODULE_ALIAS_MISCDEV(minor) \
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h
index ba87bd21295a..3447bead9620 100644
--- a/include/linux/mlx4/device.h
+++ b/include/linux/mlx4/device.h
@@ -401,6 +401,7 @@ struct mlx4_caps {
int max_rq_desc_sz;
int max_qp_init_rdma;
int max_qp_dest_rdma;
+ u32 *qp0_qkey;
u32 *qp0_proxy;
u32 *qp1_proxy;
u32 *qp0_tunnel;
@@ -837,7 +838,7 @@ static inline int mlx4_is_slave(struct mlx4_dev *dev)
}
int mlx4_buf_alloc(struct mlx4_dev *dev, int size, int max_direct,
- struct mlx4_buf *buf);
+ struct mlx4_buf *buf, gfp_t gfp);
void mlx4_buf_free(struct mlx4_dev *dev, int size, struct mlx4_buf *buf);
static inline void *mlx4_buf_offset(struct mlx4_buf *buf, int offset)
{
@@ -874,9 +875,10 @@ int mlx4_mw_enable(struct mlx4_dev *dev, struct mlx4_mw *mw);
int mlx4_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt,
int start_index, int npages, u64 *page_list);
int mlx4_buf_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt,
- struct mlx4_buf *buf);
+ struct mlx4_buf *buf, gfp_t gfp);
-int mlx4_db_alloc(struct mlx4_dev *dev, struct mlx4_db *db, int order);
+int mlx4_db_alloc(struct mlx4_dev *dev, struct mlx4_db *db, int order,
+ gfp_t gfp);
void mlx4_db_free(struct mlx4_dev *dev, struct mlx4_db *db);
int mlx4_alloc_hwq_res(struct mlx4_dev *dev, struct mlx4_hwq_resources *wqres,
@@ -892,7 +894,8 @@ void mlx4_cq_free(struct mlx4_dev *dev, struct mlx4_cq *cq);
int mlx4_qp_reserve_range(struct mlx4_dev *dev, int cnt, int align, int *base);
void mlx4_qp_release_range(struct mlx4_dev *dev, int base_qpn, int cnt);
-int mlx4_qp_alloc(struct mlx4_dev *dev, int qpn, struct mlx4_qp *qp);
+int mlx4_qp_alloc(struct mlx4_dev *dev, int qpn, struct mlx4_qp *qp,
+ gfp_t gfp);
void mlx4_qp_free(struct mlx4_dev *dev, struct mlx4_qp *qp);
int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, u32 cqn, u16 xrcdn,
@@ -1234,4 +1237,8 @@ int mlx4_phys_to_slave_port(struct mlx4_dev *dev, int slave, int port);
int mlx4_get_base_gid_ix(struct mlx4_dev *dev, int slave, int port);
int mlx4_config_vxlan_port(struct mlx4_dev *dev, __be16 udp_port);
+int mlx4_vf_smi_enabled(struct mlx4_dev *dev, int slave, int port);
+int mlx4_vf_get_enable_smi_admin(struct mlx4_dev *dev, int slave, int port);
+int mlx4_vf_set_enable_smi_admin(struct mlx4_dev *dev, int slave, int port,
+ int enable);
#endif /* MLX4_DEVICE_H */
diff --git a/include/linux/mlx4/qp.h b/include/linux/mlx4/qp.h
index b66e7610d4ee..7040dc98ff8b 100644
--- a/include/linux/mlx4/qp.h
+++ b/include/linux/mlx4/qp.h
@@ -421,6 +421,17 @@ struct mlx4_wqe_inline_seg {
__be32 byte_count;
};
+enum mlx4_update_qp_attr {
+ MLX4_UPDATE_QP_SMAC = 1 << 0,
+};
+
+struct mlx4_update_qp_params {
+ u8 smac_index;
+};
+
+int mlx4_update_qp(struct mlx4_dev *dev, struct mlx4_qp *qp,
+ enum mlx4_update_qp_attr attr,
+ struct mlx4_update_qp_params *params);
int mlx4_qp_modify(struct mlx4_dev *dev, struct mlx4_mtt *mtt,
enum mlx4_qp_state cur_state, enum mlx4_qp_state new_state,
struct mlx4_qp_context *context, enum mlx4_qp_optpar optpar,
diff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h
index 93cef6313e72..2bce4aad2570 100644
--- a/include/linux/mlx5/driver.h
+++ b/include/linux/mlx5/driver.h
@@ -427,7 +427,6 @@ struct mlx5_core_mr {
u64 size;
u32 key;
u32 pd;
- u32 access;
};
struct mlx5_core_srq {
diff --git a/include/linux/mm.h b/include/linux/mm.h
index bf9811e1321a..e03dd29145a0 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -239,6 +239,12 @@ struct vm_operations_struct {
*/
int (*access)(struct vm_area_struct *vma, unsigned long addr,
void *buf, int len, int write);
+
+ /* Called by the /proc/PID/maps code to ask the vma whether it
+ * has a special name. Returning non-NULL will also cause this
+ * vma to be dumped unconditionally. */
+ const char *(*name)(struct vm_area_struct *vma);
+
#ifdef CONFIG_NUMA
/*
* set_policy() op must add a reference to any non-NULL @new mempolicy
@@ -370,6 +376,8 @@ static inline int is_vmalloc_or_module_addr(const void *x)
}
#endif
+extern void kvfree(const void *addr);
+
static inline void compound_lock(struct page *page)
{
#ifdef CONFIG_TRANSPARENT_HUGEPAGE
@@ -405,20 +413,25 @@ static inline void compound_unlock_irqrestore(struct page *page,
#endif
}
+static inline struct page *compound_head_by_tail(struct page *tail)
+{
+ struct page *head = tail->first_page;
+
+ /*
+ * page->first_page may be a dangling pointer to an old
+ * compound page, so recheck that it is still a tail
+ * page before returning.
+ */
+ smp_rmb();
+ if (likely(PageTail(tail)))
+ return head;
+ return tail;
+}
+
static inline struct page *compound_head(struct page *page)
{
- if (unlikely(PageTail(page))) {
- struct page *head = page->first_page;
-
- /*
- * page->first_page may be a dangling pointer to an old
- * compound page, so recheck that it is still a tail
- * page before returning.
- */
- smp_rmb();
- if (likely(PageTail(page)))
- return head;
- }
+ if (unlikely(PageTail(page)))
+ return compound_head_by_tail(page);
return page;
}
@@ -1776,7 +1789,9 @@ extern struct file *get_mm_exe_file(struct mm_struct *mm);
extern int may_expand_vm(struct mm_struct *mm, unsigned long npages);
extern struct vm_area_struct *_install_special_mapping(struct mm_struct *mm,
unsigned long addr, unsigned long len,
- unsigned long flags, struct page **pages);
+ unsigned long flags,
+ const struct vm_special_mapping *spec);
+/* This is an obsolete alternative to _install_special_mapping. */
extern int install_special_mapping(struct mm_struct *mm,
unsigned long addr, unsigned long len,
unsigned long flags, struct page **pages);
diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h
index 8967e20cbe57..96c5750e3110 100644
--- a/include/linux/mm_types.h
+++ b/include/linux/mm_types.h
@@ -406,7 +406,7 @@ struct mm_struct {
spinlock_t ioctx_lock;
struct kioctx_table __rcu *ioctx_table;
#endif
-#ifdef CONFIG_MM_OWNER
+#ifdef CONFIG_MEMCG
/*
* "owner" points to a task that is regarded as the canonical
* user/owner of this mm. All of the following must be true in
@@ -510,4 +510,10 @@ static inline void clear_tlb_flush_pending(struct mm_struct *mm)
}
#endif
+struct vm_special_mapping
+{
+ const char *name;
+ struct page **pages;
+};
+
#endif /* _LINUX_MM_TYPES_H */
diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h
index b73027298b3a..d424b9de3aff 100644
--- a/include/linux/mmc/card.h
+++ b/include/linux/mmc/card.h
@@ -63,12 +63,12 @@ struct mmc_ext_csd {
unsigned int power_off_longtime; /* Units: ms */
u8 power_off_notification; /* state */
unsigned int hs_max_dtr;
+ unsigned int hs200_max_dtr;
#define MMC_HIGH_26_MAX_DTR 26000000
#define MMC_HIGH_52_MAX_DTR 52000000
#define MMC_HIGH_DDR_MAX_DTR 52000000
#define MMC_HS200_MAX_DTR 200000000
unsigned int sectors;
- unsigned int card_type;
unsigned int hc_erase_size; /* In sectors */
unsigned int hc_erase_timeout; /* In milliseconds */
unsigned int sec_trim_mult; /* Secure trim multiplier */
@@ -110,6 +110,7 @@ struct mmc_ext_csd {
u8 raw_pwr_cl_200_360; /* 237 */
u8 raw_pwr_cl_ddr_52_195; /* 238 */
u8 raw_pwr_cl_ddr_52_360; /* 239 */
+ u8 raw_pwr_cl_ddr_200_360; /* 253 */
u8 raw_bkops_status; /* 246 */
u8 raw_sectors[4]; /* 212 - 4 bytes */
@@ -194,6 +195,7 @@ struct sdio_cis {
};
struct mmc_host;
+struct mmc_ios;
struct sdio_func;
struct sdio_func_tuple;
@@ -250,15 +252,11 @@ struct mmc_card {
unsigned int state; /* (our) card state */
#define MMC_STATE_PRESENT (1<<0) /* present in sysfs */
#define MMC_STATE_READONLY (1<<1) /* card is read-only */
-#define MMC_STATE_HIGHSPEED (1<<2) /* card is in high speed mode */
-#define MMC_STATE_BLOCKADDR (1<<3) /* card uses block-addressing */
-#define MMC_STATE_HIGHSPEED_DDR (1<<4) /* card is in high speed mode */
-#define MMC_STATE_ULTRAHIGHSPEED (1<<5) /* card is in ultra high speed mode */
-#define MMC_CARD_SDXC (1<<6) /* card is SDXC */
-#define MMC_CARD_REMOVED (1<<7) /* card has been removed */
-#define MMC_STATE_HIGHSPEED_200 (1<<8) /* card is in HS200 mode */
-#define MMC_STATE_DOING_BKOPS (1<<10) /* card is doing BKOPS */
-#define MMC_STATE_SUSPENDED (1<<11) /* card is suspended */
+#define MMC_STATE_BLOCKADDR (1<<2) /* card uses block-addressing */
+#define MMC_CARD_SDXC (1<<3) /* card is SDXC */
+#define MMC_CARD_REMOVED (1<<4) /* card has been removed */
+#define MMC_STATE_DOING_BKOPS (1<<5) /* card is doing BKOPS */
+#define MMC_STATE_SUSPENDED (1<<6) /* card is suspended */
unsigned int quirks; /* card quirks */
#define MMC_QUIRK_LENIENT_FN0 (1<<0) /* allow SDIO FN0 writes outside of the VS CCCR range */
#define MMC_QUIRK_BLKSZ_FOR_BYTE_MODE (1<<1) /* use func->cur_blksize */
@@ -301,6 +299,7 @@ struct mmc_card {
struct sdio_func_tuple *tuples; /* unknown common tuples */
unsigned int sd_bus_speed; /* Bus Speed Mode set for the card */
+ unsigned int mmc_avail_type; /* supported device type by both host and card */
struct dentry *debugfs_root;
struct mmc_part part[MMC_NUM_PHY_PARTITION]; /* physical partitions */
@@ -353,7 +352,7 @@ struct mmc_fixup {
#define CID_OEMID_ANY ((unsigned short) -1)
#define CID_NAME_ANY (NULL)
-#define END_FIXUP { 0 }
+#define END_FIXUP { NULL }
#define _FIXUP_EXT(_name, _manfid, _oemid, _rev_start, _rev_end, \
_cis_vendor, _cis_device, \
@@ -418,11 +417,7 @@ static inline void __maybe_unused remove_quirk(struct mmc_card *card, int data)
#define mmc_card_present(c) ((c)->state & MMC_STATE_PRESENT)
#define mmc_card_readonly(c) ((c)->state & MMC_STATE_READONLY)
-#define mmc_card_highspeed(c) ((c)->state & MMC_STATE_HIGHSPEED)
-#define mmc_card_hs200(c) ((c)->state & MMC_STATE_HIGHSPEED_200)
#define mmc_card_blockaddr(c) ((c)->state & MMC_STATE_BLOCKADDR)
-#define mmc_card_ddr_mode(c) ((c)->state & MMC_STATE_HIGHSPEED_DDR)
-#define mmc_card_uhs(c) ((c)->state & MMC_STATE_ULTRAHIGHSPEED)
#define mmc_card_ext_capacity(c) ((c)->state & MMC_CARD_SDXC)
#define mmc_card_removed(c) ((c) && ((c)->state & MMC_CARD_REMOVED))
#define mmc_card_doing_bkops(c) ((c)->state & MMC_STATE_DOING_BKOPS)
@@ -430,11 +425,7 @@ static inline void __maybe_unused remove_quirk(struct mmc_card *card, int data)
#define mmc_card_set_present(c) ((c)->state |= MMC_STATE_PRESENT)
#define mmc_card_set_readonly(c) ((c)->state |= MMC_STATE_READONLY)
-#define mmc_card_set_highspeed(c) ((c)->state |= MMC_STATE_HIGHSPEED)
-#define mmc_card_set_hs200(c) ((c)->state |= MMC_STATE_HIGHSPEED_200)
#define mmc_card_set_blockaddr(c) ((c)->state |= MMC_STATE_BLOCKADDR)
-#define mmc_card_set_ddr_mode(c) ((c)->state |= MMC_STATE_HIGHSPEED_DDR)
-#define mmc_card_set_uhs(c) ((c)->state |= MMC_STATE_ULTRAHIGHSPEED)
#define mmc_card_set_ext_capacity(c) ((c)->state |= MMC_CARD_SDXC)
#define mmc_card_set_removed(c) ((c)->state |= MMC_CARD_REMOVED)
#define mmc_card_set_doing_bkops(c) ((c)->state |= MMC_STATE_DOING_BKOPS)
diff --git a/include/linux/mmc/dw_mmc.h b/include/linux/mmc/dw_mmc.h
index 6ce7d2cd3c7a..babaea93bca6 100644
--- a/include/linux/mmc/dw_mmc.h
+++ b/include/linux/mmc/dw_mmc.h
@@ -248,20 +248,6 @@ struct dw_mci_board {
/* delay in mS before detecting cards after interrupt */
u32 detect_delay_ms;
- int (*init)(u32 slot_id, irq_handler_t , void *);
- int (*get_ro)(u32 slot_id);
- int (*get_cd)(u32 slot_id);
- int (*get_ocr)(u32 slot_id);
- int (*get_bus_wd)(u32 slot_id);
- /*
- * Enable power to selected slot and set voltage to desired level.
- * Voltage levels are specified using MMC_VDD_xxx defines defined
- * in linux/mmc/host.h file.
- */
- void (*setpower)(u32 slot_id, u32 volt);
- void (*exit)(u32 slot_id);
- void (*select_slot)(u32 slot_id);
-
struct dw_mci_dma_ops *dma_ops;
struct dma_pdata *data;
struct block_settings *blk_settings;
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index cb61ea4d6945..7960424d0bc0 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -17,6 +17,7 @@
#include <linux/fault-inject.h>
#include <linux/mmc/core.h>
+#include <linux/mmc/card.h>
#include <linux/mmc/pm.h>
struct mmc_ios {
@@ -58,13 +59,9 @@ struct mmc_ios {
#define MMC_TIMING_UHS_SDR50 5
#define MMC_TIMING_UHS_SDR104 6
#define MMC_TIMING_UHS_DDR50 7
-#define MMC_TIMING_MMC_HS200 8
-
-#define MMC_SDR_MODE 0
-#define MMC_1_2V_DDR_MODE 1
-#define MMC_1_8V_DDR_MODE 2
-#define MMC_1_2V_SDR_MODE 3
-#define MMC_1_8V_SDR_MODE 4
+#define MMC_TIMING_MMC_DDR52 8
+#define MMC_TIMING_MMC_HS200 9
+#define MMC_TIMING_MMC_HS400 10
unsigned char signal_voltage; /* signalling voltage (1.8V or 3.3V) */
@@ -136,6 +133,9 @@ struct mmc_host_ops {
/* The tuning command opcode value is different for SD and eMMC cards */
int (*execute_tuning)(struct mmc_host *host, u32 opcode);
+
+ /* Prepare HS400 target operating frequency depending host driver */
+ int (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios);
int (*select_drive_strength)(unsigned int max_dtr, int host_drv, int card_drv);
void (*hw_reset)(struct mmc_host *host);
void (*card_event)(struct mmc_host *host);
@@ -278,6 +278,11 @@ struct mmc_host {
#define MMC_CAP2_PACKED_CMD (MMC_CAP2_PACKED_RD | \
MMC_CAP2_PACKED_WR)
#define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14) /* Don't power up before scan */
+#define MMC_CAP2_HS400_1_8V (1 << 15) /* Can support HS400 1.8V */
+#define MMC_CAP2_HS400_1_2V (1 << 16) /* Can support HS400 1.2V */
+#define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V | \
+ MMC_CAP2_HS400_1_2V)
+#define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17)
mmc_pm_flag_t pm_caps; /* supported pm features */
@@ -318,6 +323,8 @@ struct mmc_host {
int rescan_disable; /* disable card detection */
int rescan_entered; /* used with nonremovable devices */
+ bool trigger_card_event; /* card_event necessary */
+
struct mmc_card *card; /* device attached to this host */
wait_queue_head_t wq;
@@ -391,12 +398,13 @@ static inline void mmc_signal_sdio_irq(struct mmc_host *host)
wake_up_process(host->sdio_irq_thread);
}
+void sdio_run_irqs(struct mmc_host *host);
+
#ifdef CONFIG_REGULATOR
int mmc_regulator_get_ocrmask(struct regulator *supply);
int mmc_regulator_set_ocr(struct mmc_host *mmc,
struct regulator *supply,
unsigned short vdd_bit);
-int mmc_regulator_get_supply(struct mmc_host *mmc);
#else
static inline int mmc_regulator_get_ocrmask(struct regulator *supply)
{
@@ -409,13 +417,10 @@ static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
{
return 0;
}
-
-static inline int mmc_regulator_get_supply(struct mmc_host *mmc)
-{
- return 0;
-}
#endif
+int mmc_regulator_get_supply(struct mmc_host *mmc);
+
int mmc_pm_notify(struct notifier_block *notify_block, unsigned long, void *);
static inline int mmc_card_is_removable(struct mmc_host *host)
@@ -475,4 +480,32 @@ static inline unsigned int mmc_host_clk_rate(struct mmc_host *host)
return host->ios.clock;
}
#endif
+
+static inline int mmc_card_hs(struct mmc_card *card)
+{
+ return card->host->ios.timing == MMC_TIMING_SD_HS ||
+ card->host->ios.timing == MMC_TIMING_MMC_HS;
+}
+
+static inline int mmc_card_uhs(struct mmc_card *card)
+{
+ return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 &&
+ card->host->ios.timing <= MMC_TIMING_UHS_DDR50;
+}
+
+static inline bool mmc_card_hs200(struct mmc_card *card)
+{
+ return card->host->ios.timing == MMC_TIMING_MMC_HS200;
+}
+
+static inline bool mmc_card_ddr52(struct mmc_card *card)
+{
+ return card->host->ios.timing == MMC_TIMING_MMC_DDR52;
+}
+
+static inline bool mmc_card_hs400(struct mmc_card *card)
+{
+ return card->host->ios.timing == MMC_TIMING_MMC_HS400;
+}
+
#endif /* LINUX_MMC_HOST_H */
diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h
index 50bcde3677ca..64ec963ed347 100644
--- a/include/linux/mmc/mmc.h
+++ b/include/linux/mmc/mmc.h
@@ -325,6 +325,7 @@ struct _mmc_csd {
#define EXT_CSD_POWER_OFF_LONG_TIME 247 /* RO */
#define EXT_CSD_GENERIC_CMD6_TIME 248 /* RO */
#define EXT_CSD_CACHE_SIZE 249 /* RO, 4 bytes */
+#define EXT_CSD_PWR_CL_DDR_200_360 253 /* RO */
#define EXT_CSD_TAG_UNIT_SIZE 498 /* RO */
#define EXT_CSD_DATA_TAG_SUPPORT 499 /* RO */
#define EXT_CSD_MAX_PACKED_WRITES 500 /* RO */
@@ -354,18 +355,25 @@ struct _mmc_csd {
#define EXT_CSD_CMD_SET_SECURE (1<<1)
#define EXT_CSD_CMD_SET_CPSECURE (1<<2)
-#define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */
-#define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */
-#define EXT_CSD_CARD_TYPE_MASK 0x3F /* Mask out reserved bits */
+#define EXT_CSD_CARD_TYPE_HS_26 (1<<0) /* Card can run at 26MHz */
+#define EXT_CSD_CARD_TYPE_HS_52 (1<<1) /* Card can run at 52MHz */
+#define EXT_CSD_CARD_TYPE_HS (EXT_CSD_CARD_TYPE_HS_26 | \
+ EXT_CSD_CARD_TYPE_HS_52)
#define EXT_CSD_CARD_TYPE_DDR_1_8V (1<<2) /* Card can run at 52MHz */
/* DDR mode @1.8V or 3V I/O */
#define EXT_CSD_CARD_TYPE_DDR_1_2V (1<<3) /* Card can run at 52MHz */
/* DDR mode @1.2V I/O */
#define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \
| EXT_CSD_CARD_TYPE_DDR_1_2V)
-#define EXT_CSD_CARD_TYPE_SDR_1_8V (1<<4) /* Card can run at 200MHz */
-#define EXT_CSD_CARD_TYPE_SDR_1_2V (1<<5) /* Card can run at 200MHz */
+#define EXT_CSD_CARD_TYPE_HS200_1_8V (1<<4) /* Card can run at 200MHz */
+#define EXT_CSD_CARD_TYPE_HS200_1_2V (1<<5) /* Card can run at 200MHz */
/* SDR mode @1.2V I/O */
+#define EXT_CSD_CARD_TYPE_HS200 (EXT_CSD_CARD_TYPE_HS200_1_8V | \
+ EXT_CSD_CARD_TYPE_HS200_1_2V)
+#define EXT_CSD_CARD_TYPE_HS400_1_8V (1<<6) /* Card can run at 200MHz DDR, 1.8V */
+#define EXT_CSD_CARD_TYPE_HS400_1_2V (1<<7) /* Card can run at 200MHz DDR, 1.2V */
+#define EXT_CSD_CARD_TYPE_HS400 (EXT_CSD_CARD_TYPE_HS400_1_8V | \
+ EXT_CSD_CARD_TYPE_HS400_1_2V)
#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
@@ -373,6 +381,11 @@ struct _mmc_csd {
#define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */
#define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */
+#define EXT_CSD_TIMING_BC 0 /* Backwards compatility */
+#define EXT_CSD_TIMING_HS 1 /* High speed */
+#define EXT_CSD_TIMING_HS200 2 /* HS200 */
+#define EXT_CSD_TIMING_HS400 3 /* HS400 */
+
#define EXT_CSD_SEC_ER_EN BIT(0)
#define EXT_CSD_SEC_BD_BLK_EN BIT(2)
#define EXT_CSD_SEC_GB_CL_EN BIT(4)
diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h
index 7be12b883485..08abe9941884 100644
--- a/include/linux/mmc/sdhci.h
+++ b/include/linux/mmc/sdhci.h
@@ -57,12 +57,8 @@ struct sdhci_host {
#define SDHCI_QUIRK_BROKEN_CARD_DETECTION (1<<15)
/* Controller reports inverted write-protect state */
#define SDHCI_QUIRK_INVERTED_WRITE_PROTECT (1<<16)
-/* Controller has nonstandard clock management */
-#define SDHCI_QUIRK_NONSTANDARD_CLOCK (1<<17)
/* Controller does not like fast PIO transfers */
#define SDHCI_QUIRK_PIO_NEEDS_DELAY (1<<18)
-/* Controller losing signal/interrupt enable states after reset */
-#define SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET (1<<19)
/* Controller has to be forced to use block size of 2048 bytes */
#define SDHCI_QUIRK_FORCE_BLK_SZ_2048 (1<<20)
/* Controller cannot do multi-block transfers */
@@ -147,6 +143,7 @@ struct sdhci_host {
bool runtime_suspended; /* Host is runtime suspended */
bool bus_on; /* Bus power prevents runtime suspend */
+ bool preset_enabled; /* Preset is enabled */
struct mmc_request *mrq; /* Current request */
struct mmc_command *cmd; /* Current command */
@@ -164,8 +161,7 @@ struct sdhci_host {
dma_addr_t adma_addr; /* Mapped ADMA descr. table */
dma_addr_t align_addr; /* Mapped bounce buffer */
- struct tasklet_struct card_tasklet; /* Tasklet structures */
- struct tasklet_struct finish_tasklet;
+ struct tasklet_struct finish_tasklet; /* Tasklet structures */
struct timer_list timer; /* Timer for timeouts */
@@ -177,6 +173,13 @@ struct sdhci_host {
unsigned int ocr_avail_mmc;
u32 ocr_mask; /* available voltages */
+ unsigned timing; /* Current timing */
+
+ u32 thread_isr;
+
+ /* cached registers */
+ u32 ier;
+
wait_queue_head_t buf_ready_int; /* Waitqueue for Buffer Read Ready interrupt */
unsigned int tuning_done; /* Condition flag set when CMD19 succeeds */
diff --git a/include/linux/mmdebug.h b/include/linux/mmdebug.h
index 2d57efa64cc1..edd82a105220 100644
--- a/include/linux/mmdebug.h
+++ b/include/linux/mmdebug.h
@@ -1,6 +1,8 @@
#ifndef LINUX_MM_DEBUG_H
#define LINUX_MM_DEBUG_H 1
+#include <linux/stringify.h>
+
struct page;
extern void dump_page(struct page *page, const char *reason);
@@ -9,11 +11,20 @@ extern void dump_page_badflags(struct page *page, const char *reason,
#ifdef CONFIG_DEBUG_VM
#define VM_BUG_ON(cond) BUG_ON(cond)
-#define VM_BUG_ON_PAGE(cond, page) \
- do { if (unlikely(cond)) { dump_page(page, NULL); BUG(); } } while (0)
+#define VM_BUG_ON_PAGE(cond, page) \
+ do { \
+ if (unlikely(cond)) { \
+ dump_page(page, "VM_BUG_ON_PAGE(" __stringify(cond)")");\
+ BUG(); \
+ } \
+ } while (0)
+#define VM_WARN_ON(cond) WARN_ON(cond)
+#define VM_WARN_ON_ONCE(cond) WARN_ON_ONCE(cond)
#else
#define VM_BUG_ON(cond) BUILD_BUG_ON_INVALID(cond)
#define VM_BUG_ON_PAGE(cond, page) VM_BUG_ON(cond)
+#define VM_WARN_ON(cond) BUILD_BUG_ON_INVALID(cond)
+#define VM_WARN_ON_ONCE(cond) BUILD_BUG_ON_INVALID(cond)
#endif
#ifdef CONFIG_DEBUG_VIRTUAL
diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
index fac5509c18f0..6cbd1b6c3d20 100644
--- a/include/linux/mmzone.h
+++ b/include/linux/mmzone.h
@@ -75,9 +75,18 @@ enum {
extern int page_group_by_mobility_disabled;
-static inline int get_pageblock_migratetype(struct page *page)
+#define NR_MIGRATETYPE_BITS (PB_migrate_end - PB_migrate + 1)
+#define MIGRATETYPE_MASK ((1UL << NR_MIGRATETYPE_BITS) - 1)
+
+#define get_pageblock_migratetype(page) \
+ get_pfnblock_flags_mask(page, page_to_pfn(page), \
+ PB_migrate_end, MIGRATETYPE_MASK)
+
+static inline int get_pfnblock_migratetype(struct page *page, unsigned long pfn)
{
- return get_pageblock_flags_group(page, PB_migrate, PB_migrate_end);
+ BUILD_BUG_ON(PB_migrate_end - PB_migrate != 2);
+ return get_pfnblock_flags_mask(page, pfn, PB_migrate_end,
+ MIGRATETYPE_MASK);
}
struct free_area {
@@ -360,9 +369,10 @@ struct zone {
/* Set to true when the PG_migrate_skip bits should be cleared */
bool compact_blockskip_flush;
- /* pfns where compaction scanners should start */
+ /* pfn where compaction free scanner should start */
unsigned long compact_cached_free_pfn;
- unsigned long compact_cached_migrate_pfn;
+ /* pfn where async and sync compaction migration scanner should start */
+ unsigned long compact_cached_migrate_pfn[2];
#endif
#ifdef CONFIG_MEMORY_HOTPLUG
/* see spanned/present_pages for more description */
@@ -481,9 +491,8 @@ struct zone {
* give them a chance of being in the same cacheline.
*
* Write access to present_pages at runtime should be protected by
- * lock_memory_hotplug()/unlock_memory_hotplug(). Any reader who can't
- * tolerant drift of present_pages should hold memory hotplug lock to
- * get a stable value.
+ * mem_hotplug_begin/end(). Any reader who can't tolerant drift of
+ * present_pages should get_online_mems() to get a stable value.
*
* Read access to managed_pages should be safe because it's unsigned
* long. Write access to zone->managed_pages and totalram_pages are
@@ -763,10 +772,10 @@ typedef struct pglist_data {
unsigned long node_spanned_pages; /* total size of physical page
range, including holes */
int node_id;
- nodemask_t reclaim_nodes; /* Nodes allowed to reclaim from */
wait_queue_head_t kswapd_wait;
wait_queue_head_t pfmemalloc_wait;
- struct task_struct *kswapd; /* Protected by lock_memory_hotplug() */
+ struct task_struct *kswapd; /* Protected by
+ mem_hotplug_begin/end() */
int kswapd_max_order;
enum zone_type classzone_idx;
#ifdef CONFIG_NUMA_BALANCING
@@ -808,10 +817,10 @@ static inline bool pgdat_is_empty(pg_data_t *pgdat)
extern struct mutex zonelists_mutex;
void build_all_zonelists(pg_data_t *pgdat, struct zone *zone);
void wakeup_kswapd(struct zone *zone, int order, enum zone_type classzone_idx);
-bool zone_watermark_ok(struct zone *z, int order, unsigned long mark,
- int classzone_idx, int alloc_flags);
-bool zone_watermark_ok_safe(struct zone *z, int order, unsigned long mark,
- int classzone_idx, int alloc_flags);
+bool zone_watermark_ok(struct zone *z, unsigned int order,
+ unsigned long mark, int classzone_idx, int alloc_flags);
+bool zone_watermark_ok_safe(struct zone *z, unsigned int order,
+ unsigned long mark, int classzone_idx, int alloc_flags);
enum memmap_context {
MEMMAP_EARLY,
MEMMAP_HOTPLUG,
diff --git a/include/linux/moduleparam.h b/include/linux/moduleparam.h
index 204a67743804..b1990c5524e1 100644
--- a/include/linux/moduleparam.h
+++ b/include/linux/moduleparam.h
@@ -321,7 +321,7 @@ extern bool parameq(const char *name1, const char *name2);
extern bool parameqn(const char *name1, const char *name2, size_t n);
/* Called on module insert or kernel boot */
-extern int parse_args(const char *name,
+extern char *parse_args(const char *name,
char *args,
const struct kernel_param *params,
unsigned num,
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 450d61ec7f06..2f0af2891f0f 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -176,6 +176,11 @@ typedef enum {
/* Chip may not exist, so silence any errors in scan */
#define NAND_SCAN_SILENT_NODEV 0x00040000
/*
+ * This option could be defined by controller drivers to protect against
+ * kmap'ed, vmalloc'ed highmem buffers being passed from upper layers
+ */
+#define NAND_USE_BOUNCE_BUFFER 0x00080000
+/*
* Autodetect nand buswidth with readid/onfi.
* This suppose the driver will configure the hardware in 8 bits mode
* when calling nand_scan_ident, and update its configuration
@@ -552,8 +557,7 @@ struct nand_buffers {
* @ecc: [BOARDSPECIFIC] ECC control structure
* @buffers: buffer structure for read/write
* @hwcontrol: platform-specific hardware control structure
- * @erase_cmd: [INTERN] erase command write function, selectable due
- * to AND support.
+ * @erase: [REPLACEABLE] erase function
* @scan_bbt: [REPLACEABLE] function to scan bad block table
* @chip_delay: [BOARDSPECIFIC] chip dependent delay for transferring
* data from array to read regs (tR).
@@ -637,7 +641,7 @@ struct nand_chip {
void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column,
int page_addr);
int(*waitfunc)(struct mtd_info *mtd, struct nand_chip *this);
- void (*erase_cmd)(struct mtd_info *mtd, int page);
+ int (*erase)(struct mtd_info *mtd, int page);
int (*scan_bbt)(struct mtd_info *mtd);
int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state,
int status, int page);
diff --git a/include/linux/mtd/pfow.h b/include/linux/mtd/pfow.h
index b730d4f84655..42ff7ff09bf5 100644
--- a/include/linux/mtd/pfow.h
+++ b/include/linux/mtd/pfow.h
@@ -101,9 +101,6 @@ static inline void send_pfow_command(struct map_info *map,
unsigned long len, map_word *datum)
{
int bits_per_chip = map_bankwidth(map) * 8;
- int chipnum;
- struct lpddr_private *lpddr = map->fldrv_priv;
- chipnum = adr >> lpddr->chipshift;
map_write(map, CMD(cmd_code), map->pfow_base + PFOW_COMMAND_CODE);
map_write(map, CMD(adr & ((1<<bits_per_chip) - 1)),
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
new file mode 100644
index 000000000000..53241842a7ab
--- /dev/null
+++ b/include/linux/mtd/spi-nor.h
@@ -0,0 +1,214 @@
+/*
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __LINUX_MTD_SPI_NOR_H
+#define __LINUX_MTD_SPI_NOR_H
+
+/*
+ * Note on opcode nomenclature: some opcodes have a format like
+ * SPINOR_OP_FUNCTION{4,}_x_y_z. The numbers x, y, and z stand for the number
+ * of I/O lines used for the opcode, address, and data (respectively). The
+ * FUNCTION has an optional suffix of '4', to represent an opcode which
+ * requires a 4-byte (32-bit) address.
+ */
+
+/* Flash opcodes. */
+#define SPINOR_OP_WREN 0x06 /* Write enable */
+#define SPINOR_OP_RDSR 0x05 /* Read status register */
+#define SPINOR_OP_WRSR 0x01 /* Write status register 1 byte */
+#define SPINOR_OP_READ 0x03 /* Read data bytes (low frequency) */
+#define SPINOR_OP_READ_FAST 0x0b /* Read data bytes (high frequency) */
+#define SPINOR_OP_READ_1_1_2 0x3b /* Read data bytes (Dual SPI) */
+#define SPINOR_OP_READ_1_1_4 0x6b /* Read data bytes (Quad SPI) */
+#define SPINOR_OP_PP 0x02 /* Page program (up to 256 bytes) */
+#define SPINOR_OP_BE_4K 0x20 /* Erase 4KiB block */
+#define SPINOR_OP_BE_4K_PMC 0xd7 /* Erase 4KiB block on PMC chips */
+#define SPINOR_OP_BE_32K 0x52 /* Erase 32KiB block */
+#define SPINOR_OP_CHIP_ERASE 0xc7 /* Erase whole flash chip */
+#define SPINOR_OP_SE 0xd8 /* Sector erase (usually 64KiB) */
+#define SPINOR_OP_RDID 0x9f /* Read JEDEC ID */
+#define SPINOR_OP_RDCR 0x35 /* Read configuration register */
+
+/* 4-byte address opcodes - used on Spansion and some Macronix flashes. */
+#define SPINOR_OP_READ4 0x13 /* Read data bytes (low frequency) */
+#define SPINOR_OP_READ4_FAST 0x0c /* Read data bytes (high frequency) */
+#define SPINOR_OP_READ4_1_1_2 0x3c /* Read data bytes (Dual SPI) */
+#define SPINOR_OP_READ4_1_1_4 0x6c /* Read data bytes (Quad SPI) */
+#define SPINOR_OP_PP_4B 0x12 /* Page program (up to 256 bytes) */
+#define SPINOR_OP_SE_4B 0xdc /* Sector erase (usually 64KiB) */
+
+/* Used for SST flashes only. */
+#define SPINOR_OP_BP 0x02 /* Byte program */
+#define SPINOR_OP_WRDI 0x04 /* Write disable */
+#define SPINOR_OP_AAI_WP 0xad /* Auto address increment word program */
+
+/* Used for Macronix and Winbond flashes. */
+#define SPINOR_OP_EN4B 0xb7 /* Enter 4-byte mode */
+#define SPINOR_OP_EX4B 0xe9 /* Exit 4-byte mode */
+
+/* Used for Spansion flashes only. */
+#define SPINOR_OP_BRWR 0x17 /* Bank register write */
+
+/* Status Register bits. */
+#define SR_WIP 1 /* Write in progress */
+#define SR_WEL 2 /* Write enable latch */
+/* meaning of other SR_* bits may differ between vendors */
+#define SR_BP0 4 /* Block protect 0 */
+#define SR_BP1 8 /* Block protect 1 */
+#define SR_BP2 0x10 /* Block protect 2 */
+#define SR_SRWD 0x80 /* SR write protect */
+
+#define SR_QUAD_EN_MX 0x40 /* Macronix Quad I/O */
+
+/* Configuration Register bits. */
+#define CR_QUAD_EN_SPAN 0x2 /* Spansion Quad I/O */
+
+enum read_mode {
+ SPI_NOR_NORMAL = 0,
+ SPI_NOR_FAST,
+ SPI_NOR_DUAL,
+ SPI_NOR_QUAD,
+};
+
+/**
+ * struct spi_nor_xfer_cfg - Structure for defining a Serial Flash transfer
+ * @wren: command for "Write Enable", or 0x00 for not required
+ * @cmd: command for operation
+ * @cmd_pins: number of pins to send @cmd (1, 2, 4)
+ * @addr: address for operation
+ * @addr_pins: number of pins to send @addr (1, 2, 4)
+ * @addr_width: number of address bytes
+ * (3,4, or 0 for address not required)
+ * @mode: mode data
+ * @mode_pins: number of pins to send @mode (1, 2, 4)
+ * @mode_cycles: number of mode cycles (0 for mode not required)
+ * @dummy_cycles: number of dummy cycles (0 for dummy not required)
+ */
+struct spi_nor_xfer_cfg {
+ u8 wren;
+ u8 cmd;
+ u8 cmd_pins;
+ u32 addr;
+ u8 addr_pins;
+ u8 addr_width;
+ u8 mode;
+ u8 mode_pins;
+ u8 mode_cycles;
+ u8 dummy_cycles;
+};
+
+#define SPI_NOR_MAX_CMD_SIZE 8
+enum spi_nor_ops {
+ SPI_NOR_OPS_READ = 0,
+ SPI_NOR_OPS_WRITE,
+ SPI_NOR_OPS_ERASE,
+ SPI_NOR_OPS_LOCK,
+ SPI_NOR_OPS_UNLOCK,
+};
+
+/**
+ * struct spi_nor - Structure for defining a the SPI NOR layer
+ * @mtd: point to a mtd_info structure
+ * @lock: the lock for the read/write/erase/lock/unlock operations
+ * @dev: point to a spi device, or a spi nor controller device.
+ * @page_size: the page size of the SPI NOR
+ * @addr_width: number of address bytes
+ * @erase_opcode: the opcode for erasing a sector
+ * @read_opcode: the read opcode
+ * @read_dummy: the dummy needed by the read operation
+ * @program_opcode: the program opcode
+ * @flash_read: the mode of the read
+ * @sst_write_second: used by the SST write operation
+ * @cfg: used by the read_xfer/write_xfer
+ * @cmd_buf: used by the write_reg
+ * @prepare: [OPTIONAL] do some preparations for the
+ * read/write/erase/lock/unlock operations
+ * @unprepare: [OPTIONAL] do some post work after the
+ * read/write/erase/lock/unlock operations
+ * @read_xfer: [OPTIONAL] the read fundamental primitive
+ * @write_xfer: [OPTIONAL] the writefundamental primitive
+ * @read_reg: [DRIVER-SPECIFIC] read out the register
+ * @write_reg: [DRIVER-SPECIFIC] write data to the register
+ * @read_id: [REPLACEABLE] read out the ID data, and find
+ * the proper spi_device_id
+ * @wait_till_ready: [REPLACEABLE] wait till the NOR becomes ready
+ * @read: [DRIVER-SPECIFIC] read data from the SPI NOR
+ * @write: [DRIVER-SPECIFIC] write data to the SPI NOR
+ * @erase: [DRIVER-SPECIFIC] erase a sector of the SPI NOR
+ * at the offset @offs
+ * @priv: the private data
+ */
+struct spi_nor {
+ struct mtd_info *mtd;
+ struct mutex lock;
+ struct device *dev;
+ u32 page_size;
+ u8 addr_width;
+ u8 erase_opcode;
+ u8 read_opcode;
+ u8 read_dummy;
+ u8 program_opcode;
+ enum read_mode flash_read;
+ bool sst_write_second;
+ struct spi_nor_xfer_cfg cfg;
+ u8 cmd_buf[SPI_NOR_MAX_CMD_SIZE];
+
+ int (*prepare)(struct spi_nor *nor, enum spi_nor_ops ops);
+ void (*unprepare)(struct spi_nor *nor, enum spi_nor_ops ops);
+ int (*read_xfer)(struct spi_nor *nor, struct spi_nor_xfer_cfg *cfg,
+ u8 *buf, size_t len);
+ int (*write_xfer)(struct spi_nor *nor, struct spi_nor_xfer_cfg *cfg,
+ u8 *buf, size_t len);
+ int (*read_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
+ int (*write_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len,
+ int write_enable);
+ const struct spi_device_id *(*read_id)(struct spi_nor *nor);
+ int (*wait_till_ready)(struct spi_nor *nor);
+
+ int (*read)(struct spi_nor *nor, loff_t from,
+ size_t len, size_t *retlen, u_char *read_buf);
+ void (*write)(struct spi_nor *nor, loff_t to,
+ size_t len, size_t *retlen, const u_char *write_buf);
+ int (*erase)(struct spi_nor *nor, loff_t offs);
+
+ void *priv;
+};
+
+/**
+ * spi_nor_scan() - scan the SPI NOR
+ * @nor: the spi_nor structure
+ * @id: the spi_device_id provided by the driver
+ * @mode: the read mode supported by the driver
+ *
+ * The drivers can use this fuction to scan the SPI NOR.
+ * In the scanning, it will try to get all the necessary information to
+ * fill the mtd_info{} and the spi_nor{}.
+ *
+ * The board may assigns a spi_device_id with @id which be used to compared with
+ * the spi_device_id detected by the scanning.
+ *
+ * Return: 0 for success, others for failure.
+ */
+int spi_nor_scan(struct spi_nor *nor, const struct spi_device_id *id,
+ enum read_mode mode);
+extern const struct spi_device_id spi_nor_ids[];
+
+/**
+ * spi_nor_match_id() - find the spi_device_id by the name
+ * @name: the name of the spi_device_id
+ *
+ * The drivers use this function to find the spi_device_id
+ * specified by the @name.
+ *
+ * Return: returns the right spi_device_id pointer on success,
+ * and returns NULL on failure.
+ */
+const struct spi_device_id *spi_nor_match_id(char *name);
+
+#endif
diff --git a/include/linux/net.h b/include/linux/net.h
index 94734a6259a4..17d83393afcc 100644
--- a/include/linux/net.h
+++ b/include/linux/net.h
@@ -248,24 +248,17 @@ do { \
bool __net_get_random_once(void *buf, int nbytes, bool *done,
struct static_key *done_key);
-#ifdef HAVE_JUMP_LABEL
-#define ___NET_RANDOM_STATIC_KEY_INIT ((struct static_key) \
- { .enabled = ATOMIC_INIT(0), .entries = (void *)1 })
-#else /* !HAVE_JUMP_LABEL */
-#define ___NET_RANDOM_STATIC_KEY_INIT STATIC_KEY_INIT_FALSE
-#endif /* HAVE_JUMP_LABEL */
-
#define net_get_random_once(buf, nbytes) \
({ \
bool ___ret = false; \
static bool ___done = false; \
- static struct static_key ___done_key = \
- ___NET_RANDOM_STATIC_KEY_INIT; \
- if (!static_key_true(&___done_key)) \
+ static struct static_key ___once_key = \
+ STATIC_KEY_INIT_TRUE; \
+ if (static_key_true(&___once_key)) \
___ret = __net_get_random_once(buf, \
nbytes, \
&___done, \
- &___done_key); \
+ &___once_key); \
___ret; \
})
diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h
index 7ed3a3aa6604..6c1ae9fd9505 100644
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -493,7 +493,7 @@ static inline void napi_disable(struct napi_struct *n)
static inline void napi_enable(struct napi_struct *n)
{
BUG_ON(!test_bit(NAPI_STATE_SCHED, &n->state));
- smp_mb__before_clear_bit();
+ smp_mb__before_atomic();
clear_bit(NAPI_STATE_SCHED, &n->state);
}
@@ -1144,6 +1144,7 @@ struct net_device_ops {
netdev_tx_t (*ndo_dfwd_start_xmit) (struct sk_buff *skb,
struct net_device *dev,
void *priv);
+ int (*ndo_get_lock_subclass)(struct net_device *dev);
};
/**
@@ -2950,7 +2951,12 @@ static inline void netif_addr_lock(struct net_device *dev)
static inline void netif_addr_lock_nested(struct net_device *dev)
{
- spin_lock_nested(&dev->addr_list_lock, SINGLE_DEPTH_NESTING);
+ int subclass = SINGLE_DEPTH_NESTING;
+
+ if (dev->netdev_ops->ndo_get_lock_subclass)
+ subclass = dev->netdev_ops->ndo_get_lock_subclass(dev);
+
+ spin_lock_nested(&dev->addr_list_lock, subclass);
}
static inline void netif_addr_lock_bh(struct net_device *dev)
@@ -3050,10 +3056,19 @@ extern int weight_p;
extern int bpf_jit_enable;
bool netdev_has_upper_dev(struct net_device *dev, struct net_device *upper_dev);
+struct net_device *netdev_upper_get_next_dev_rcu(struct net_device *dev,
+ struct list_head **iter);
struct net_device *netdev_all_upper_get_next_dev_rcu(struct net_device *dev,
struct list_head **iter);
/* iterate through upper list, must be called under RCU read lock */
+#define netdev_for_each_upper_dev_rcu(dev, updev, iter) \
+ for (iter = &(dev)->adj_list.upper, \
+ updev = netdev_upper_get_next_dev_rcu(dev, &(iter)); \
+ updev; \
+ updev = netdev_upper_get_next_dev_rcu(dev, &(iter)))
+
+/* iterate through upper list, must be called under RCU read lock */
#define netdev_for_each_all_upper_dev_rcu(dev, updev, iter) \
for (iter = &(dev)->all_adj_list.upper, \
updev = netdev_all_upper_get_next_dev_rcu(dev, &(iter)); \
@@ -3077,6 +3092,14 @@ void *netdev_lower_get_next_private_rcu(struct net_device *dev,
priv; \
priv = netdev_lower_get_next_private_rcu(dev, &(iter)))
+void *netdev_lower_get_next(struct net_device *dev,
+ struct list_head **iter);
+#define netdev_for_each_lower_dev(dev, ldev, iter) \
+ for (iter = &(dev)->adj_list.lower, \
+ ldev = netdev_lower_get_next(dev, &(iter)); \
+ ldev; \
+ ldev = netdev_lower_get_next(dev, &(iter)))
+
void *netdev_adjacent_get_private(struct list_head *adj_list);
void *netdev_lower_get_first_private_rcu(struct net_device *dev);
struct net_device *netdev_master_upper_dev_get(struct net_device *dev);
@@ -3092,6 +3115,8 @@ void netdev_upper_dev_unlink(struct net_device *dev,
void netdev_adjacent_rename_links(struct net_device *dev, char *oldname);
void *netdev_lower_dev_get_private(struct net_device *dev,
struct net_device *lower_dev);
+int dev_get_nest_level(struct net_device *dev,
+ bool (*type_check)(struct net_device *dev));
int skb_checksum_help(struct sk_buff *skb);
struct sk_buff *__skb_gso_segment(struct sk_buff *skb,
netdev_features_t features, bool tx_path);
@@ -3180,12 +3205,7 @@ void netdev_change_features(struct net_device *dev);
void netif_stacked_transfer_operstate(const struct net_device *rootdev,
struct net_device *dev);
-netdev_features_t netif_skb_dev_features(struct sk_buff *skb,
- const struct net_device *dev);
-static inline netdev_features_t netif_skb_features(struct sk_buff *skb)
-{
- return netif_skb_dev_features(skb, skb->dev);
-}
+netdev_features_t netif_skb_features(struct sk_buff *skb);
static inline bool net_gso_ok(netdev_features_t features, int gso_type)
{
diff --git a/include/linux/netlink.h b/include/linux/netlink.h
index aad8eeaf416d..034cda789a15 100644
--- a/include/linux/netlink.h
+++ b/include/linux/netlink.h
@@ -16,9 +16,10 @@ static inline struct nlmsghdr *nlmsg_hdr(const struct sk_buff *skb)
}
enum netlink_skb_flags {
- NETLINK_SKB_MMAPED = 0x1, /* Packet data is mmaped */
- NETLINK_SKB_TX = 0x2, /* Packet was sent by userspace */
- NETLINK_SKB_DELIVERED = 0x4, /* Packet was delivered */
+ NETLINK_SKB_MMAPED = 0x1, /* Packet data is mmaped */
+ NETLINK_SKB_TX = 0x2, /* Packet was sent by userspace */
+ NETLINK_SKB_DELIVERED = 0x4, /* Packet was delivered */
+ NETLINK_SKB_DST = 0x8, /* Dst set in sendto or sendmsg */
};
struct netlink_skb_parms {
@@ -169,4 +170,11 @@ struct netlink_tap {
extern int netlink_add_tap(struct netlink_tap *nt);
extern int netlink_remove_tap(struct netlink_tap *nt);
+bool __netlink_ns_capable(const struct netlink_skb_parms *nsp,
+ struct user_namespace *ns, int cap);
+bool netlink_ns_capable(const struct sk_buff *skb,
+ struct user_namespace *ns, int cap);
+bool netlink_capable(const struct sk_buff *skb, int cap);
+bool netlink_net_capable(const struct sk_buff *skb, int cap);
+
#endif /* __LINUX_NETLINK_H */
diff --git a/include/linux/nfs.h b/include/linux/nfs.h
index 3e794c12e90a..610af5155ef2 100644
--- a/include/linux/nfs.h
+++ b/include/linux/nfs.h
@@ -46,6 +46,9 @@ static inline void nfs_copy_fh(struct nfs_fh *target, const struct nfs_fh *sourc
enum nfs3_stable_how {
NFS_UNSTABLE = 0,
NFS_DATA_SYNC = 1,
- NFS_FILE_SYNC = 2
+ NFS_FILE_SYNC = 2,
+
+ /* used by direct.c to mark verf as invalid */
+ NFS_INVALID_STABLE_HOW = -1
};
#endif /* _LINUX_NFS_H */
diff --git a/include/linux/nfs4.h b/include/linux/nfs4.h
index 12c2cb947df5..a1e3064a8d99 100644
--- a/include/linux/nfs4.h
+++ b/include/linux/nfs4.h
@@ -399,8 +399,6 @@ enum lock_type4 {
#define FATTR4_WORD2_LAYOUT_BLKSIZE (1UL << 1)
#define FATTR4_WORD2_MDSTHRESHOLD (1UL << 4)
#define FATTR4_WORD2_SECURITY_LABEL (1UL << 16)
-#define FATTR4_WORD2_CHANGE_SECURITY_LABEL \
- (1UL << 17)
/* MDS threshold bitmap bits */
#define THRESHOLD_RD (1UL << 0)
diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h
index fa6918b0f829..e30f6059ecd6 100644
--- a/include/linux/nfs_fs.h
+++ b/include/linux/nfs_fs.h
@@ -459,13 +459,12 @@ extern int nfs3_removexattr (struct dentry *, const char *name);
/*
* linux/fs/nfs/direct.c
*/
-extern ssize_t nfs_direct_IO(int, struct kiocb *, const struct iovec *, loff_t,
- unsigned long);
+extern ssize_t nfs_direct_IO(int, struct kiocb *, struct iov_iter *, loff_t);
extern ssize_t nfs_file_direct_read(struct kiocb *iocb,
- const struct iovec *iov, unsigned long nr_segs,
+ struct iov_iter *iter,
loff_t pos, bool uio);
extern ssize_t nfs_file_direct_write(struct kiocb *iocb,
- const struct iovec *iov, unsigned long nr_segs,
+ struct iov_iter *iter,
loff_t pos, bool uio);
/*
@@ -520,7 +519,6 @@ extern int nfs_writepage(struct page *page, struct writeback_control *wbc);
extern int nfs_writepages(struct address_space *, struct writeback_control *);
extern int nfs_flush_incompatible(struct file *file, struct page *page);
extern int nfs_updatepage(struct file *, struct page *, unsigned int, unsigned int);
-extern void nfs_writeback_done(struct rpc_task *, struct nfs_write_data *);
/*
* Try to write back everything synchronously (but check the
@@ -553,7 +551,6 @@ nfs_have_writebacks(struct inode *inode)
extern int nfs_readpage(struct file *, struct page *);
extern int nfs_readpages(struct file *, struct address_space *,
struct list_head *, unsigned);
-extern int nfs_readpage_result(struct rpc_task *, struct nfs_read_data *);
extern int nfs_readpage_async(struct nfs_open_context *, struct inode *,
struct page *);
diff --git a/include/linux/nfs_page.h b/include/linux/nfs_page.h
index 92ce5783b707..7d9096d95d4a 100644
--- a/include/linux/nfs_page.h
+++ b/include/linux/nfs_page.h
@@ -22,12 +22,17 @@
* Valid flags for a dirty buffer
*/
enum {
- PG_BUSY = 0,
- PG_MAPPED,
- PG_CLEAN,
- PG_NEED_COMMIT,
- PG_NEED_RESCHED,
- PG_COMMIT_TO_DS,
+ PG_BUSY = 0, /* nfs_{un}lock_request */
+ PG_MAPPED, /* page private set for buffered io */
+ PG_CLEAN, /* write succeeded */
+ PG_COMMIT_TO_DS, /* used by pnfs layouts */
+ PG_INODE_REF, /* extra ref held by inode (head req only) */
+ PG_HEADLOCK, /* page group lock of wb_head */
+ PG_TEARDOWN, /* page group sync for destroy */
+ PG_UNLOCKPAGE, /* page group sync bit in read path */
+ PG_UPTODATE, /* page group sync bit in read path */
+ PG_WB_END, /* page group sync bit in write path */
+ PG_REMOVE, /* page group sync bit in write path */
};
struct nfs_inode;
@@ -43,15 +48,29 @@ struct nfs_page {
struct kref wb_kref; /* reference count */
unsigned long wb_flags;
struct nfs_write_verifier wb_verf; /* Commit cookie */
+ struct nfs_page *wb_this_page; /* list of reqs for this page */
+ struct nfs_page *wb_head; /* head pointer for req list */
};
struct nfs_pageio_descriptor;
struct nfs_pageio_ops {
void (*pg_init)(struct nfs_pageio_descriptor *, struct nfs_page *);
- bool (*pg_test)(struct nfs_pageio_descriptor *, struct nfs_page *, struct nfs_page *);
+ size_t (*pg_test)(struct nfs_pageio_descriptor *, struct nfs_page *,
+ struct nfs_page *);
int (*pg_doio)(struct nfs_pageio_descriptor *);
};
+struct nfs_rw_ops {
+ const fmode_t rw_mode;
+ struct nfs_rw_header *(*rw_alloc_header)(void);
+ void (*rw_free_header)(struct nfs_rw_header *);
+ void (*rw_release)(struct nfs_pgio_data *);
+ int (*rw_done)(struct rpc_task *, struct nfs_pgio_data *, struct inode *);
+ void (*rw_result)(struct rpc_task *, struct nfs_pgio_data *);
+ void (*rw_initiate)(struct nfs_pgio_data *, struct rpc_message *,
+ struct rpc_task_setup *, int);
+};
+
struct nfs_pageio_descriptor {
struct list_head pg_list;
unsigned long pg_bytes_written;
@@ -63,6 +82,7 @@ struct nfs_pageio_descriptor {
struct inode *pg_inode;
const struct nfs_pageio_ops *pg_ops;
+ const struct nfs_rw_ops *pg_rw_ops;
int pg_ioflags;
int pg_error;
const struct rpc_call_ops *pg_rpc_callops;
@@ -75,29 +95,33 @@ struct nfs_pageio_descriptor {
#define NFS_WBACK_BUSY(req) (test_bit(PG_BUSY,&(req)->wb_flags))
extern struct nfs_page *nfs_create_request(struct nfs_open_context *ctx,
- struct inode *inode,
struct page *page,
+ struct nfs_page *last,
unsigned int offset,
unsigned int count);
-extern void nfs_release_request(struct nfs_page *req);
+extern void nfs_release_request(struct nfs_page *);
extern void nfs_pageio_init(struct nfs_pageio_descriptor *desc,
struct inode *inode,
const struct nfs_pageio_ops *pg_ops,
const struct nfs_pgio_completion_ops *compl_ops,
+ const struct nfs_rw_ops *rw_ops,
size_t bsize,
int how);
extern int nfs_pageio_add_request(struct nfs_pageio_descriptor *,
struct nfs_page *);
extern void nfs_pageio_complete(struct nfs_pageio_descriptor *desc);
extern void nfs_pageio_cond_complete(struct nfs_pageio_descriptor *, pgoff_t);
-extern bool nfs_generic_pg_test(struct nfs_pageio_descriptor *desc,
+extern size_t nfs_generic_pg_test(struct nfs_pageio_descriptor *desc,
struct nfs_page *prev,
struct nfs_page *req);
extern int nfs_wait_on_request(struct nfs_page *);
extern void nfs_unlock_request(struct nfs_page *req);
-extern void nfs_unlock_and_release_request(struct nfs_page *req);
+extern void nfs_unlock_and_release_request(struct nfs_page *);
+extern void nfs_page_group_lock(struct nfs_page *);
+extern void nfs_page_group_unlock(struct nfs_page *);
+extern bool nfs_page_group_sync_on_bit(struct nfs_page *, unsigned int);
/*
* Lock the page of an asynchronous request
diff --git a/include/linux/nfs_xdr.h b/include/linux/nfs_xdr.h
index 6fb5b2335b59..9a1396e70310 100644
--- a/include/linux/nfs_xdr.h
+++ b/include/linux/nfs_xdr.h
@@ -489,31 +489,21 @@ struct nfs4_delegreturnres {
};
/*
- * Arguments to the read call.
+ * Arguments to the write call.
*/
-struct nfs_readargs {
- struct nfs4_sequence_args seq_args;
- struct nfs_fh * fh;
- struct nfs_open_context *context;
- struct nfs_lock_context *lock_context;
- nfs4_stateid stateid;
- __u64 offset;
- __u32 count;
- unsigned int pgbase;
- struct page ** pages;
+struct nfs_write_verifier {
+ char data[8];
};
-struct nfs_readres {
- struct nfs4_sequence_res seq_res;
- struct nfs_fattr * fattr;
- __u32 count;
- int eof;
+struct nfs_writeverf {
+ struct nfs_write_verifier verifier;
+ enum nfs3_stable_how committed;
};
/*
- * Arguments to the write call.
+ * Arguments shared by the read and write call.
*/
-struct nfs_writeargs {
+struct nfs_pgio_args {
struct nfs4_sequence_args seq_args;
struct nfs_fh * fh;
struct nfs_open_context *context;
@@ -521,27 +511,20 @@ struct nfs_writeargs {
nfs4_stateid stateid;
__u64 offset;
__u32 count;
- enum nfs3_stable_how stable;
unsigned int pgbase;
struct page ** pages;
- const u32 * bitmask;
-};
-
-struct nfs_write_verifier {
- char data[8];
+ const u32 * bitmask; /* used by write */
+ enum nfs3_stable_how stable; /* used by write */
};
-struct nfs_writeverf {
- struct nfs_write_verifier verifier;
- enum nfs3_stable_how committed;
-};
-
-struct nfs_writeres {
+struct nfs_pgio_res {
struct nfs4_sequence_res seq_res;
struct nfs_fattr * fattr;
- struct nfs_writeverf * verf;
__u32 count;
- const struct nfs_server *server;
+ int eof; /* used by read */
+ struct nfs_writeverf * verf; /* used by write */
+ const struct nfs_server *server; /* used by write */
+
};
/*
@@ -1129,6 +1112,7 @@ struct pnfs_commit_bucket {
struct list_head committing;
struct pnfs_layout_segment *wlseg;
struct pnfs_layout_segment *clseg;
+ struct nfs_writeverf direct_verf;
};
struct pnfs_ds_commit_info {
@@ -1264,20 +1248,6 @@ struct nfs_page_array {
struct page *page_array[NFS_PAGEVEC_SIZE];
};
-struct nfs_read_data {
- struct nfs_pgio_header *header;
- struct list_head list;
- struct rpc_task task;
- struct nfs_fattr fattr; /* fattr storage */
- struct nfs_readargs args;
- struct nfs_readres res;
- unsigned long timestamp; /* For lease renewal */
- int (*read_done_cb) (struct rpc_task *task, struct nfs_read_data *data);
- __u64 mds_offset;
- struct nfs_page_array pages;
- struct nfs_client *ds_clp; /* pNFS data server */
-};
-
/* used as flag bits in nfs_pgio_header */
enum {
NFS_IOHDR_ERROR = 0,
@@ -1287,19 +1257,22 @@ enum {
NFS_IOHDR_NEED_RESCHED,
};
+struct nfs_pgio_data;
+
struct nfs_pgio_header {
struct inode *inode;
struct rpc_cred *cred;
struct list_head pages;
- struct list_head rpc_list;
+ struct nfs_pgio_data *data;
atomic_t refcnt;
struct nfs_page *req;
- struct nfs_writeverf *verf;
+ struct nfs_writeverf verf; /* Used for writes */
struct pnfs_layout_segment *lseg;
loff_t io_start;
const struct rpc_call_ops *mds_ops;
void (*release) (struct nfs_pgio_header *hdr);
const struct nfs_pgio_completion_ops *completion_ops;
+ const struct nfs_rw_ops *rw_ops;
struct nfs_direct_req *dreq;
void *layout_private;
spinlock_t lock;
@@ -1310,30 +1283,24 @@ struct nfs_pgio_header {
unsigned long flags;
};
-struct nfs_read_header {
- struct nfs_pgio_header header;
- struct nfs_read_data rpc_data;
-};
-
-struct nfs_write_data {
+struct nfs_pgio_data {
struct nfs_pgio_header *header;
- struct list_head list;
struct rpc_task task;
struct nfs_fattr fattr;
- struct nfs_writeverf verf;
- struct nfs_writeargs args; /* argument struct */
- struct nfs_writeres res; /* result struct */
+ struct nfs_writeverf verf; /* Used for writes */
+ struct nfs_pgio_args args; /* argument struct */
+ struct nfs_pgio_res res; /* result struct */
unsigned long timestamp; /* For lease renewal */
- int (*write_done_cb) (struct rpc_task *task, struct nfs_write_data *data);
+ int (*pgio_done_cb) (struct rpc_task *task, struct nfs_pgio_data *data);
__u64 mds_offset; /* Filelayout dense stripe */
struct nfs_page_array pages;
struct nfs_client *ds_clp; /* pNFS data server */
+ int ds_idx; /* ds index if ds_clp is set */
};
-struct nfs_write_header {
+struct nfs_rw_header {
struct nfs_pgio_header header;
- struct nfs_write_data rpc_data;
- struct nfs_writeverf verf;
+ struct nfs_pgio_data rpc_data;
};
struct nfs_mds_commit_info {
@@ -1465,16 +1432,11 @@ struct nfs_rpc_ops {
struct nfs_pathconf *);
int (*set_capabilities)(struct nfs_server *, struct nfs_fh *);
int (*decode_dirent)(struct xdr_stream *, struct nfs_entry *, int);
- void (*read_setup) (struct nfs_read_data *, struct rpc_message *);
- void (*read_pageio_init)(struct nfs_pageio_descriptor *, struct inode *,
- const struct nfs_pgio_completion_ops *);
- int (*read_rpc_prepare)(struct rpc_task *, struct nfs_read_data *);
- int (*read_done) (struct rpc_task *, struct nfs_read_data *);
- void (*write_setup) (struct nfs_write_data *, struct rpc_message *);
- void (*write_pageio_init)(struct nfs_pageio_descriptor *, struct inode *, int,
- const struct nfs_pgio_completion_ops *);
- int (*write_rpc_prepare)(struct rpc_task *, struct nfs_write_data *);
- int (*write_done) (struct rpc_task *, struct nfs_write_data *);
+ int (*pgio_rpc_prepare)(struct rpc_task *, struct nfs_pgio_data *);
+ void (*read_setup) (struct nfs_pgio_data *, struct rpc_message *);
+ int (*read_done) (struct rpc_task *, struct nfs_pgio_data *);
+ void (*write_setup) (struct nfs_pgio_data *, struct rpc_message *);
+ int (*write_done) (struct rpc_task *, struct nfs_pgio_data *);
void (*commit_setup) (struct nfs_commit_data *, struct rpc_message *);
void (*commit_rpc_prepare)(struct rpc_task *, struct nfs_commit_data *);
int (*commit_done) (struct rpc_task *, struct nfs_commit_data *);
diff --git a/include/linux/nfsd/debug.h b/include/linux/nfsd/debug.h
deleted file mode 100644
index 19ef8375b577..000000000000
--- a/include/linux/nfsd/debug.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * linux/include/linux/nfsd/debug.h
- *
- * Debugging-related stuff for nfsd
- *
- * Copyright (C) 1995 Olaf Kirch <okir@monad.swb.de>
- */
-#ifndef LINUX_NFSD_DEBUG_H
-#define LINUX_NFSD_DEBUG_H
-
-#include <uapi/linux/nfsd/debug.h>
-
-# undef ifdebug
-# ifdef NFSD_DEBUG
-# define ifdebug(flag) if (nfsd_debug & NFSDDBG_##flag)
-# else
-# define ifdebug(flag) if (0)
-# endif
-#endif /* LINUX_NFSD_DEBUG_H */
diff --git a/include/linux/nfsd/export.h b/include/linux/nfsd/export.h
deleted file mode 100644
index 7898c997dfea..000000000000
--- a/include/linux/nfsd/export.h
+++ /dev/null
@@ -1,110 +0,0 @@
-/*
- * include/linux/nfsd/export.h
- *
- * Public declarations for NFS exports. The definitions for the
- * syscall interface are in nfsctl.h
- *
- * Copyright (C) 1995-1997 Olaf Kirch <okir@monad.swb.de>
- */
-#ifndef NFSD_EXPORT_H
-#define NFSD_EXPORT_H
-
-# include <linux/nfsd/nfsfh.h>
-#include <uapi/linux/nfsd/export.h>
-
-/*
- * FS Locations
- */
-
-#define MAX_FS_LOCATIONS 128
-
-struct nfsd4_fs_location {
- char *hosts; /* colon separated list of hosts */
- char *path; /* slash separated list of path components */
-};
-
-struct nfsd4_fs_locations {
- uint32_t locations_count;
- struct nfsd4_fs_location *locations;
-/* If we're not actually serving this data ourselves (only providing a
- * list of replicas that do serve it) then we set "migrated": */
- int migrated;
-};
-
-/*
- * We keep an array of pseudoflavors with the export, in order from most
- * to least preferred. For the foreseeable future, we don't expect more
- * than the eight pseudoflavors null, unix, krb5, krb5i, krb5p, skpm3,
- * spkm3i, and spkm3p (and using all 8 at once should be rare).
- */
-#define MAX_SECINFO_LIST 8
-
-struct exp_flavor_info {
- u32 pseudoflavor;
- u32 flags;
-};
-
-struct svc_export {
- struct cache_head h;
- struct auth_domain * ex_client;
- int ex_flags;
- struct path ex_path;
- kuid_t ex_anon_uid;
- kgid_t ex_anon_gid;
- int ex_fsid;
- unsigned char * ex_uuid; /* 16 byte fsid */
- struct nfsd4_fs_locations ex_fslocs;
- int ex_nflavors;
- struct exp_flavor_info ex_flavors[MAX_SECINFO_LIST];
- struct cache_detail *cd;
-};
-
-/* an "export key" (expkey) maps a filehandlefragement to an
- * svc_export for a given client. There can be several per export,
- * for the different fsid types.
- */
-struct svc_expkey {
- struct cache_head h;
-
- struct auth_domain * ek_client;
- int ek_fsidtype;
- u32 ek_fsid[6];
-
- struct path ek_path;
-};
-
-#define EX_ISSYNC(exp) (!((exp)->ex_flags & NFSEXP_ASYNC))
-#define EX_NOHIDE(exp) ((exp)->ex_flags & NFSEXP_NOHIDE)
-#define EX_WGATHER(exp) ((exp)->ex_flags & NFSEXP_GATHERED_WRITES)
-
-int nfsexp_flags(struct svc_rqst *rqstp, struct svc_export *exp);
-__be32 check_nfsd_access(struct svc_export *exp, struct svc_rqst *rqstp);
-
-/*
- * Function declarations
- */
-int nfsd_export_init(struct net *);
-void nfsd_export_shutdown(struct net *);
-void nfsd_export_flush(struct net *);
-struct svc_export * rqst_exp_get_by_name(struct svc_rqst *,
- struct path *);
-struct svc_export * rqst_exp_parent(struct svc_rqst *,
- struct path *);
-struct svc_export * rqst_find_fsidzero_export(struct svc_rqst *);
-int exp_rootfh(struct net *, struct auth_domain *,
- char *path, struct knfsd_fh *, int maxsize);
-__be32 exp_pseudoroot(struct svc_rqst *, struct svc_fh *);
-__be32 nfserrno(int errno);
-
-static inline void exp_put(struct svc_export *exp)
-{
- cache_put(&exp->h, exp->cd);
-}
-
-static inline void exp_get(struct svc_export *exp)
-{
- cache_get(&exp->h);
-}
-struct svc_export * rqst_exp_find(struct svc_rqst *, int, u32 *);
-
-#endif /* NFSD_EXPORT_H */
diff --git a/include/linux/nfsd/nfsfh.h b/include/linux/nfsd/nfsfh.h
deleted file mode 100644
index a93593f1fa4e..000000000000
--- a/include/linux/nfsd/nfsfh.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * include/linux/nfsd/nfsfh.h
- *
- * This file describes the layout of the file handles as passed
- * over the wire.
- *
- * Earlier versions of knfsd used to sign file handles using keyed MD5
- * or SHA. I've removed this code, because it doesn't give you more
- * security than blocking external access to port 2049 on your firewall.
- *
- * Copyright (C) 1995, 1996, 1997 Olaf Kirch <okir@monad.swb.de>
- */
-#ifndef _LINUX_NFSD_FH_H
-#define _LINUX_NFSD_FH_H
-
-# include <linux/sunrpc/svc.h>
-#include <uapi/linux/nfsd/nfsfh.h>
-
-static inline __u32 ino_t_to_u32(ino_t ino)
-{
- return (__u32) ino;
-}
-
-static inline ino_t u32_to_ino_t(__u32 uino)
-{
- return (ino_t) uino;
-}
-
-/*
- * This is the internal representation of an NFS handle used in knfsd.
- * pre_mtime/post_version will be used to support wcc_attr's in NFSv3.
- */
-typedef struct svc_fh {
- struct knfsd_fh fh_handle; /* FH data */
- struct dentry * fh_dentry; /* validated dentry */
- struct svc_export * fh_export; /* export pointer */
- int fh_maxsize; /* max size for fh_handle */
-
- unsigned char fh_locked; /* inode locked by us */
- unsigned char fh_want_write; /* remount protection taken */
-
-#ifdef CONFIG_NFSD_V3
- unsigned char fh_post_saved; /* post-op attrs saved */
- unsigned char fh_pre_saved; /* pre-op attrs saved */
-
- /* Pre-op attributes saved during fh_lock */
- __u64 fh_pre_size; /* size before operation */
- struct timespec fh_pre_mtime; /* mtime before oper */
- struct timespec fh_pre_ctime; /* ctime before oper */
- /*
- * pre-op nfsv4 change attr: note must check IS_I_VERSION(inode)
- * to find out if it is valid.
- */
- u64 fh_pre_change;
-
- /* Post-op attributes saved in fh_unlock */
- struct kstat fh_post_attr; /* full attrs after operation */
- u64 fh_post_change; /* nfsv4 change; see above */
-#endif /* CONFIG_NFSD_V3 */
-
-} svc_fh;
-
-#endif /* _LINUX_NFSD_FH_H */
diff --git a/include/linux/nfsd/stats.h b/include/linux/nfsd/stats.h
deleted file mode 100644
index e75b2544ff12..000000000000
--- a/include/linux/nfsd/stats.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * linux/include/linux/nfsd/stats.h
- *
- * Statistics for NFS server.
- *
- * Copyright (C) 1995, 1996 Olaf Kirch <okir@monad.swb.de>
- */
-#ifndef LINUX_NFSD_STATS_H
-#define LINUX_NFSD_STATS_H
-
-#include <uapi/linux/nfsd/stats.h>
-
-
-struct nfsd_stats {
- unsigned int rchits; /* repcache hits */
- unsigned int rcmisses; /* repcache hits */
- unsigned int rcnocache; /* uncached reqs */
- unsigned int fh_stale; /* FH stale error */
- unsigned int fh_lookup; /* dentry cached */
- unsigned int fh_anon; /* anon file dentry returned */
- unsigned int fh_nocache_dir; /* filehandle not found in dcache */
- unsigned int fh_nocache_nondir; /* filehandle not found in dcache */
- unsigned int io_read; /* bytes returned to read requests */
- unsigned int io_write; /* bytes passed in write requests */
- unsigned int th_cnt; /* number of available threads */
- unsigned int th_usage[10]; /* number of ticks during which n perdeciles
- * of available threads were in use */
- unsigned int th_fullcnt; /* number of times last free thread was used */
- unsigned int ra_size; /* size of ra cache */
- unsigned int ra_depth[11]; /* number of times ra entry was found that deep
- * in the cache (10percentiles). [10] = not found */
-#ifdef CONFIG_NFSD_V4
- unsigned int nfs4_opcount[LAST_NFS4_OP + 1]; /* count of individual nfsv4 operations */
-#endif
-
-};
-
-
-extern struct nfsd_stats nfsdstats;
-extern struct svc_stat nfsd_svcstats;
-
-void nfsd_stat_init(void);
-void nfsd_stat_shutdown(void);
-
-#endif /* LINUX_NFSD_STATS_H */
diff --git a/include/linux/of.h b/include/linux/of.h
index 3bad8d106e0e..196b34c1ef4e 100644
--- a/include/linux/of.h
+++ b/include/linux/of.h
@@ -130,6 +130,12 @@ static inline int of_node_check_flag(struct device_node *n, unsigned long flag)
return test_bit(flag, &n->_flags);
}
+static inline int of_node_test_and_set_flag(struct device_node *n,
+ unsigned long flag)
+{
+ return test_and_set_bit(flag, &n->_flags);
+}
+
static inline void of_node_set_flag(struct device_node *n, unsigned long flag)
{
set_bit(flag, &n->_flags);
@@ -197,6 +203,7 @@ static inline unsigned long of_read_ulong(const __be32 *cell, int size)
/* flag descriptions */
#define OF_DYNAMIC 1 /* node and properties were allocated via kmalloc */
#define OF_DETACHED 2 /* node has been detached from the device tree */
+#define OF_POPULATED 3 /* device already created for the node */
#define OF_IS_DYNAMIC(x) test_bit(OF_DYNAMIC, &x->_flags)
#define OF_MARK_DYNAMIC(x) set_bit(OF_DYNAMIC, &x->_flags)
@@ -349,7 +356,7 @@ int of_device_is_stdout_path(struct device_node *dn);
#else /* CONFIG_OF */
-static inline const char* of_node_full_name(struct device_node *np)
+static inline const char* of_node_full_name(const struct device_node *np)
{
return "<no-node>";
}
@@ -757,4 +764,26 @@ static inline int of_get_available_child_count(const struct device_node *np)
return num;
}
+#ifdef CONFIG_OF
+#define _OF_DECLARE(table, name, compat, fn, fn_type) \
+ static const struct of_device_id __of_table_##name \
+ __used __section(__##table##_of_table) \
+ = { .compatible = compat, \
+ .data = (fn == (fn_type)NULL) ? fn : fn }
+#else
+#define _OF_DECLARE(table, name, compat, fn, fn_type) \
+ static const struct of_device_id __of_table_##name \
+ __attribute__((unused)) \
+ = { .compatible = compat, \
+ .data = (fn == (fn_type)NULL) ? fn : fn }
+#endif
+
+typedef int (*of_init_fn_2)(struct device_node *, struct device_node *);
+typedef void (*of_init_fn_1)(struct device_node *);
+
+#define OF_DECLARE_1(table, name, compat, fn) \
+ _OF_DECLARE(table, name, compat, fn, of_init_fn_1)
+#define OF_DECLARE_2(table, name, compat, fn) \
+ _OF_DECLARE(table, name, compat, fn, of_init_fn_2)
+
#endif /* _LINUX_OF_H */
diff --git a/include/linux/of_address.h b/include/linux/of_address.h
index 5f6ed6b182b8..c13b8782a4eb 100644
--- a/include/linux/of_address.h
+++ b/include/linux/of_address.h
@@ -40,7 +40,6 @@ extern u64 of_translate_dma_address(struct device_node *dev,
#ifdef CONFIG_OF_ADDRESS
extern u64 of_translate_address(struct device_node *np, const __be32 *addr);
-extern bool of_can_translate_address(struct device_node *dev);
extern int of_address_to_resource(struct device_node *dev, int index,
struct resource *r);
extern struct device_node *of_find_matching_node_by_address(
@@ -63,6 +62,9 @@ extern int of_pci_range_parser_init(struct of_pci_range_parser *parser,
extern struct of_pci_range *of_pci_range_parser_one(
struct of_pci_range_parser *parser,
struct of_pci_range *range);
+extern int of_dma_get_range(struct device_node *np, u64 *dma_addr,
+ u64 *paddr, u64 *size);
+extern bool of_dma_is_coherent(struct device_node *np);
#else /* CONFIG_OF_ADDRESS */
static inline struct device_node *of_find_matching_node_by_address(
struct device_node *from,
@@ -90,6 +92,17 @@ static inline struct of_pci_range *of_pci_range_parser_one(
{
return NULL;
}
+
+static inline int of_dma_get_range(struct device_node *np, u64 *dma_addr,
+ u64 *paddr, u64 *size)
+{
+ return -ENODEV;
+}
+
+static inline bool of_dma_is_coherent(struct device_node *np)
+{
+ return false;
+}
#endif /* CONFIG_OF_ADDRESS */
#ifdef CONFIG_OF
diff --git a/include/linux/of_fdt.h b/include/linux/of_fdt.h
index ddd7219af8ac..05117899fcb4 100644
--- a/include/linux/of_fdt.h
+++ b/include/linux/of_fdt.h
@@ -17,60 +17,23 @@
/* Definitions used by the flattened device tree */
#define OF_DT_HEADER 0xd00dfeed /* marker */
-#define OF_DT_BEGIN_NODE 0x1 /* Start of node, full name */
-#define OF_DT_END_NODE 0x2 /* End node */
-#define OF_DT_PROP 0x3 /* Property: name off, size,
- * content */
-#define OF_DT_NOP 0x4 /* nop */
-#define OF_DT_END 0x9
-
-#define OF_DT_VERSION 0x10
#ifndef __ASSEMBLY__
-/*
- * This is what gets passed to the kernel by prom_init or kexec
- *
- * The dt struct contains the device tree structure, full pathes and
- * property contents. The dt strings contain a separate block with just
- * the strings for the property names, and is fully page aligned and
- * self contained in a page, so that it can be kept around by the kernel,
- * each property name appears only once in this page (cheap compression)
- *
- * the mem_rsvmap contains a map of reserved ranges of physical memory,
- * passing it here instead of in the device-tree itself greatly simplifies
- * the job of everybody. It's just a list of u64 pairs (base/size) that
- * ends when size is 0
- */
-struct boot_param_header {
- __be32 magic; /* magic word OF_DT_HEADER */
- __be32 totalsize; /* total size of DT block */
- __be32 off_dt_struct; /* offset to structure */
- __be32 off_dt_strings; /* offset to strings */
- __be32 off_mem_rsvmap; /* offset to memory reserve map */
- __be32 version; /* format version */
- __be32 last_comp_version; /* last compatible version */
- /* version 2 fields below */
- __be32 boot_cpuid_phys; /* Physical CPU id we're booting on */
- /* version 3 fields below */
- __be32 dt_strings_size; /* size of the DT strings block */
- /* version 17 fields below */
- __be32 dt_struct_size; /* size of the DT structure block */
-};
#if defined(CONFIG_OF_FLATTREE)
struct device_node;
/* For scanning an arbitrary device-tree at any time */
-extern char *of_fdt_get_string(struct boot_param_header *blob, u32 offset);
-extern void *of_fdt_get_property(struct boot_param_header *blob,
+extern char *of_fdt_get_string(const void *blob, u32 offset);
+extern void *of_fdt_get_property(const void *blob,
unsigned long node,
const char *name,
- unsigned long *size);
-extern int of_fdt_is_compatible(struct boot_param_header *blob,
+ int *size);
+extern int of_fdt_is_compatible(const void *blob,
unsigned long node,
const char *compat);
-extern int of_fdt_match(struct boot_param_header *blob, unsigned long node,
+extern int of_fdt_match(const void *blob, unsigned long node,
const char *const *compat);
extern void of_fdt_unflatten_tree(unsigned long *blob,
struct device_node **mynodes);
@@ -78,21 +41,21 @@ extern void of_fdt_unflatten_tree(unsigned long *blob,
/* TBD: Temporary export of fdt globals - remove when code fully merged */
extern int __initdata dt_root_addr_cells;
extern int __initdata dt_root_size_cells;
-extern struct boot_param_header *initial_boot_params;
+extern void *initial_boot_params;
+
+extern char __dtb_start[];
+extern char __dtb_end[];
/* For scanning the flat device-tree at boot time */
-extern char *find_flat_dt_string(u32 offset);
extern int of_scan_flat_dt(int (*it)(unsigned long node, const char *uname,
int depth, void *data),
void *data);
-extern void *of_get_flat_dt_prop(unsigned long node, const char *name,
- unsigned long *size);
+extern const void *of_get_flat_dt_prop(unsigned long node, const char *name,
+ int *size);
extern int of_flat_dt_is_compatible(unsigned long node, const char *name);
extern int of_flat_dt_match(unsigned long node, const char *const *matches);
extern unsigned long of_get_flat_dt_root(void);
-extern int of_scan_flat_dt_by_path(const char *path,
- int (*it)(unsigned long node, const char *name, int depth, void *data),
- void *data);
+extern int of_get_flat_dt_size(void);
extern int early_init_dt_scan_chosen(unsigned long node, const char *uname,
int depth, void *data);
@@ -103,7 +66,7 @@ extern void early_init_dt_add_memory_arch(u64 base, u64 size);
extern int early_init_dt_reserve_memory_arch(phys_addr_t base, phys_addr_t size,
bool no_map);
extern void * early_init_dt_alloc_memory_arch(u64 size, u64 align);
-extern u64 dt_mem_next_cell(int s, __be32 **cellp);
+extern u64 dt_mem_next_cell(int s, const __be32 **cellp);
/* Early flat tree scan hooks */
extern int early_init_dt_scan_root(unsigned long node, const char *uname,
@@ -120,6 +83,7 @@ extern void unflatten_device_tree(void);
extern void unflatten_and_copy_device_tree(void);
extern void early_init_devtree(void *);
extern void early_get_first_memblock_info(void *, phys_addr_t *);
+extern u64 fdt_translate_address(const void *blob, int node_offset);
#else /* CONFIG_OF_FLATTREE */
static inline void early_init_fdt_scan_reserved_mem(void) {}
static inline const char *of_flat_dt_get_machine_name(void) { return NULL; }
diff --git a/include/linux/of_gpio.h b/include/linux/of_gpio.h
index f14123a5a9df..38fc05036015 100644
--- a/include/linux/of_gpio.h
+++ b/include/linux/of_gpio.h
@@ -19,7 +19,6 @@
#include <linux/errno.h>
#include <linux/gpio.h>
#include <linux/of.h>
-#include <linux/gpio/consumer.h>
struct device_node;
@@ -48,7 +47,7 @@ static inline struct of_mm_gpio_chip *to_of_mm_gpio_chip(struct gpio_chip *gc)
return container_of(gc, struct of_mm_gpio_chip, gc);
}
-extern struct gpio_desc *of_get_named_gpiod_flags(struct device_node *np,
+extern int of_get_named_gpio_flags(struct device_node *np,
const char *list_name, int index, enum of_gpio_flags *flags);
extern int of_mm_gpiochip_add(struct device_node *np,
@@ -63,10 +62,10 @@ extern int of_gpio_simple_xlate(struct gpio_chip *gc,
#else /* CONFIG_OF_GPIO */
/* Drivers may not strictly depend on the GPIO support, so let them link. */
-static inline struct gpio_desc *of_get_named_gpiod_flags(struct device_node *np,
+static inline int of_get_named_gpio_flags(struct device_node *np,
const char *list_name, int index, enum of_gpio_flags *flags)
{
- return ERR_PTR(-ENOSYS);
+ return -ENOSYS;
}
static inline int of_gpio_simple_xlate(struct gpio_chip *gc,
@@ -81,18 +80,6 @@ static inline void of_gpiochip_remove(struct gpio_chip *gc) { }
#endif /* CONFIG_OF_GPIO */
-static inline int of_get_named_gpio_flags(struct device_node *np,
- const char *list_name, int index, enum of_gpio_flags *flags)
-{
- struct gpio_desc *desc;
- desc = of_get_named_gpiod_flags(np, list_name, index, flags);
-
- if (IS_ERR(desc))
- return PTR_ERR(desc);
- else
- return desc_to_gpio(desc);
-}
-
/**
* of_gpio_named_count() - Count GPIOs for a device
* @np: device node to count GPIOs for
@@ -129,22 +116,6 @@ static inline int of_gpio_count(struct device_node *np)
return of_gpio_named_count(np, "gpios");
}
-/**
- * of_get_gpiod_flags() - Get a GPIO descriptor and flags to use with GPIO API
- * @np: device node to get GPIO from
- * @index: index of the GPIO
- * @flags: a flags pointer to fill in
- *
- * Returns GPIO descriptor to use with Linux generic GPIO API, or a errno
- * value on the error condition. If @flags is not NULL the function also fills
- * in flags for the GPIO.
- */
-static inline struct gpio_desc *of_get_gpiod_flags(struct device_node *np,
- int index, enum of_gpio_flags *flags)
-{
- return of_get_named_gpiod_flags(np, "gpios", index, flags);
-}
-
static inline int of_get_gpio_flags(struct device_node *np, int index,
enum of_gpio_flags *flags)
{
diff --git a/include/linux/of_irq.h b/include/linux/of_irq.h
index 6404253d810d..bfec136a6d1e 100644
--- a/include/linux/of_irq.h
+++ b/include/linux/of_irq.h
@@ -45,6 +45,7 @@ extern void of_irq_init(const struct of_device_id *matches);
#ifdef CONFIG_OF_IRQ
extern int of_irq_count(struct device_node *dev);
extern int of_irq_get(struct device_node *dev, int index);
+extern int of_irq_get_byname(struct device_node *dev, const char *name);
#else
static inline int of_irq_count(struct device_node *dev)
{
@@ -54,6 +55,10 @@ static inline int of_irq_get(struct device_node *dev, int index)
{
return 0;
}
+static inline int of_irq_get_byname(struct device_node *dev, const char *name)
+{
+ return 0;
+}
#endif
#if defined(CONFIG_OF)
diff --git a/include/linux/of_mdio.h b/include/linux/of_mdio.h
index 6fe8464ed767..881a7c3571f4 100644
--- a/include/linux/of_mdio.h
+++ b/include/linux/of_mdio.h
@@ -31,7 +31,12 @@ extern struct mii_bus *of_mdio_find_bus(struct device_node *mdio_np);
#else /* CONFIG_OF */
static inline int of_mdiobus_register(struct mii_bus *mdio, struct device_node *np)
{
- return -ENOSYS;
+ /*
+ * Fall back to the non-DT function to register a bus.
+ * This way, we don't have to keep compat bits around in drivers.
+ */
+
+ return mdiobus_register(mdio);
}
static inline struct phy_device *of_phy_find_device(struct device_node *phy_np)
diff --git a/include/linux/of_pci.h b/include/linux/of_pci.h
index 1a1f5ffd5288..dde3a4a0fa5d 100644
--- a/include/linux/of_pci.h
+++ b/include/linux/of_pci.h
@@ -6,14 +6,44 @@
struct pci_dev;
struct of_phandle_args;
-int of_irq_parse_pci(const struct pci_dev *pdev, struct of_phandle_args *out_irq);
-int of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin);
-
struct device_node;
+
+#ifdef CONFIG_OF
+int of_irq_parse_pci(const struct pci_dev *pdev, struct of_phandle_args *out_irq);
struct device_node *of_pci_find_child_device(struct device_node *parent,
unsigned int devfn);
int of_pci_get_devfn(struct device_node *np);
+int of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin);
int of_pci_parse_bus_range(struct device_node *node, struct resource *res);
+#else
+static inline int of_irq_parse_pci(const struct pci_dev *pdev, struct of_phandle_args *out_irq)
+{
+ return 0;
+}
+
+static inline struct device_node *of_pci_find_child_device(struct device_node *parent,
+ unsigned int devfn)
+{
+ return NULL;
+}
+
+static inline int of_pci_get_devfn(struct device_node *np)
+{
+ return -EINVAL;
+}
+
+static inline int
+of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+ return 0;
+}
+
+static inline int
+of_pci_parse_bus_range(struct device_node *node, struct resource *res)
+{
+ return -EINVAL;
+}
+#endif
#if defined(CONFIG_OF) && defined(CONFIG_PCI_MSI)
int of_pci_msi_chip_add(struct msi_chip *chip);
diff --git a/include/linux/of_platform.h b/include/linux/of_platform.h
index 05cb4a928252..d96e1badbee0 100644
--- a/include/linux/of_platform.h
+++ b/include/linux/of_platform.h
@@ -37,7 +37,7 @@
* Note: Using an auxdata lookup table should be considered a last resort when
* converting a platform to use the DT. Normally the automatically generated
* device name will not matter, and drivers should obtain data from the device
- * node instead of from an anonymouns platform_data pointer.
+ * node instead of from an anonymous platform_data pointer.
*/
struct of_dev_auxdata {
char *compatible;
@@ -72,6 +72,7 @@ extern int of_platform_populate(struct device_node *root,
const struct of_device_id *matches,
const struct of_dev_auxdata *lookup,
struct device *parent);
+extern int of_platform_depopulate(struct device *parent);
#else
static inline int of_platform_populate(struct device_node *root,
const struct of_device_id *matches,
@@ -80,6 +81,10 @@ static inline int of_platform_populate(struct device_node *root,
{
return -ENODEV;
}
+static inline int of_platform_depopulate(struct device *parent)
+{
+ return -ENODEV;
+}
#endif
#endif /* _LINUX_OF_PLATFORM_H */
diff --git a/include/linux/of_reserved_mem.h b/include/linux/of_reserved_mem.h
index 9b1fbb7f29fc..4669ddfdd5af 100644
--- a/include/linux/of_reserved_mem.h
+++ b/include/linux/of_reserved_mem.h
@@ -21,33 +21,19 @@ struct reserved_mem_ops {
struct device *dev);
};
-typedef int (*reservedmem_of_init_fn)(struct reserved_mem *rmem,
- unsigned long node, const char *uname);
+typedef int (*reservedmem_of_init_fn)(struct reserved_mem *rmem);
+
+#define RESERVEDMEM_OF_DECLARE(name, compat, init) \
+ _OF_DECLARE(reservedmem, name, compat, init, reservedmem_of_init_fn)
#ifdef CONFIG_OF_RESERVED_MEM
void fdt_init_reserved_mem(void);
void fdt_reserved_mem_save_node(unsigned long node, const char *uname,
phys_addr_t base, phys_addr_t size);
-
-#define RESERVEDMEM_OF_DECLARE(name, compat, init) \
- static const struct of_device_id __reservedmem_of_table_##name \
- __used __section(__reservedmem_of_table) \
- = { .compatible = compat, \
- .data = (init == (reservedmem_of_init_fn)NULL) ? \
- init : init }
-
#else
static inline void fdt_init_reserved_mem(void) { }
static inline void fdt_reserved_mem_save_node(unsigned long node,
const char *uname, phys_addr_t base, phys_addr_t size) { }
-
-#define RESERVEDMEM_OF_DECLARE(name, compat, init) \
- static const struct of_device_id __reservedmem_of_table_##name \
- __attribute__((unused)) \
- = { .compatible = compat, \
- .data = (init == (reservedmem_of_init_fn)NULL) ? \
- init : init }
-
#endif
#endif /* __OF_RESERVED_MEM_H */
diff --git a/include/linux/omap-dma.h b/include/linux/omap-dma.h
index 41a13e70f41f..88e6ea4a5d36 100644
--- a/include/linux/omap-dma.h
+++ b/include/linux/omap-dma.h
@@ -1,23 +1,6 @@
-/*
- * OMAP DMA Engine support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
#ifndef __LINUX_OMAP_DMA_H
#define __LINUX_OMAP_DMA_H
-
-struct dma_chan;
-
-#if defined(CONFIG_DMA_OMAP) || defined(CONFIG_DMA_OMAP_MODULE)
-bool omap_dma_filter_fn(struct dma_chan *, void *);
-#else
-static inline bool omap_dma_filter_fn(struct dma_chan *c, void *d)
-{
- return false;
-}
-#endif
+#include <linux/omap-dmaengine.h>
/*
* Legacy OMAP DMA handling defines and functions
@@ -393,7 +376,7 @@ extern int omap_modify_dma_chain_params(int chain_id,
extern int omap_dma_chain_status(int chain_id);
#endif
-#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_FB_OMAP)
+#if defined(CONFIG_ARCH_OMAP1) && IS_ENABLED(CONFIG_FB_OMAP)
#include <mach/lcd_dma.h>
#else
static inline int omap_lcd_dma_running(void)
diff --git a/include/linux/omap-dmaengine.h b/include/linux/omap-dmaengine.h
new file mode 100644
index 000000000000..8e6906c72e90
--- /dev/null
+++ b/include/linux/omap-dmaengine.h
@@ -0,0 +1,21 @@
+/*
+ * OMAP DMA Engine support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __LINUX_OMAP_DMAENGINE_H
+#define __LINUX_OMAP_DMAENGINE_H
+
+struct dma_chan;
+
+#if defined(CONFIG_DMA_OMAP) || (defined(CONFIG_DMA_OMAP_MODULE) && defined(MODULE))
+bool omap_dma_filter_fn(struct dma_chan *, void *);
+#else
+static inline bool omap_dma_filter_fn(struct dma_chan *c, void *d)
+{
+ return false;
+}
+#endif
+#endif /* __LINUX_OMAP_DMAENGINE_H */
diff --git a/include/linux/page-flags.h b/include/linux/page-flags.h
index d1fe1a761047..3c545b48aeab 100644
--- a/include/linux/page-flags.h
+++ b/include/linux/page-flags.h
@@ -198,6 +198,7 @@ struct page; /* forward declaration */
TESTPAGEFLAG(Locked, locked)
PAGEFLAG(Error, error) TESTCLEARFLAG(Error, error)
PAGEFLAG(Referenced, referenced) TESTCLEARFLAG(Referenced, referenced)
+ __SETPAGEFLAG(Referenced, referenced)
PAGEFLAG(Dirty, dirty) TESTSCFLAG(Dirty, dirty) __CLEARPAGEFLAG(Dirty, dirty)
PAGEFLAG(LRU, lru) __CLEARPAGEFLAG(LRU, lru)
PAGEFLAG(Active, active) __CLEARPAGEFLAG(Active, active)
@@ -208,6 +209,7 @@ PAGEFLAG(Pinned, pinned) TESTSCFLAG(Pinned, pinned) /* Xen */
PAGEFLAG(SavePinned, savepinned); /* Xen */
PAGEFLAG(Reserved, reserved) __CLEARPAGEFLAG(Reserved, reserved)
PAGEFLAG(SwapBacked, swapbacked) __CLEARPAGEFLAG(SwapBacked, swapbacked)
+ __SETPAGEFLAG(SwapBacked, swapbacked)
__PAGEFLAG(SlobFree, slob_free)
@@ -317,13 +319,23 @@ CLEARPAGEFLAG(Uptodate, uptodate)
extern void cancel_dirty_page(struct page *page, unsigned int account_size);
int test_clear_page_writeback(struct page *page);
-int test_set_page_writeback(struct page *page);
+int __test_set_page_writeback(struct page *page, bool keep_write);
+
+#define test_set_page_writeback(page) \
+ __test_set_page_writeback(page, false)
+#define test_set_page_writeback_keepwrite(page) \
+ __test_set_page_writeback(page, true)
static inline void set_page_writeback(struct page *page)
{
test_set_page_writeback(page);
}
+static inline void set_page_writeback_keepwrite(struct page *page)
+{
+ test_set_page_writeback_keepwrite(page);
+}
+
#ifdef CONFIG_PAGEFLAGS_EXTENDED
/*
* System with lots of page flags available. This allows separate
diff --git a/include/linux/pageblock-flags.h b/include/linux/pageblock-flags.h
index 2ee8cd2466b5..2baeee12f48e 100644
--- a/include/linux/pageblock-flags.h
+++ b/include/linux/pageblock-flags.h
@@ -30,9 +30,12 @@ enum pageblock_bits {
PB_migrate,
PB_migrate_end = PB_migrate + 3 - 1,
/* 3 bits required for migrate types */
-#ifdef CONFIG_COMPACTION
PB_migrate_skip,/* If set the block is skipped by compaction */
-#endif /* CONFIG_COMPACTION */
+
+ /*
+ * Assume the bits will always align on a word. If this assumption
+ * changes then get/set pageblock needs updating.
+ */
NR_PAGEBLOCK_BITS
};
@@ -62,11 +65,26 @@ extern int pageblock_order;
/* Forward declaration */
struct page;
+unsigned long get_pfnblock_flags_mask(struct page *page,
+ unsigned long pfn,
+ unsigned long end_bitidx,
+ unsigned long mask);
+
+void set_pfnblock_flags_mask(struct page *page,
+ unsigned long flags,
+ unsigned long pfn,
+ unsigned long end_bitidx,
+ unsigned long mask);
+
/* Declarations for getting and setting flags. See mm/page_alloc.c */
-unsigned long get_pageblock_flags_group(struct page *page,
- int start_bitidx, int end_bitidx);
-void set_pageblock_flags_group(struct page *page, unsigned long flags,
- int start_bitidx, int end_bitidx);
+#define get_pageblock_flags_group(page, start_bitidx, end_bitidx) \
+ get_pfnblock_flags_mask(page, page_to_pfn(page), \
+ end_bitidx, \
+ (1 << (end_bitidx - start_bitidx + 1)) - 1)
+#define set_pageblock_flags_group(page, flags, start_bitidx, end_bitidx) \
+ set_pfnblock_flags_mask(page, flags, page_to_pfn(page), \
+ end_bitidx, \
+ (1 << (end_bitidx - start_bitidx + 1)) - 1)
#ifdef CONFIG_COMPACTION
#define get_pageblock_skip(page) \
diff --git a/include/linux/pagemap.h b/include/linux/pagemap.h
index 45598f1e9aa3..0a97b583ee8d 100644
--- a/include/linux/pagemap.h
+++ b/include/linux/pagemap.h
@@ -110,7 +110,7 @@ static inline void mapping_set_gfp_mask(struct address_space *m, gfp_t mask)
#define page_cache_get(page) get_page(page)
#define page_cache_release(page) put_page(page)
-void release_pages(struct page **pages, int nr, int cold);
+void release_pages(struct page **pages, int nr, bool cold);
/*
* speculatively take a reference to a page.
@@ -259,12 +259,109 @@ pgoff_t page_cache_next_hole(struct address_space *mapping,
pgoff_t page_cache_prev_hole(struct address_space *mapping,
pgoff_t index, unsigned long max_scan);
+#define FGP_ACCESSED 0x00000001
+#define FGP_LOCK 0x00000002
+#define FGP_CREAT 0x00000004
+#define FGP_WRITE 0x00000008
+#define FGP_NOFS 0x00000010
+#define FGP_NOWAIT 0x00000020
+
+struct page *pagecache_get_page(struct address_space *mapping, pgoff_t offset,
+ int fgp_flags, gfp_t cache_gfp_mask, gfp_t radix_gfp_mask);
+
+/**
+ * find_get_page - find and get a page reference
+ * @mapping: the address_space to search
+ * @offset: the page index
+ *
+ * Looks up the page cache slot at @mapping & @offset. If there is a
+ * page cache page, it is returned with an increased refcount.
+ *
+ * Otherwise, %NULL is returned.
+ */
+static inline struct page *find_get_page(struct address_space *mapping,
+ pgoff_t offset)
+{
+ return pagecache_get_page(mapping, offset, 0, 0, 0);
+}
+
+static inline struct page *find_get_page_flags(struct address_space *mapping,
+ pgoff_t offset, int fgp_flags)
+{
+ return pagecache_get_page(mapping, offset, fgp_flags, 0, 0);
+}
+
+/**
+ * find_lock_page - locate, pin and lock a pagecache page
+ * pagecache_get_page - find and get a page reference
+ * @mapping: the address_space to search
+ * @offset: the page index
+ *
+ * Looks up the page cache slot at @mapping & @offset. If there is a
+ * page cache page, it is returned locked and with an increased
+ * refcount.
+ *
+ * Otherwise, %NULL is returned.
+ *
+ * find_lock_page() may sleep.
+ */
+static inline struct page *find_lock_page(struct address_space *mapping,
+ pgoff_t offset)
+{
+ return pagecache_get_page(mapping, offset, FGP_LOCK, 0, 0);
+}
+
+/**
+ * find_or_create_page - locate or add a pagecache page
+ * @mapping: the page's address_space
+ * @index: the page's index into the mapping
+ * @gfp_mask: page allocation mode
+ *
+ * Looks up the page cache slot at @mapping & @offset. If there is a
+ * page cache page, it is returned locked and with an increased
+ * refcount.
+ *
+ * If the page is not present, a new page is allocated using @gfp_mask
+ * and added to the page cache and the VM's LRU list. The page is
+ * returned locked and with an increased refcount.
+ *
+ * On memory exhaustion, %NULL is returned.
+ *
+ * find_or_create_page() may sleep, even if @gfp_flags specifies an
+ * atomic allocation!
+ */
+static inline struct page *find_or_create_page(struct address_space *mapping,
+ pgoff_t offset, gfp_t gfp_mask)
+{
+ return pagecache_get_page(mapping, offset,
+ FGP_LOCK|FGP_ACCESSED|FGP_CREAT,
+ gfp_mask, gfp_mask & GFP_RECLAIM_MASK);
+}
+
+/**
+ * grab_cache_page_nowait - returns locked page at given index in given cache
+ * @mapping: target address_space
+ * @index: the page index
+ *
+ * Same as grab_cache_page(), but do not wait if the page is unavailable.
+ * This is intended for speculative data generators, where the data can
+ * be regenerated if the page couldn't be grabbed. This routine should
+ * be safe to call while holding the lock for another page.
+ *
+ * Clear __GFP_FS when allocating the page to avoid recursion into the fs
+ * and deadlock against the caller's locked page.
+ */
+static inline struct page *grab_cache_page_nowait(struct address_space *mapping,
+ pgoff_t index)
+{
+ return pagecache_get_page(mapping, index,
+ FGP_LOCK|FGP_CREAT|FGP_NOFS|FGP_NOWAIT,
+ mapping_gfp_mask(mapping),
+ GFP_NOFS);
+}
+
struct page *find_get_entry(struct address_space *mapping, pgoff_t offset);
-struct page *find_get_page(struct address_space *mapping, pgoff_t offset);
struct page *find_lock_entry(struct address_space *mapping, pgoff_t offset);
-struct page *find_lock_page(struct address_space *mapping, pgoff_t offset);
-struct page *find_or_create_page(struct address_space *mapping, pgoff_t index,
- gfp_t gfp_mask);
unsigned find_get_entries(struct address_space *mapping, pgoff_t start,
unsigned int nr_entries, struct page **entries,
pgoff_t *indices);
@@ -287,8 +384,6 @@ static inline struct page *grab_cache_page(struct address_space *mapping,
return find_or_create_page(mapping, index, mapping_gfp_mask(mapping));
}
-extern struct page * grab_cache_page_nowait(struct address_space *mapping,
- pgoff_t index);
extern struct page * read_cache_page(struct address_space *mapping,
pgoff_t index, filler_t *filler, void *data);
extern struct page * read_cache_page_gfp(struct address_space *mapping,
@@ -425,6 +520,8 @@ static inline void wait_on_page_writeback(struct page *page)
extern void end_page_writeback(struct page *page);
void wait_for_stable_page(struct page *page);
+void page_endio(struct page *page, int rw, int err);
+
/*
* Add an arbitrary waiter to a page's wait queue
*/
diff --git a/include/linux/pci.h b/include/linux/pci.h
index aab57b4abe7f..71d9673c1b2c 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -365,6 +365,7 @@ struct pci_dev {
#endif
phys_addr_t rom; /* Physical address of ROM if it's not from the BAR */
size_t romlen; /* Length of ROM if it's not from the BAR */
+ char *driver_override; /* Driver name to force a match */
};
static inline struct pci_dev *pci_physfn(struct pci_dev *dev)
@@ -477,6 +478,19 @@ static inline bool pci_is_root_bus(struct pci_bus *pbus)
return !(pbus->parent);
}
+/**
+ * pci_is_bridge - check if the PCI device is a bridge
+ * @dev: PCI device
+ *
+ * Return true if the PCI device is bridge whether it has subordinate
+ * or not.
+ */
+static inline bool pci_is_bridge(struct pci_dev *dev)
+{
+ return dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
+ dev->hdr_type == PCI_HEADER_TYPE_CARDBUS;
+}
+
static inline struct pci_dev *pci_upstream_bridge(struct pci_dev *dev)
{
dev = pci_physfn(dev);
@@ -518,7 +532,7 @@ static inline int pcibios_err_to_errno(int err)
case PCIBIOS_FUNC_NOT_SUPPORTED:
return -ENOENT;
case PCIBIOS_BAD_VENDOR_ID:
- return -EINVAL;
+ return -ENOTTY;
case PCIBIOS_DEVICE_NOT_FOUND:
return -ENODEV;
case PCIBIOS_BAD_REGISTER_NUMBER:
@@ -529,7 +543,7 @@ static inline int pcibios_err_to_errno(int err)
return -ENOSPC;
}
- return -ENOTTY;
+ return -ERANGE;
}
/* Low-level architecture-dependent routines */
@@ -603,6 +617,9 @@ struct pci_error_handlers {
/* PCI slot has been reset */
pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
+ /* PCI function reset prepare or completed */
+ void (*reset_notify)(struct pci_dev *dev, bool prepare);
+
/* Device driver may resume normal operations */
void (*resume)(struct pci_dev *dev);
};
@@ -680,8 +697,8 @@ struct pci_driver {
/**
* PCI_VDEVICE - macro used to describe a specific pci device in short form
- * @vendor: the vendor name
- * @device: the 16 bit PCI Device ID
+ * @vend: the vendor name
+ * @dev: the 16 bit PCI Device ID
*
* This macro is used to create a struct pci_device_id that matches a
* specific PCI device. The subvendor, and subdevice fields will be set
@@ -689,9 +706,9 @@ struct pci_driver {
* private data.
*/
-#define PCI_VDEVICE(vendor, device) \
- PCI_VENDOR_ID_##vendor, (device), \
- PCI_ANY_ID, PCI_ANY_ID, 0, 0
+#define PCI_VDEVICE(vend, dev) \
+ .vendor = PCI_VENDOR_ID_##vend, .device = (dev), \
+ .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, 0, 0
/* these external functions are only available when PCI support is enabled */
#ifdef CONFIG_PCI
@@ -764,7 +781,7 @@ int pci_scan_slot(struct pci_bus *bus, int devfn);
struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
unsigned int pci_scan_child_bus(struct pci_bus *bus);
-int __must_check pci_bus_add_device(struct pci_dev *dev);
+void pci_bus_add_device(struct pci_dev *dev);
void pci_read_bridge_bases(struct pci_bus *child);
struct resource *pci_find_parent_resource(const struct pci_dev *dev,
struct resource *res);
@@ -1158,7 +1175,6 @@ struct msix_entry {
#ifdef CONFIG_PCI_MSI
int pci_msi_vec_count(struct pci_dev *dev);
-int pci_enable_msi_block(struct pci_dev *dev, int nvec);
void pci_msi_shutdown(struct pci_dev *dev);
void pci_disable_msi(struct pci_dev *dev);
int pci_msix_vec_count(struct pci_dev *dev);
@@ -1188,8 +1204,6 @@ static inline int pci_enable_msix_exact(struct pci_dev *dev,
}
#else
static inline int pci_msi_vec_count(struct pci_dev *dev) { return -ENOSYS; }
-static inline int pci_enable_msi_block(struct pci_dev *dev, int nvec)
-{ return -ENOSYS; }
static inline void pci_msi_shutdown(struct pci_dev *dev) { }
static inline void pci_disable_msi(struct pci_dev *dev) { }
static inline int pci_msix_vec_count(struct pci_dev *dev) { return -ENOSYS; }
@@ -1244,7 +1258,7 @@ static inline void pcie_set_ecrc_checking(struct pci_dev *dev) { }
static inline void pcie_ecrc_get_policy(char *str) { }
#endif
-#define pci_enable_msi(pdev) pci_enable_msi_block(pdev, 1)
+#define pci_enable_msi(pdev) pci_enable_msi_exact(pdev, 1)
#ifdef CONFIG_HT_IRQ
/* The functions a driver should call */
@@ -1572,13 +1586,13 @@ extern unsigned long pci_hotplug_io_size;
extern unsigned long pci_hotplug_mem_size;
/* Architecture-specific versions may override these (weak) */
-int pcibios_add_platform_entries(struct pci_dev *dev);
void pcibios_disable_device(struct pci_dev *dev);
void pcibios_set_master(struct pci_dev *dev);
int pcibios_set_pcie_reset_state(struct pci_dev *dev,
enum pcie_reset_state state);
int pcibios_add_device(struct pci_dev *dev);
void pcibios_release_device(struct pci_dev *dev);
+void pcibios_penalize_isa_irq(int irq, int active);
#ifdef CONFIG_HIBERNATE_CALLBACKS
extern struct dev_pm_ops pcibios_pm_ops;
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index d4de24b4d4c6..7fa31731c854 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -1631,8 +1631,6 @@
#define PCI_DEVICE_ID_ATT_VENUS_MODEM 0x480
#define PCI_VENDOR_ID_SPECIALIX 0x11cb
-#define PCI_DEVICE_ID_SPECIALIX_IO8 0x2000
-#define PCI_DEVICE_ID_SPECIALIX_RIO 0x8000
#define PCI_SUBDEVICE_ID_SPECIALIX_SPEED4 0xa004
#define PCI_VENDOR_ID_ANALOG_DEVICES 0x11d4
@@ -2874,7 +2872,6 @@
#define PCI_DEVICE_ID_SCALEMP_VSMP_CTL 0x1010
#define PCI_VENDOR_ID_COMPUTONE 0x8e0e
-#define PCI_DEVICE_ID_COMPUTONE_IP2EX 0x0291
#define PCI_DEVICE_ID_COMPUTONE_PG 0x0302
#define PCI_SUBVENDOR_ID_COMPUTONE 0x8e0e
#define PCI_SUBDEVICE_ID_COMPUTONE_PG4 0x0001
diff --git a/include/linux/percpu-refcount.h b/include/linux/percpu-refcount.h
index 95961f0bf62d..5d8920e23073 100644
--- a/include/linux/percpu-refcount.h
+++ b/include/linux/percpu-refcount.h
@@ -110,7 +110,7 @@ static inline void percpu_ref_get(struct percpu_ref *ref)
pcpu_count = ACCESS_ONCE(ref->pcpu_count);
if (likely(REF_STATUS(pcpu_count) == PCPU_REF_PTR))
- __this_cpu_inc(*pcpu_count);
+ this_cpu_inc(*pcpu_count);
else
atomic_inc(&ref->count);
@@ -121,6 +121,36 @@ static inline void percpu_ref_get(struct percpu_ref *ref)
* percpu_ref_tryget - try to increment a percpu refcount
* @ref: percpu_ref to try-get
*
+ * Increment a percpu refcount unless its count already reached zero.
+ * Returns %true on success; %false on failure.
+ *
+ * The caller is responsible for ensuring that @ref stays accessible.
+ */
+static inline bool percpu_ref_tryget(struct percpu_ref *ref)
+{
+ unsigned __percpu *pcpu_count;
+ int ret = false;
+
+ rcu_read_lock_sched();
+
+ pcpu_count = ACCESS_ONCE(ref->pcpu_count);
+
+ if (likely(REF_STATUS(pcpu_count) == PCPU_REF_PTR)) {
+ this_cpu_inc(*pcpu_count);
+ ret = true;
+ } else {
+ ret = atomic_inc_not_zero(&ref->count);
+ }
+
+ rcu_read_unlock_sched();
+
+ return ret;
+}
+
+/**
+ * percpu_ref_tryget_live - try to increment a live percpu refcount
+ * @ref: percpu_ref to try-get
+ *
* Increment a percpu refcount unless it has already been killed. Returns
* %true on success; %false on failure.
*
@@ -128,8 +158,10 @@ static inline void percpu_ref_get(struct percpu_ref *ref)
* will fail. For such guarantee, percpu_ref_kill_and_confirm() should be
* used. After the confirm_kill callback is invoked, it's guaranteed that
* no new reference will be given out by percpu_ref_tryget().
+ *
+ * The caller is responsible for ensuring that @ref stays accessible.
*/
-static inline bool percpu_ref_tryget(struct percpu_ref *ref)
+static inline bool percpu_ref_tryget_live(struct percpu_ref *ref)
{
unsigned __percpu *pcpu_count;
int ret = false;
@@ -139,7 +171,7 @@ static inline bool percpu_ref_tryget(struct percpu_ref *ref)
pcpu_count = ACCESS_ONCE(ref->pcpu_count);
if (likely(REF_STATUS(pcpu_count) == PCPU_REF_PTR)) {
- __this_cpu_inc(*pcpu_count);
+ this_cpu_inc(*pcpu_count);
ret = true;
}
@@ -164,7 +196,7 @@ static inline void percpu_ref_put(struct percpu_ref *ref)
pcpu_count = ACCESS_ONCE(ref->pcpu_count);
if (likely(REF_STATUS(pcpu_count) == PCPU_REF_PTR))
- __this_cpu_dec(*pcpu_count);
+ this_cpu_dec(*pcpu_count);
else if (unlikely(atomic_dec_and_test(&ref->count)))
ref->release(ref);
diff --git a/include/linux/percpu.h b/include/linux/percpu.h
index e7a0b95ed527..8419053d0f2e 100644
--- a/include/linux/percpu.h
+++ b/include/linux/percpu.h
@@ -29,7 +29,7 @@
*/
#define get_cpu_var(var) (*({ \
preempt_disable(); \
- &__get_cpu_var(var); }))
+ this_cpu_ptr(&var); }))
/*
* The weird & is necessary because sparse considers (void)(var) to be
@@ -639,7 +639,7 @@ do { \
# define raw_cpu_add_return_8(pcp, val) raw_cpu_generic_add_return(pcp, val)
# endif
# define raw_cpu_add_return(pcp, val) \
- __pcpu_size_call_return2(raw_add_return_, pcp, val)
+ __pcpu_size_call_return2(raw_cpu_add_return_, pcp, val)
#endif
#define raw_cpu_sub_return(pcp, val) raw_cpu_add_return(pcp, -(typeof(pcp))(val))
diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
index 3356abcfff18..a9209118d80f 100644
--- a/include/linux/perf_event.h
+++ b/include/linux/perf_event.h
@@ -172,6 +172,7 @@ struct perf_event;
struct pmu {
struct list_head entry;
+ struct module *module;
struct device *dev;
const struct attribute_group **attr_groups;
const char *name;
@@ -402,6 +403,8 @@ struct perf_event {
struct ring_buffer *rb;
struct list_head rb_entry;
+ unsigned long rcu_batches;
+ int rcu_pending;
/* poll related */
wait_queue_head_t waitq;
diff --git a/include/linux/platform_data/adau17x1.h b/include/linux/platform_data/adau17x1.h
new file mode 100644
index 000000000000..a81766cae230
--- /dev/null
+++ b/include/linux/platform_data/adau17x1.h
@@ -0,0 +1,109 @@
+/*
+ * Driver for ADAU1761/ADAU1461/ADAU1761/ADAU1961/ADAU1781/ADAU1781 codecs
+ *
+ * Copyright 2011-2014 Analog Devices Inc.
+ * Author: Lars-Peter Clausen <lars@metafoo.de>
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef __LINUX_PLATFORM_DATA_ADAU17X1_H__
+#define __LINUX_PLATFORM_DATA_ADAU17X1_H__
+
+/**
+ * enum adau17x1_micbias_voltage - Microphone bias voltage
+ * @ADAU17X1_MICBIAS_0_90_AVDD: 0.9 * AVDD
+ * @ADAU17X1_MICBIAS_0_65_AVDD: 0.65 * AVDD
+ */
+enum adau17x1_micbias_voltage {
+ ADAU17X1_MICBIAS_0_90_AVDD = 0,
+ ADAU17X1_MICBIAS_0_65_AVDD = 1,
+};
+
+/**
+ * enum adau1761_digmic_jackdet_pin_mode - Configuration of the JACKDET/MICIN pin
+ * @ADAU1761_DIGMIC_JACKDET_PIN_MODE_NONE: Disable the pin
+ * @ADAU1761_DIGMIC_JACKDET_PIN_MODE_DIGMIC: Configure the pin for usage as
+ * digital microphone input.
+ * @ADAU1761_DIGMIC_JACKDET_PIN_MODE_JACKDETECT: Configure the pin for jack
+ * insertion detection.
+ */
+enum adau1761_digmic_jackdet_pin_mode {
+ ADAU1761_DIGMIC_JACKDET_PIN_MODE_NONE,
+ ADAU1761_DIGMIC_JACKDET_PIN_MODE_DIGMIC,
+ ADAU1761_DIGMIC_JACKDET_PIN_MODE_JACKDETECT,
+};
+
+/**
+ * adau1761_jackdetect_debounce_time - Jack insertion detection debounce time
+ * @ADAU1761_JACKDETECT_DEBOUNCE_5MS: 5 milliseconds
+ * @ADAU1761_JACKDETECT_DEBOUNCE_10MS: 10 milliseconds
+ * @ADAU1761_JACKDETECT_DEBOUNCE_20MS: 20 milliseconds
+ * @ADAU1761_JACKDETECT_DEBOUNCE_40MS: 40 milliseconds
+ */
+enum adau1761_jackdetect_debounce_time {
+ ADAU1761_JACKDETECT_DEBOUNCE_5MS = 0,
+ ADAU1761_JACKDETECT_DEBOUNCE_10MS = 1,
+ ADAU1761_JACKDETECT_DEBOUNCE_20MS = 2,
+ ADAU1761_JACKDETECT_DEBOUNCE_40MS = 3,
+};
+
+/**
+ * enum adau1761_output_mode - Output mode configuration
+ * @ADAU1761_OUTPUT_MODE_HEADPHONE: Headphone output
+ * @ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS: Capless headphone output
+ * @ADAU1761_OUTPUT_MODE_LINE: Line output
+ */
+enum adau1761_output_mode {
+ ADAU1761_OUTPUT_MODE_HEADPHONE,
+ ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS,
+ ADAU1761_OUTPUT_MODE_LINE,
+};
+
+/**
+ * struct adau1761_platform_data - ADAU1761 Codec driver platform data
+ * @input_differential: If true the input pins will be configured in
+ * differential mode.
+ * @lineout_mode: Output mode for the LOUT/ROUT pins
+ * @headphone_mode: Output mode for the LHP/RHP pins
+ * @digmic_jackdetect_pin_mode: JACKDET/MICIN pin configuration
+ * @jackdetect_debounce_time: Jack insertion detection debounce time.
+ * Note: This value will only be used, if the JACKDET/MICIN pin is configured
+ * for jack insertion detection.
+ * @jackdetect_active_low: If true the jack insertion detection is active low.
+ * Othwise it will be active high.
+ * @micbias_voltage: Microphone voltage bias
+ */
+struct adau1761_platform_data {
+ bool input_differential;
+ enum adau1761_output_mode lineout_mode;
+ enum adau1761_output_mode headphone_mode;
+
+ enum adau1761_digmic_jackdet_pin_mode digmic_jackdetect_pin_mode;
+
+ enum adau1761_jackdetect_debounce_time jackdetect_debounce_time;
+ bool jackdetect_active_low;
+
+ enum adau17x1_micbias_voltage micbias_voltage;
+};
+
+/**
+ * struct adau1781_platform_data - ADAU1781 Codec driver platform data
+ * @left_input_differential: If true configure the left input as
+ * differential input.
+ * @right_input_differential: If true configure the right input as differntial
+ * input.
+ * @use_dmic: If true configure the MIC pins as digital microphone pins instead
+ * of analog microphone pins.
+ * @micbias_voltage: Microphone voltage bias
+ */
+struct adau1781_platform_data {
+ bool left_input_differential;
+ bool right_input_differential;
+
+ bool use_dmic;
+
+ enum adau17x1_micbias_voltage micbias_voltage;
+};
+
+#endif
diff --git a/include/linux/platform_data/at91_adc.h b/include/linux/platform_data/at91_adc.h
index b3ca1e94e0c8..7819fc787731 100644
--- a/include/linux/platform_data/at91_adc.h
+++ b/include/linux/platform_data/at91_adc.h
@@ -7,23 +7,10 @@
#ifndef _AT91_ADC_H_
#define _AT91_ADC_H_
-/**
- * struct at91_adc_reg_desc - Various informations relative to registers
- * @channel_base: Base offset for the channel data registers
- * @drdy_mask: Mask of the DRDY field in the relevant registers
- (Interruptions registers mostly)
- * @status_register: Offset of the Interrupt Status Register
- * @trigger_register: Offset of the Trigger setup register
- * @mr_prescal_mask: Mask of the PRESCAL field in the adc MR register
- * @mr_startup_mask: Mask of the STARTUP field in the adc MR register
- */
-struct at91_adc_reg_desc {
- u8 channel_base;
- u32 drdy_mask;
- u8 status_register;
- u8 trigger_register;
- u32 mr_prescal_mask;
- u32 mr_startup_mask;
+enum atmel_adc_ts_type {
+ ATMEL_ADC_TOUCHSCREEN_NONE = 0,
+ ATMEL_ADC_TOUCHSCREEN_4WIRE = 4,
+ ATMEL_ADC_TOUCHSCREEN_5WIRE = 5,
};
/**
@@ -42,23 +29,21 @@ struct at91_adc_trigger {
/**
* struct at91_adc_data - platform data for ADC driver
* @channels_used: channels in use on the board as a bitmask
- * @num_channels: global number of channels available on the board
- * @registers: Registers definition on the board
* @startup_time: startup time of the ADC in microseconds
* @trigger_list: Triggers available in the ADC
* @trigger_number: Number of triggers available in the ADC
* @use_external_triggers: does the board has external triggers availables
* @vref: Reference voltage for the ADC in millivolts
+ * @touchscreen_type: If a touchscreen is connected, its type (4 or 5 wires)
*/
struct at91_adc_data {
unsigned long channels_used;
- u8 num_channels;
- struct at91_adc_reg_desc *registers;
u8 startup_time;
struct at91_adc_trigger *trigger_list;
u8 trigger_number;
bool use_external_triggers;
u16 vref;
+ enum atmel_adc_ts_type touchscreen_type;
};
extern void __init at91_add_device_adc(struct at91_adc_data *data);
diff --git a/include/linux/platform_data/atmel.h b/include/linux/platform_data/atmel.h
index e26b0c14edea..4b452c6a2f7b 100644
--- a/include/linux/platform_data/atmel.h
+++ b/include/linux/platform_data/atmel.h
@@ -84,14 +84,6 @@ struct atmel_uart_data {
short use_dma_rx; /* use receive DMA? */
void __iomem *regs; /* virt. base address, if any */
struct serial_rs485 rs485; /* rs485 settings */
- int rts_gpio; /* optional RTS GPIO */
-};
-
- /* Touchscreen Controller */
-struct at91_tsadcc_data {
- unsigned int adc_clock;
- u8 pendet_debounce;
- u8 ts_sample_hold_time;
};
/* CAN */
diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h
index f50821cb64be..eb8d5627d080 100644
--- a/include/linux/platform_data/edma.h
+++ b/include/linux/platform_data/edma.h
@@ -43,15 +43,15 @@
/* PaRAM slots are laid out like this */
struct edmacc_param {
- unsigned int opt;
- unsigned int src;
- unsigned int a_b_cnt;
- unsigned int dst;
- unsigned int src_dst_bidx;
- unsigned int link_bcntrld;
- unsigned int src_dst_cidx;
- unsigned int ccnt;
-};
+ u32 opt;
+ u32 src;
+ u32 a_b_cnt;
+ u32 dst;
+ u32 src_dst_bidx;
+ u32 link_bcntrld;
+ u32 src_dst_cidx;
+ u32 ccnt;
+} __packed;
/* fields in edmacc_param.opt */
#define SAM BIT(0)
@@ -130,7 +130,7 @@ void edma_set_src(unsigned slot, dma_addr_t src_port,
enum address_mode mode, enum fifo_width);
void edma_set_dest(unsigned slot, dma_addr_t dest_port,
enum address_mode mode, enum fifo_width);
-void edma_get_position(unsigned slot, dma_addr_t *src, dma_addr_t *dst);
+dma_addr_t edma_get_position(unsigned slot, bool dst);
void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx);
void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx);
void edma_set_transfer_params(unsigned slot, u16 acnt, u16 bcnt, u16 ccnt,
@@ -158,13 +158,6 @@ struct edma_rsv_info {
/* platform_data for EDMA driver */
struct edma_soc_info {
-
- /* how many dma resources of each type */
- unsigned n_channel;
- unsigned n_region;
- unsigned n_slot;
- unsigned n_tc;
- unsigned n_cc;
/*
* Default queue is expected to be a low-priority queue.
* This way, long transfers on the default queue started
@@ -175,7 +168,6 @@ struct edma_soc_info {
/* Resource reservation for other cores */
struct edma_rsv_info *rsv;
- s8 (*queue_tc_mapping)[2];
s8 (*queue_priority_mapping)[2];
const s16 (*xbar_chans)[2];
};
diff --git a/include/linux/platform_data/elm.h b/include/linux/platform_data/elm.h
index 4edb40676b3f..780d1e97f620 100644
--- a/include/linux/platform_data/elm.h
+++ b/include/linux/platform_data/elm.h
@@ -21,6 +21,7 @@
enum bch_ecc {
BCH4_ECC = 0,
BCH8_ECC,
+ BCH16_ECC,
};
/* ELM support 8 error syndrome process */
@@ -38,7 +39,7 @@ struct elm_errorvec {
bool error_reported;
bool error_uncorrectable;
int error_count;
- int error_loc[ERROR_VECTOR_MAX];
+ int error_loc[16];
};
void elm_decode_bch_error_page(struct device *dev, u8 *ecc_calc,
diff --git a/include/linux/platform_data/intel-mid_wdt.h b/include/linux/platform_data/intel-mid_wdt.h
new file mode 100644
index 000000000000..b98253466ace
--- /dev/null
+++ b/include/linux/platform_data/intel-mid_wdt.h
@@ -0,0 +1,22 @@
+/*
+ * intel-mid_wdt: generic Intel MID SCU watchdog driver
+ *
+ * Copyright (C) 2014 Intel Corporation. All rights reserved.
+ * Contact: David Cohen <david.a.cohen@linux.intel.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of version 2 of the GNU General
+ * Public License as published by the Free Software Foundation.
+ */
+
+#ifndef __INTEL_MID_WDT_H__
+#define __INTEL_MID_WDT_H__
+
+#include <linux/platform_device.h>
+
+struct intel_mid_wdt_pdata {
+ int irq;
+ int (*probe)(struct platform_device *pdev);
+};
+
+#endif /*__INTEL_MID_WDT_H__*/
diff --git a/include/linux/platform_data/ipmmu-vmsa.h b/include/linux/platform_data/ipmmu-vmsa.h
new file mode 100644
index 000000000000..5275b3ac6d37
--- /dev/null
+++ b/include/linux/platform_data/ipmmu-vmsa.h
@@ -0,0 +1,24 @@
+/*
+ * IPMMU VMSA Platform Data
+ *
+ * Copyright (C) 2014 Renesas Electronics Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+
+#ifndef __IPMMU_VMSA_H__
+#define __IPMMU_VMSA_H__
+
+struct ipmmu_vmsa_master {
+ const char *name;
+ unsigned int utlb;
+};
+
+struct ipmmu_vmsa_platform_data {
+ const struct ipmmu_vmsa_master *masters;
+ unsigned int num_masters;
+};
+
+#endif /* __IPMMU_VMSA_H__ */
diff --git a/include/linux/platform_data/max3421-hcd.h b/include/linux/platform_data/max3421-hcd.h
new file mode 100644
index 000000000000..0303d1970084
--- /dev/null
+++ b/include/linux/platform_data/max3421-hcd.h
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2014 eGauge Systems LLC
+ * Contributed by David Mosberger-Tang <davidm@egauge.net>
+ *
+ * Platform-data structure for MAX3421 USB HCD driver.
+ *
+ */
+#ifndef MAX3421_HCD_PLAT_H_INCLUDED
+#define MAX3421_HCD_PLAT_H_INCLUDED
+
+/*
+ * This structure defines the mapping of certain auxiliary functions to the
+ * MAX3421E GPIO pins. The chip has eight GP inputs and eight GP outputs.
+ * A value of 0 indicates that the pin is not used/wired to anything.
+ *
+ * At this point, the only control the max3421-hcd driver cares about is
+ * to control Vbus (5V to the peripheral).
+ */
+struct max3421_hcd_platform_data {
+ u8 vbus_gpout; /* pin controlling Vbus */
+ u8 vbus_active_level; /* level that turns on power */
+};
+
+#endif /* MAX3421_HCD_PLAT_H_INCLUDED */
diff --git a/include/linux/platform_data/mipi-csis.h b/include/linux/platform_data/mipi-csis.h
deleted file mode 100644
index c2fd9024717c..000000000000
--- a/include/linux/platform_data/mipi-csis.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd.
- *
- * Samsung S5P/Exynos SoC series MIPI CSIS device support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __PLAT_SAMSUNG_MIPI_CSIS_H_
-#define __PLAT_SAMSUNG_MIPI_CSIS_H_ __FILE__
-
-/**
- * struct s5p_platform_mipi_csis - platform data for S5P MIPI-CSIS driver
- * @clk_rate: bus clock frequency
- * @wclk_source: CSI wrapper clock selection: 0 - bus clock, 1 - ext. SCLK_CAM
- * @lanes: number of data lanes used
- * @hs_settle: HS-RX settle time
- */
-struct s5p_platform_mipi_csis {
- unsigned long clk_rate;
- u8 wclk_source;
- u8 lanes;
- u8 hs_settle;
-};
-
-#endif /* __PLAT_SAMSUNG_MIPI_CSIS_H_ */
diff --git a/include/linux/platform_data/mtd-nand-omap2.h b/include/linux/platform_data/mtd-nand-omap2.h
index 3e9dd6676b97..660c029d694f 100644
--- a/include/linux/platform_data/mtd-nand-omap2.h
+++ b/include/linux/platform_data/mtd-nand-omap2.h
@@ -31,6 +31,8 @@ enum omap_ecc {
OMAP_ECC_BCH8_CODE_HW_DETECTION_SW,
/* 8-bit ECC calculation by GPMC, Error detection by ELM */
OMAP_ECC_BCH8_CODE_HW,
+ /* 16-bit ECC calculation by GPMC, Error detection by ELM */
+ OMAP_ECC_BCH16_CODE_HW,
};
struct gpmc_nand_regs {
@@ -50,6 +52,9 @@ struct gpmc_nand_regs {
void __iomem *gpmc_bch_result1[GPMC_BCH_NUM_REMAINDER];
void __iomem *gpmc_bch_result2[GPMC_BCH_NUM_REMAINDER];
void __iomem *gpmc_bch_result3[GPMC_BCH_NUM_REMAINDER];
+ void __iomem *gpmc_bch_result4[GPMC_BCH_NUM_REMAINDER];
+ void __iomem *gpmc_bch_result5[GPMC_BCH_NUM_REMAINDER];
+ void __iomem *gpmc_bch_result6[GPMC_BCH_NUM_REMAINDER];
};
struct omap_nand_platform_data {
diff --git a/include/linux/platform_data/mtd-nand-pxa3xx.h b/include/linux/platform_data/mtd-nand-pxa3xx.h
index a94147124929..ac4ea2e641c7 100644
--- a/include/linux/platform_data/mtd-nand-pxa3xx.h
+++ b/include/linux/platform_data/mtd-nand-pxa3xx.h
@@ -58,6 +58,9 @@ struct pxa3xx_nand_platform_data {
/* use an flash-based bad block table */
bool flash_bbt;
+ /* requested ECC strength and ECC step size */
+ int ecc_strength, ecc_step_size;
+
const struct mtd_partition *parts[NUM_CHIP_SELECT];
unsigned int nr_parts[NUM_CHIP_SELECT];
diff --git a/include/linux/platform_data/omap4-keypad.h b/include/linux/platform_data/omap4-keypad.h
deleted file mode 100644
index 4eef5fb05a17..000000000000
--- a/include/linux/platform_data/omap4-keypad.h
+++ /dev/null
@@ -1,13 +0,0 @@
-#ifndef __LINUX_INPUT_OMAP4_KEYPAD_H
-#define __LINUX_INPUT_OMAP4_KEYPAD_H
-
-#include <linux/input/matrix_keypad.h>
-
-struct omap4_keypad_platform_data {
- const struct matrix_keymap_data *keymap_data;
-
- u8 rows;
- u8 cols;
-};
-
-#endif /* __LINUX_INPUT_OMAP4_KEYPAD_H */
diff --git a/include/linux/platform_data/pwm-renesas-tpu.h b/include/linux/platform_data/pwm-renesas-tpu.h
deleted file mode 100644
index a7220b10ddab..000000000000
--- a/include/linux/platform_data/pwm-renesas-tpu.h
+++ /dev/null
@@ -1,16 +0,0 @@
-#ifndef __PWM_RENESAS_TPU_H__
-#define __PWM_RENESAS_TPU_H__
-
-#include <linux/pwm.h>
-
-#define TPU_CHANNEL_MAX 4
-
-struct tpu_pwm_channel_data {
- enum pwm_polarity polarity;
-};
-
-struct tpu_pwm_platform_data {
- struct tpu_pwm_channel_data channels[TPU_CHANNEL_MAX];
-};
-
-#endif /* __PWM_RENESAS_TPU_H__ */
diff --git a/include/linux/platform_data/syscon.h b/include/linux/platform_data/syscon.h
new file mode 100644
index 000000000000..2354c6fa3726
--- /dev/null
+++ b/include/linux/platform_data/syscon.h
@@ -0,0 +1,8 @@
+#ifndef PLATFORM_DATA_SYSCON_H
+#define PLATFORM_DATA_SYSCON_H
+
+struct syscon_platform_data {
+ const char *label;
+};
+
+#endif
diff --git a/include/linux/plist.h b/include/linux/plist.h
index aa0fb390bd29..8b6c970cff6c 100644
--- a/include/linux/plist.h
+++ b/include/linux/plist.h
@@ -98,6 +98,13 @@ struct plist_node {
}
/**
+ * PLIST_HEAD - declare and init plist_head
+ * @head: name for struct plist_head variable
+ */
+#define PLIST_HEAD(head) \
+ struct plist_head head = PLIST_HEAD_INIT(head)
+
+/**
* PLIST_NODE_INIT - static struct plist_node initializer
* @node: struct plist_node variable name
* @__prio: initial node priority
@@ -134,6 +141,8 @@ static inline void plist_node_init(struct plist_node *node, int prio)
extern void plist_add(struct plist_node *node, struct plist_head *head);
extern void plist_del(struct plist_node *node, struct plist_head *head);
+extern void plist_requeue(struct plist_node *node, struct plist_head *head);
+
/**
* plist_for_each - iterate over the plist
* @pos: the type * to use as a loop counter
@@ -143,6 +152,16 @@ extern void plist_del(struct plist_node *node, struct plist_head *head);
list_for_each_entry(pos, &(head)->node_list, node_list)
/**
+ * plist_for_each_continue - continue iteration over the plist
+ * @pos: the type * to use as a loop cursor
+ * @head: the head for your list
+ *
+ * Continue to iterate over plist, continuing after the current position.
+ */
+#define plist_for_each_continue(pos, head) \
+ list_for_each_entry_continue(pos, &(head)->node_list, node_list)
+
+/**
* plist_for_each_safe - iterate safely over a plist of given type
* @pos: the type * to use as a loop counter
* @n: another type * to use as temporary storage
@@ -163,6 +182,18 @@ extern void plist_del(struct plist_node *node, struct plist_head *head);
list_for_each_entry(pos, &(head)->node_list, mem.node_list)
/**
+ * plist_for_each_entry_continue - continue iteration over list of given type
+ * @pos: the type * to use as a loop cursor
+ * @head: the head for your list
+ * @m: the name of the list_struct within the struct
+ *
+ * Continue to iterate over list of given type, continuing after
+ * the current position.
+ */
+#define plist_for_each_entry_continue(pos, head, m) \
+ list_for_each_entry_continue(pos, &(head)->node_list, m.node_list)
+
+/**
* plist_for_each_entry_safe - iterate safely over list of given type
* @pos: the type * to use as a loop counter
* @n: another type * to use as temporary storage
@@ -229,6 +260,20 @@ static inline int plist_node_empty(const struct plist_node *node)
#endif
/**
+ * plist_next - get the next entry in list
+ * @pos: the type * to cursor
+ */
+#define plist_next(pos) \
+ list_next_entry(pos, node_list)
+
+/**
+ * plist_prev - get the prev entry in list
+ * @pos: the type * to cursor
+ */
+#define plist_prev(pos) \
+ list_prev_entry(pos, node_list)
+
+/**
* plist_first - return the first node (and thus, highest priority)
* @head: the &struct plist_head pointer
*
diff --git a/include/linux/pm.h b/include/linux/pm.h
index d915d0345fa1..72c0fe098a27 100644
--- a/include/linux/pm.h
+++ b/include/linux/pm.h
@@ -93,13 +93,23 @@ typedef struct pm_message {
* been registered) to recover from the race condition.
* This method is executed for all kinds of suspend transitions and is
* followed by one of the suspend callbacks: @suspend(), @freeze(), or
- * @poweroff(). The PM core executes subsystem-level @prepare() for all
- * devices before starting to invoke suspend callbacks for any of them, so
- * generally devices may be assumed to be functional or to respond to
- * runtime resume requests while @prepare() is being executed. However,
- * device drivers may NOT assume anything about the availability of user
- * space at that time and it is NOT valid to request firmware from within
- * @prepare() (it's too late to do that). It also is NOT valid to allocate
+ * @poweroff(). If the transition is a suspend to memory or standby (that
+ * is, not related to hibernation), the return value of @prepare() may be
+ * used to indicate to the PM core to leave the device in runtime suspend
+ * if applicable. Namely, if @prepare() returns a positive number, the PM
+ * core will understand that as a declaration that the device appears to be
+ * runtime-suspended and it may be left in that state during the entire
+ * transition and during the subsequent resume if all of its descendants
+ * are left in runtime suspend too. If that happens, @complete() will be
+ * executed directly after @prepare() and it must ensure the proper
+ * functioning of the device after the system resume.
+ * The PM core executes subsystem-level @prepare() for all devices before
+ * starting to invoke suspend callbacks for any of them, so generally
+ * devices may be assumed to be functional or to respond to runtime resume
+ * requests while @prepare() is being executed. However, device drivers
+ * may NOT assume anything about the availability of user space at that
+ * time and it is NOT valid to request firmware from within @prepare()
+ * (it's too late to do that). It also is NOT valid to allocate
* substantial amounts of memory from @prepare() in the GFP_KERNEL mode.
* [To work around these limitations, drivers may register suspend and
* hibernation notifiers to be executed before the freezing of tasks.]
@@ -112,7 +122,16 @@ typedef struct pm_message {
* of the other devices that the PM core has unsuccessfully attempted to
* suspend earlier).
* The PM core executes subsystem-level @complete() after it has executed
- * the appropriate resume callbacks for all devices.
+ * the appropriate resume callbacks for all devices. If the corresponding
+ * @prepare() at the beginning of the suspend transition returned a
+ * positive number and the device was left in runtime suspend (without
+ * executing any suspend and resume callbacks for it), @complete() will be
+ * the only callback executed for the device during resume. In that case,
+ * @complete() must be prepared to do whatever is necessary to ensure the
+ * proper functioning of the device after the system resume. To this end,
+ * @complete() can check the power.direct_complete flag of the device to
+ * learn whether (unset) or not (set) the previous suspend and resume
+ * callbacks have been executed for it.
*
* @suspend: Executed before putting the system into a sleep state in which the
* contents of main memory are preserved. The exact action to perform
@@ -546,6 +565,7 @@ struct dev_pm_info {
bool is_late_suspended:1;
bool ignore_children:1;
bool early_init:1; /* Owned by the PM core */
+ bool direct_complete:1; /* Owned by the PM core */
spinlock_t lock;
#ifdef CONFIG_PM_SLEEP
struct list_head entry;
diff --git a/include/linux/pm_opp.h b/include/linux/pm_opp.h
index 5151b0059585..0330217abfad 100644
--- a/include/linux/pm_opp.h
+++ b/include/linux/pm_opp.h
@@ -15,7 +15,6 @@
#define __LINUX_OPP_H__
#include <linux/err.h>
-#include <linux/cpufreq.h>
#include <linux/notifier.h>
struct dev_pm_opp;
@@ -117,23 +116,4 @@ static inline int of_init_opp_table(struct device *dev)
}
#endif
-#if defined(CONFIG_CPU_FREQ) && defined(CONFIG_PM_OPP)
-int dev_pm_opp_init_cpufreq_table(struct device *dev,
- struct cpufreq_frequency_table **table);
-void dev_pm_opp_free_cpufreq_table(struct device *dev,
- struct cpufreq_frequency_table **table);
-#else
-static inline int dev_pm_opp_init_cpufreq_table(struct device *dev,
- struct cpufreq_frequency_table **table)
-{
- return -EINVAL;
-}
-
-static inline
-void dev_pm_opp_free_cpufreq_table(struct device *dev,
- struct cpufreq_frequency_table **table)
-{
-}
-#endif /* CONFIG_CPU_FREQ */
-
#endif /* __LINUX_OPP_H__ */
diff --git a/include/linux/pm_runtime.h b/include/linux/pm_runtime.h
index 2a5897a4afbc..43fd6716f662 100644
--- a/include/linux/pm_runtime.h
+++ b/include/linux/pm_runtime.h
@@ -101,6 +101,11 @@ static inline bool pm_runtime_status_suspended(struct device *dev)
return dev->power.runtime_status == RPM_SUSPENDED;
}
+static inline bool pm_runtime_suspended_if_enabled(struct device *dev)
+{
+ return pm_runtime_status_suspended(dev) && dev->power.disable_depth == 1;
+}
+
static inline bool pm_runtime_enabled(struct device *dev)
{
return !dev->power.disable_depth;
@@ -150,6 +155,7 @@ static inline void device_set_run_wake(struct device *dev, bool enable) {}
static inline bool pm_runtime_suspended(struct device *dev) { return false; }
static inline bool pm_runtime_active(struct device *dev) { return true; }
static inline bool pm_runtime_status_suspended(struct device *dev) { return false; }
+static inline bool pm_runtime_suspended_if_enabled(struct device *dev) { return false; }
static inline bool pm_runtime_enabled(struct device *dev) { return false; }
static inline void pm_runtime_no_callbacks(struct device *dev) {}
diff --git a/include/linux/power_supply.h b/include/linux/power_supply.h
index c9dc4e09854c..f2b76aeaf4e4 100644
--- a/include/linux/power_supply.h
+++ b/include/linux/power_supply.h
@@ -264,6 +264,8 @@ static inline int power_supply_is_system_supplied(void) { return -ENOSYS; }
extern int power_supply_register(struct device *parent,
struct power_supply *psy);
+extern int power_supply_register_no_ws(struct device *parent,
+ struct power_supply *psy);
extern void power_supply_unregister(struct power_supply *psy);
extern int power_supply_powers(struct power_supply *psy, struct device *dev);
diff --git a/include/linux/printk.h b/include/linux/printk.h
index 8752f7595b27..319ff7e53efb 100644
--- a/include/linux/printk.h
+++ b/include/linux/printk.h
@@ -30,6 +30,17 @@ static inline const char *printk_skip_level(const char *buffer)
return buffer;
}
+/* printk's without a loglevel use this.. */
+#define DEFAULT_MESSAGE_LOGLEVEL CONFIG_DEFAULT_MESSAGE_LOGLEVEL
+
+/* We show everything that is MORE important than this.. */
+#define CONSOLE_LOGLEVEL_SILENT 0 /* Mum's the word */
+#define CONSOLE_LOGLEVEL_MIN 1 /* Minimum loglevel we let people use */
+#define CONSOLE_LOGLEVEL_QUIET 4 /* Shhh ..., when booted with "quiet" */
+#define CONSOLE_LOGLEVEL_DEFAULT 7 /* anything MORE serious than KERN_DEBUG */
+#define CONSOLE_LOGLEVEL_DEBUG 10 /* issue debug messages */
+#define CONSOLE_LOGLEVEL_MOTORMOUTH 15 /* You can't shut this one up */
+
extern int console_printk[];
#define console_loglevel (console_printk[0])
@@ -39,13 +50,13 @@ extern int console_printk[];
static inline void console_silent(void)
{
- console_loglevel = 0;
+ console_loglevel = CONSOLE_LOGLEVEL_SILENT;
}
static inline void console_verbose(void)
{
if (console_loglevel)
- console_loglevel = 15;
+ console_loglevel = CONSOLE_LOGLEVEL_MOTORMOUTH;
}
struct va_format {
@@ -128,9 +139,9 @@ asmlinkage __printf(1, 2) __cold
int printk(const char *fmt, ...);
/*
- * Special printk facility for scheduler use only, _DO_NOT_USE_ !
+ * Special printk facility for scheduler/timekeeping use only, _DO_NOT_USE_ !
*/
-__printf(1, 2) __cold int printk_sched(const char *fmt, ...);
+__printf(1, 2) __cold int printk_deferred(const char *fmt, ...);
/*
* Please don't use printk_ratelimit(), because it shares ratelimiting state
@@ -165,7 +176,7 @@ int printk(const char *s, ...)
return 0;
}
static inline __printf(1, 2) __cold
-int printk_sched(const char *s, ...)
+int printk_deferred(const char *s, ...)
{
return 0;
}
@@ -210,6 +221,12 @@ extern asmlinkage void dump_stack(void) __cold;
#define pr_fmt(fmt) fmt
#endif
+/*
+ * These can be used to print at the various log levels.
+ * All of these will print unconditionally, although note that pr_debug()
+ * and other debug macros are compiled out unless either DEBUG is defined
+ * or CONFIG_DYNAMIC_DEBUG is set.
+ */
#define pr_emerg(fmt, ...) \
printk(KERN_EMERG pr_fmt(fmt), ##__VA_ARGS__)
#define pr_alert(fmt, ...) \
@@ -266,9 +283,20 @@ extern asmlinkage void dump_stack(void) __cold;
printk(fmt, ##__VA_ARGS__); \
} \
})
+#define printk_deferred_once(fmt, ...) \
+({ \
+ static bool __print_once __read_mostly; \
+ \
+ if (!__print_once) { \
+ __print_once = true; \
+ printk_deferred(fmt, ##__VA_ARGS__); \
+ } \
+})
#else
#define printk_once(fmt, ...) \
no_printk(fmt, ##__VA_ARGS__)
+#define printk_deferred_once(fmt, ...) \
+ no_printk(fmt, ##__VA_ARGS__)
#endif
#define pr_emerg_once(fmt, ...) \
diff --git a/include/linux/proc_fs.h b/include/linux/proc_fs.h
index 608e60a74c3c..9d117f61d976 100644
--- a/include/linux/proc_fs.h
+++ b/include/linux/proc_fs.h
@@ -44,6 +44,10 @@ extern int remove_proc_subtree(const char *, struct proc_dir_entry *);
#else /* CONFIG_PROC_FS */
+static inline void proc_root_init(void)
+{
+}
+
static inline void proc_flush_task(struct task_struct *task)
{
}
diff --git a/include/linux/ptrace.h b/include/linux/ptrace.h
index 07d0df6bf768..077904c8b70d 100644
--- a/include/linux/ptrace.h
+++ b/include/linux/ptrace.h
@@ -5,6 +5,7 @@
#include <linux/sched.h> /* For struct task_struct. */
#include <linux/err.h> /* for IS_ERR_VALUE */
#include <linux/bug.h> /* For BUG_ON. */
+#include <linux/pid_namespace.h> /* For task_active_pid_ns. */
#include <uapi/linux/ptrace.h>
/*
@@ -129,6 +130,37 @@ static inline void ptrace_event(int event, unsigned long message)
}
/**
+ * ptrace_event_pid - possibly stop for a ptrace event notification
+ * @event: %PTRACE_EVENT_* value to report
+ * @pid: process identifier for %PTRACE_GETEVENTMSG to return
+ *
+ * Check whether @event is enabled and, if so, report @event and @pid
+ * to the ptrace parent. @pid is reported as the pid_t seen from the
+ * the ptrace parent's pid namespace.
+ *
+ * Called without locks.
+ */
+static inline void ptrace_event_pid(int event, struct pid *pid)
+{
+ /*
+ * FIXME: There's a potential race if a ptracer in a different pid
+ * namespace than parent attaches between computing message below and
+ * when we acquire tasklist_lock in ptrace_stop(). If this happens,
+ * the ptracer will get a bogus pid from PTRACE_GETEVENTMSG.
+ */
+ unsigned long message = 0;
+ struct pid_namespace *ns;
+
+ rcu_read_lock();
+ ns = task_active_pid_ns(rcu_dereference(current->parent));
+ if (ns)
+ message = pid_nr_ns(pid, ns);
+ rcu_read_unlock();
+
+ ptrace_event(event, message);
+}
+
+/**
* ptrace_init_task - initialize ptrace state for a new child
* @child: new child task
* @ptrace: true if child should be ptrace'd by parent's tracer
diff --git a/include/linux/pwm.h b/include/linux/pwm.h
index 4717f54051cb..e90628cac8fa 100644
--- a/include/linux/pwm.h
+++ b/include/linux/pwm.h
@@ -274,14 +274,18 @@ struct pwm_lookup {
unsigned int index;
const char *dev_id;
const char *con_id;
+ unsigned int period;
+ enum pwm_polarity polarity;
};
-#define PWM_LOOKUP(_provider, _index, _dev_id, _con_id) \
+#define PWM_LOOKUP(_provider, _index, _dev_id, _con_id, _period, _polarity) \
{ \
.provider = _provider, \
.index = _index, \
.dev_id = _dev_id, \
.con_id = _con_id, \
+ .period = _period, \
+ .polarity = _polarity \
}
#if IS_ENABLED(CONFIG_PWM)
diff --git a/include/linux/pwm_backlight.h b/include/linux/pwm_backlight.h
index 2de2e275b2cb..efdd9227a49c 100644
--- a/include/linux/pwm_backlight.h
+++ b/include/linux/pwm_backlight.h
@@ -6,9 +6,6 @@
#include <linux/backlight.h>
-/* TODO: convert to gpiod_*() API once it has been merged */
-#define PWM_BACKLIGHT_GPIO_ACTIVE_LOW (1 << 0)
-
struct platform_pwm_backlight_data {
int pwm_id;
unsigned int max_brightness;
@@ -16,8 +13,8 @@ struct platform_pwm_backlight_data {
unsigned int lth_brightness;
unsigned int pwm_period_ns;
unsigned int *levels;
+ /* TODO remove once all users are switched to gpiod_* API */
int enable_gpio;
- unsigned long enable_gpio_flags;
int (*init)(struct device *dev);
int (*notify)(struct device *dev, int brightness);
void (*notify_after)(struct device *dev, int brightness);
diff --git a/include/linux/quota.h b/include/linux/quota.h
index cc7494a35429..0f3c5d38da1f 100644
--- a/include/linux/quota.h
+++ b/include/linux/quota.h
@@ -329,6 +329,7 @@ struct quotactl_ops {
int (*get_xstate)(struct super_block *, struct fs_quota_stat *);
int (*set_xstate)(struct super_block *, unsigned int, int);
int (*get_xstatev)(struct super_block *, struct fs_quota_statv *);
+ int (*rm_xquota)(struct super_block *, unsigned int);
};
struct quota_format_type {
diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h
index 00a7fd61b3c6..5a75d19aa661 100644
--- a/include/linux/rcupdate.h
+++ b/include/linux/rcupdate.h
@@ -44,6 +44,7 @@
#include <linux/debugobjects.h>
#include <linux/bug.h>
#include <linux/compiler.h>
+#include <linux/percpu.h>
#include <asm/barrier.h>
extern int rcu_expedited; /* for sysctl */
@@ -51,7 +52,17 @@ extern int rcu_expedited; /* for sysctl */
extern int rcutorture_runnable; /* for sysctl */
#endif /* #ifdef CONFIG_RCU_TORTURE_TEST */
+enum rcutorture_type {
+ RCU_FLAVOR,
+ RCU_BH_FLAVOR,
+ RCU_SCHED_FLAVOR,
+ SRCU_FLAVOR,
+ INVALID_RCU_FLAVOR
+};
+
#if defined(CONFIG_TREE_RCU) || defined(CONFIG_TREE_PREEMPT_RCU)
+void rcutorture_get_gp_data(enum rcutorture_type test_type, int *flags,
+ unsigned long *gpnum, unsigned long *completed);
void rcutorture_record_test_transition(void);
void rcutorture_record_progress(unsigned long vernum);
void do_trace_rcu_torture_read(const char *rcutorturename,
@@ -60,6 +71,15 @@ void do_trace_rcu_torture_read(const char *rcutorturename,
unsigned long c_old,
unsigned long c);
#else
+static inline void rcutorture_get_gp_data(enum rcutorture_type test_type,
+ int *flags,
+ unsigned long *gpnum,
+ unsigned long *completed)
+{
+ *flags = 0;
+ *gpnum = 0;
+ *completed = 0;
+}
static inline void rcutorture_record_test_transition(void)
{
}
@@ -228,6 +248,18 @@ void rcu_idle_exit(void);
void rcu_irq_enter(void);
void rcu_irq_exit(void);
+#ifdef CONFIG_RCU_STALL_COMMON
+void rcu_sysrq_start(void);
+void rcu_sysrq_end(void);
+#else /* #ifdef CONFIG_RCU_STALL_COMMON */
+static inline void rcu_sysrq_start(void)
+{
+}
+static inline void rcu_sysrq_end(void)
+{
+}
+#endif /* #else #ifdef CONFIG_RCU_STALL_COMMON */
+
#ifdef CONFIG_RCU_USER_QS
void rcu_user_enter(void);
void rcu_user_exit(void);
@@ -268,6 +300,41 @@ bool __rcu_is_watching(void);
#endif /* #if defined(CONFIG_DEBUG_LOCK_ALLOC) || defined(CONFIG_RCU_TRACE) || defined(CONFIG_SMP) */
/*
+ * Hooks for cond_resched() and friends to avoid RCU CPU stall warnings.
+ */
+
+#define RCU_COND_RESCHED_LIM 256 /* ms vs. 100s of ms. */
+DECLARE_PER_CPU(int, rcu_cond_resched_count);
+void rcu_resched(void);
+
+/*
+ * Is it time to report RCU quiescent states?
+ *
+ * Note unsynchronized access to rcu_cond_resched_count. Yes, we might
+ * increment some random CPU's count, and possibly also load the result from
+ * yet another CPU's count. We might even clobber som