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2014-07-09mmc: core: Fix DT documentation of eMMC high-speed DDR 1.8/1.2V bindingsPeter Griffin1-2/+2
Currently the documentation doesn't match the code in mmc_of_parse. This patch rectifies this. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: wmt-sdmmc: Remove deprecated IRQF_DISABLEDAxel Lin1-1/+1
It's a NOOP since 2.6.35 and it will be removed one day. This is not trivial because current code uses hard coded 32 instead of IRQF_DISABLED in the request_irq call. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: wmt-sdmmc: Fix settting BM_EIGHTBIT_MODE bit in wmt_mci_set_ios()Axel Lin1-16/+15
For MMC_BUS_WIDTH_8 case, current code missed setting BM_EIGHTBIT_MODE bit. Also has a small refactor to make the code looks better in readability. So the bit settings witch below logic: SDMMC_BUSMODE register: Set EIGHTBIT_MODE bit for 8 bit mode, Set FOURBIT_MODE bit for 4 bit mode. Clear both EIGHTBIT_MODE and FOURBIT_MODE bits for 1 bit mode. SDMMC_EXTCTRL register: Set EXT_EIGHTBIT bit for 8 bit mode, Clear EXT_EIGHTBIT bit for 1/4 bit mode. Add define for EXT_EIGHTBIT to avoid using magic number. BM_ONEBIT_MASK is no longer used, thus remove it. This patch is untested due to lack of platform with 8-bit hardware. However since the code is there, it's good to make the code match the document. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: sd: warn if card stays busy during initJohan Rudholm1-0/+3
The initialization of some SD-cards fails because the card never leaves the busy state. Aid trouble shooting by indicating this in the kernel log. Signed-off-by: Johan Rudholm <johanru@axis.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: moxart: Remove unneeded version.h inclusionSachin Kamat1-1/+0
version.h inclusion is not needed as suggested by versioncheck. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Cc: Jonas Jensen <jonas.jensen@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: omap_hsmmc: Pin remux workaround to support SDIO interrupt on AM335xAndreas Fenkart2-3/+74
The am335x can't detect pending cirq in PM runtime suspend. This patch reconfigures dat1 as a GPIO before going to suspend. SDIO interrupts are detected with the GPIO, the GPIO will only wake the module from suspend, SDIO irq detection will still happen through the IP block. Idea of remuxing the pins by Tony Lindgren. Code contributions from Tony Lindgren and Balaji T K <balajitk@ti.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Balaji T K <balajitk@ti.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: omap_hsmmc: switch default/idle pinctrl states in runtime hooksAndreas Fenkart1-6/+10
These are predefined states of the driver model. When not present, as if not set in the device tree, they become no-ops. Explicitly selecting the default state is not needed since the device core layer sets pin mux to "default" state before probe. This is not the simplest implementation, on AM335x at least, we could switch to idle at any point in the suspend hook, only the default state needs to be set before writing to the irq registers or an IRQ might get lost. Acked-by: Balaji T K <balajitk@ti.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: omap_hsmmc: abort runtime suspend if pending sdio irq detectedAndreas Fenkart1-2/+21
On multicores, an sdio irq handler could be running in parallel to runtime suspend. In the worst case it could be waiting for the spinlock held by the runtime suspend. When runtime suspend is complete and the functional clock (fclk) turned off, the irq handler will continue and cause a SIGBUS on the first register access. Acked-by: Balaji T K <balajitk@ti.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: omap_hsmmc: enable wakeup event for sdio OMAP4Balaji T K1-1/+13
To detect sdio irqs properly without spurious events, OMAP4 needs IWE in CON and CTPL, CLKEXTFREE in HCTL to be set Tested-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: omap_hsmmc: Extend debugfs by SDIO IRQ handling, runtime stateAndreas Fenkart1-3/+14
Add SDIO IRQ entries to debugfs entry. Note that PSTATE shows current state of data lines, incl. SDIO IRQ pending Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Acked-by: Balaji T K <balajitk@ti.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: omap_hsmmc: Enable SDIO interruptAndreas Fenkart3-12/+191
There have been various patches floating around for enabling the SDIO IRQ for hsmmc, but none of them ever got merged. Probably the reason for not merging the SDIO interrupt patches has been the lack of wake-up path for SDIO on some omaps that has also needed remuxing the SDIO DAT1 line to a GPIO making the patches complex. This patch adds the minimal SDIO IRQ support to hsmmc for omaps that do have the wake-up path. For those omaps, the DAT1 line need to have the wake-up enable bit set, and the wake-up interrupt is the same as for the MMC controller. This patch has been tested on am3730 es1.2 with mwifiex connected to MMC3 with mwifiex waking to Ethernet traffic from off-idle mode. Note that for omaps that do not have the SDIO wake-up path, this patch will not work for idle modes and further patches for remuxing DAT1 to GPIO are needed. Based on earlier patches [1][2] by David Vrabel <david.vrabel@csr.com>, Steve Sakoman <steve@sakoman.com> For now, only support SDIO interrupt if we are booted with a separate wake-irq configued via device tree. This is because omaps need the wake-irq for idle states, and some omaps need special quirks. And we don't want to add new legacy mux platform init code callbacks any longer as we are moving to DT based booting anyways. To use it, you need to specify the wake-irq using the interrupts-extended property. [1] http://www.sakoman.com/cgi-bin/gitweb.cgi?p=linux.git;a=commitdiff_plain;h=010810d22f6f49ac03da4ba384969432e0320453 [2] http://comments.gmane.org/gmane.linux.kernel.mmc/20446 Acked-by: Balaji T K <balajitk@ti.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: quirks: Fixup debug messageAlexander Stein1-1/+1
There is no need for an output like this: > mmcblk mmc1:0001: calling add_quirk_mmc+0x0/0x20 Instead use this one: > mmcblk mmc1:0001: calling add_quirk_mmc Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: sh-mmcif: final error path cleanupBen Dooks1-4/+2
Remove the error path items that are no longer needed. The mmc card-detect code cleans up after itself (and registers with devm) and the host error is the same as the clock disable. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: sh-mmcif: no need to call pm_runtime_suspend on errorBen Dooks1-4/+2
The pm_runtime call should implicitly disable the device once the probe is over if there is no explicit reference gained. There is no need to call pm_runtime_suspend() before the pm_runtime_disable() call. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: sh-mmcif: use devm_ for irq managementBen Dooks1-18/+8
Use devm_request_threaded_irq() for the host interrupt handlers so we do not have to worry about freeing them on exit or error. Tidies up the exit path code for the driver. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: sh-mmcif: use devm_ for clock managementBen Dooks1-10/+8
Use the devm_clk_get() code to get the clock and allow it to be freed automatically on release. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: sh-mmcif: use devm_ for ioremapBen Dooks1-18/+6
Start tidying the probe/release code by using devm_ioremap_resource() to map the IO registers. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: sh-mmcif: update to print version and bus clock rate on probeBen Dooks1-4/+5
Change the initial print to show chip version and the bus rate it is working at instead of the driver version. This is more useful information as we already know which driver version from the kernel it is in. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: sdhci: Remove unused ret variablesMarkus Pargmann1-4/+3
Remove those unused ret variables to make it obvious that these function will not return any errors in the current implementation. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: sdhci: Use mmc core regulator infrastuctureTim Kryger2-64/+36
Switch the common SDHCI code over to use mmc_host's regulator pointers and remove the ones in the sdhci_host structure. Additionally, use the common mmc_regulator_get_supply function to get the regulators and set the ocr_avail mask. This change sets the ocr_avail directly based upon the voltage ranges supported which ensures ocr_avail is set correctly while allowing the use of regulators that can't provide exactly 1.8v, 3.0v, or 3.3v. Signed-off-by: Tim Kryger <tim.kryger@gmail.com> Signed-off-by: Markus Mayer <markus.mayer@linaro.org> Reviewed-by: Matt Porter <mporter@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: core: Remove redundant runtime_idle callbackUlf Hansson1-9/+1
The runtime PM core handles a runtime_idle callback set to NULL as one returning 0. So, let's just set it to NULL instead. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
2014-07-09mmc: mmci: Add Qualcomm Id to amba id tableSrinivas Kandagatla1-0/+23
This patch adds a fake Qualcomm ID 0x00051180 to the amba_ids, as Qualcomm SDCC controller is pl180, but amba id registers read 0x0's. The plan is to remove SDCC driver totally and use mmci as the main SD controller driver for Qualcomm SOCs. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: mmci: Add Qcom specific rx_fifocnt logic.Srinivas Kandagatla2-2/+29
MCIFIFOCNT register behaviour on Qcom chips is very different than the other pl180 integrations. MCIFIFOCNT register contains the number of words that are still waiting to be transferred through the FIFO. It keeps decrementing once the host CPU reads the MCIFIFO. With the existing logic and the MCIFIFOCNT behaviour, mmci_pio_read will loop forever, as the FIFOCNT register will always return transfer size before reading the FIFO. Also the data sheet states that "This register is only useful for debug purposes and should not be used for normal operation since it does not reflect data which may or may not be in the pipeline". This patch implements a qcom specific get_rx_fifocnt function which is implemented based on status register flags. Based on qcom_fifo flag in variant data structure, the corresponding get_rx_fifocnt function is selected. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: mmci: add explicit clk controlSrinivas Kandagatla2-3/+28
On Controllers like Qcom SD card controller where cclk is mclk and mclk should be directly controlled by the driver. This patch adds support to control mclk directly in the driver, and also adds explicit_mclk_control flag in variant structure giving more flexibility to the driver. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> [Ulf Hansson] Fixed checkpatch warning Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: mmci: add f_max to variant structureSrinivas Kandagatla1-2/+11
Some of the controller have maximum supported frequency, This patch adds support in variant data structure to specify such restrictions. This gives more flexibility in calculating the f_max before passing it to mmc-core. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: mmci: Add support to data commands via variant structure.Srinivas Kandagatla1-0/+5
On some SOCs like Qcom there are explicit bits in the command register to specify if its a data transfer command or not. So this patch adds support to such bits in variant data, giving more flexibility to the driver. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: mmci: add edge support to data and command out in variant data.Srinivas Kandagatla1-1/+5
This patch adds edge support for data and command out to variant structure giving more flexibility to the driver to support more SOCs which have different clock register layout. Without this patch other new SOCs like Qcom will have to add more code to special case them Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> [Ulf Hansson] Resolved conflict Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: mmci: add 8bit bus support in variant dataSrinivas Kandagatla1-1/+6
This patch adds 8bit bus enable to variant structure giving more flexibility to the driver to support more SOCs which have different clock register layout. Without this patch other new SOCs like Qcom will have to add more code to special case them. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> [Ulf Hansson] Resolved conflict Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: mmci: add ddrmode mask to variant dataSrinivas Kandagatla1-1/+4
This patch adds ddrmode mask to variant structure giving more flexibility to the driver to support more SOCs which have different datactrl register layout. Without this patch datactrl register is updated with incorrect ddrmode mask, resulting in failures on Qualcomm SD Card Controller. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> [Ulf Hansson] Resolved conflict Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: mmci: Add Qcom datactrl register variantSrinivas Kandagatla1-0/+5
Instance of this IP on Qualcomm's SOCs has bit different layout for datactrl register. Bit position datactrl[16:4] hold the true block size instead of power of 2. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: mmci: Add enough delay between writes to CMD register.Srinivas Kandagatla1-1/+1
On Qcom SD Card controller POWER, CLKCTRL, DATACTRL and COMMAND registers should be updated in MCLK domain, and writes to these registers must be separated by three MCLK cycles. This resitriction is not applicable for other registers. Any subsequent writes to these register will be ignored until 3 MCLK have passed. One usec delay between two CMD register writes is not sufficient in the card identification phase where the CCLK is very low. This patch replaces a static 1 usec delay to use mmci_reg_delay function which can provide correct delay depending on the cclk frequency. Without this patch the card is not detected. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: mmci: Add Qualcomm specific register defines.Srinivas Kandagatla1-0/+17
This patch adds a Qualcomm SD Card controller specific register variations to header file. Qualcomm SDCC controller is pl180, with slight changes in the register layout from standard pl180 register set. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: mmci: use NSEC_PER_SEC macroSrinivas Kandagatla1-1/+1
This patch replaces a constant used in calculating timeout with a proper macro. This is make code more readable. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-06Linux 3.16-rc4Linus Torvalds1-1/+1
2014-07-06Merge tag 'dt-for-linus' of git://git.secretlab.ca/git/linuxLinus Torvalds1-0/+15
Pull devicetree bugfix from Grant Likely: "Important bug fix for parsing 64-bit addresses on 32-bit platforms. Without this patch the kernel will try to use memory ranges that cannot be reached" * tag 'dt-for-linus' of git://git.secretlab.ca/git/linux: of: Check for phys_addr_t overflows in early_init_dt_add_memory_arch
2014-07-06Merge tag 'scsi-for-linus' of ↵Linus Torvalds13-43/+86
git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi Pull SCSI fixes from James Bottomley: "This is a set of 13 fixes, a MAINTAINERS update and a sparse update. The fixes are mostly correct value initialisations, avoiding NULL derefs and some uninitialised pointer avoidance. All the patches have been incubated in -next for a few days. The final patch (use the scsi data buffer length to extract transfer size) has been rebased to add a cc to stable, but only the commit message has changed" * tag 'scsi-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: [SCSI] use the scsi data buffer length to extract transfer size virtio-scsi: fix various bad behavior on aborted requests virtio-scsi: avoid cancelling uninitialized work items ibmvscsi: Add memory barriers for send / receive ibmvscsi: Abort init sequence during error recovery qla2xxx: Fix sparse warning in qla_target.c. bnx2fc: Improve stats update mechanism bnx2fc: do not scan uninitialized lists in case of error. fc: ensure scan_work isn't active when freeing fc_rport pm8001: Fix potential null pointer dereference and memory leak. MAINTAINERS: Update LSILOGIC MPT FUSION DRIVERS (FC/SAS/SPI) maintainers Email IDs be2iscsi: remove potential junk pointer free be2iscsi: add an missing goto in error path scsi_error: set DID_TIME_OUT correctly scsi_error: fix invalid setting of host byte
2014-07-05Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds5-5/+51
Pull drm fixes from Dave Airlie: "i915, tda998x and vmwgfx fixes, The main one is i915 fix for missing VGA connectors, along with some fixes for the tda998x from Russell fixing some modesetting problems. (still on holidays, but got a spare moment to find these)" * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: drm/vmwgfx: Fix incorrect write to read-only register v2: drm/i915: Drop early VLV WA to fix Voltage not getting dropped to Vmin drm/i915: only apply crt_present check on VLV drm/i915: Wait for vblank after enabling the primary plane on BDW drm/i2c: tda998x: add some basic mode validation drm/i2c: tda998x: faster polling for edid drm/i2c: tda998x: move drm_i2c_encoder_destroy call
2014-07-05Merge tag 'fixes-for-linus' of ↵Linus Torvalds24-67/+292
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "This week's arm-soc fixes: - A set of of OMAP patches that we had missed Tony's pull request of: * Reset fix for am43xx * Proper OPP table for omap5 * Fix for SoC detection of one of the DRA7 SoCs * hwmod updates to get SATA and OCP to work on omap5 (drivers merged in 3.16) * ... plus a handful of smaller fixes - sunxi needed to re-add machine specific restart code that was removed in anticipation of a watchdog driver being merged for 3.16, and it didn't make it in. - Marvell fixes for PCIe on SMP and a big-endian fix. - A trivial defconfig update to make my capri test board boot with bcm_defconfig again. ... and a couple of MAINTAINERS updates, one to claim new Keystone drivers that have been merged, and one to merge MXS and i.MX (both Freescale platforms). The largest diffs come from the hwmod code for omap5 and the re-add of the restart code on sunxi. The hwmod stuff is quite late at this point but it slipped through cracks repeatedly while coming up the maintainer chain and only affects the one SoC so risk is low" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: MAINTAINERS: Add few more Keystone drivers MAINTAINERS: merge MXS entry into IMX one ARM: sunxi: Reintroduce the restart code for A10/A20 SoCs ARM: mvebu: fix cpuidle implementation to work on big-endian systems ARM: mvebu: update L2/PCIe deadlock workaround after L2CC cleanup ARM: mvebu: move Armada 375 external abort logic as a quirk ARM: bcm: Fix bcm and multi_v7 defconfigs ARM: dts: dra7-evm: remove interrupt binding ARM: OMAP2+: Fix parser-bug in platform muxing code ARM: DTS: dra7/dra7xx-clocks: ATL related changes ARM: OMAP2+: drop unused function ARM: dts: am43x-epos-evm: Add Missing cpsw-phy-sel for am43x-epos-evm ARM: dts: omap5: Update CPU OPP table as per final production Manual ARM: DRA722: add detection of SoC information ARM: dts: Enable twl4030 off-idle configuration for selected omaps ARM: OMAP5: hwmod: Add ocp2scp3 and sata hwmods ARM: OMAP2+: hwmod: Change hardreset soc_ops for AM43XX
2014-07-05Merge branch 'irq-urgent-for-linus' of ↵Linus Torvalds4-6/+19
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq fixes from Thomas Gleixner: "A few minor fixlets in ARM SoC irq drivers and a fix for a memory leak which I introduced in the last round of cleanups :(" * 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: genirq: Fix memory leak when calling irq_free_hwirqs() irqchip: spear_shirq: Fix interrupt offset irqchip: brcmstb-l2: Level-2 interrupts are edge sensitive irqchip: armada-370-xp: Mask all interrupts during initialization.
2014-07-06Merge tag 'drm-intel-fixes-2014-07-03' of ↵Dave Airlie3-1/+42
git://anongit.freedesktop.org/drm-intel Fixes for 3.16-rc3; most importantly Jesse brings back VGA he took away on a bunch of machines. Also a vblank fix for BDW and a power workaround fix for VLV. * tag 'drm-intel-fixes-2014-07-03' of git://anongit.freedesktop.org/drm-intel: drm/i915: Drop early VLV WA to fix Voltage not getting dropped to Vmin drm/i915: only apply crt_present check on VLV drm/i915: Wait for vblank after enabling the primary plane on BDW
2014-07-06Merge branch 'vmwgfx-fixes-3.16' of git://people.freedesktop.org/~thomash/linuxDave Airlie1-1/+0
fix to a 3.15 commit. * 'vmwgfx-fixes-3.16' of git://people.freedesktop.org/~thomash/linux: drm/vmwgfx: Fix incorrect write to read-only register v2:
2014-07-06Merge branch 'tda998x-fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-cuboxDave Airlie1-3/+9
mode fixes for tda998x. * 'tda998x-fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-cubox: drm/i2c: tda998x: add some basic mode validation drm/i2c: tda998x: faster polling for edid drm/i2c: tda998x: move drm_i2c_encoder_destroy call
2014-07-05genirq: Fix memory leak when calling irq_free_hwirqs()Keith Busch1-2/+2
irq_free_hwirqs() always calls irq_free_descs() with a cnt == 0 which makes it a no-op since the interrupt count to free is decremented in itself. Fixes: 7b6ef1262549f6afc5c881aaef80beb8fd15f908 Signed-off-by: Keith Busch <keith.busch@intel.com> Acked-by: David Rientjes <rientjes@google.com> Link: http://lkml.kernel.org/r/1404167084-8070-1-git-send-email-keith.busch@intel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2014-07-05Merge tag 'arm64-fixes' of ↵Linus Torvalds5-6/+9
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull ARM64 fixes from Catalin Marinas: - Exception level check at boot time (for completeness, not triggering any bug before) - I/D-cache synchronisation logic for huge pages - Config symbol typo * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: fix el2_setup check of CurrentEL arm64: mm: Make icache synchronisation logic huge page aware arm64: mm: Fix horrendous config typo
2014-07-04MAINTAINERS: Add few more Keystone driversSantosh Shilimkar1-1/+25
Update MAINTAINERS file for recently added reset controller, AEMIF and clocksource driver for Keystone SOCs. The EMIF memory controller driver is also added along with AEMIF. Cc: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> Cc: Kevin Hilman <khilman@linaro.org> Cc: Mike Turquette <mturquette@linaro.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2014-07-04MAINTAINERS: merge MXS entry into IMX oneShawn Guo1-7/+1
The mach-mxs platform is actually co-maintained by myself and pengutronix folks. Also it's hosted in the same kernel tree as IMX. So let's merge the entry into IMX one. Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Olof Johansson <olof@lixom.net>
2014-07-04Merge tag 'mvebu-fixes-3.16-2' of git://git.infradead.org/linux-mvebu into fixesOlof Johansson4-18/+47
mvebu fixes for v3.16 (round #2) - mvebu - Fix PCIe deadlock now that SMP is enabled - Fix cpuidle for big-endian systems * tag 'mvebu-fixes-3.16-2' of git://git.infradead.org/linux-mvebu: ARM: mvebu: fix cpuidle implementation to work on big-endian systems ARM: mvebu: update L2/PCIe deadlock workaround after L2CC cleanup ARM: mvebu: move Armada 375 external abort logic as a quirk Signed-off-by: Olof Johansson <olof@lixom.net>
2014-07-04ARM: sunxi: Reintroduce the restart code for A10/A20 SoCsMaxime Ripard1-0/+77
This partly reverts commits 553600502b84 (ARM: sunxi: Remove reset code from the platform) and 5e669ec583e2 (ARM: sunxi: Remove init_machine callback) for the sun4i, sun5i and sun7i families. This is needed because the watchdog counterpart of these commits was dropped, and didn't make it into 3.16. In order to still be able to reboot the board, we need to reintroduce that code. Of course, the long term view is still to get rid of that code in mach-sunxi. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2014-07-04Merge tag 'omap-for-v3.16/fixes-against-rc1' of ↵Olof Johansson16-39/+139
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes Merge OMAP fixes from Tony Lindgren: Fixes for omaps for issues discovered during the merge window and enabling of a few features that had to wait for the driver dependencies to clear. The fixes included are: - Fix am43xx hard reset flags - Fix SoC detection for DRA722 - Fix CPU OPP table for omap5 - Fix legacy mux parser bug if requested muxname is a prefix of multiple mux entries - Fix qspi interrupt binding that relies on the irq crossbar that has not yet been enabled - Add missing phy_sel for am43x-epos-evm - Drop unused gic_init_irq() that is no longer needed And the enabling of features that had driver dependencies are: - Change dra7 to use Audio Tracking Logic clock instead of a fixed clock now that the clock driver for it has been merged - Enable off idle configuration for selected omaps as all the kernel dependencies for device tree based booting are finally merged as this is needed to get the automated PM tests working finally with device tree based booting - Add hwmod entry for ocp2scp3 for omap5 to get sata working as all the driver dependencies are now in the kernel and this patch fell through the cracks during the merge window * tag 'omap-for-v3.16/fixes-against-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: dra7-evm: remove interrupt binding ARM: OMAP2+: Fix parser-bug in platform muxing code ARM: DTS: dra7/dra7xx-clocks: ATL related changes ARM: OMAP2+: drop unused function ARM: dts: am43x-epos-evm: Add Missing cpsw-phy-sel for am43x-epos-evm ARM: dts: omap5: Update CPU OPP table as per final production Manual ARM: DRA722: add detection of SoC information ARM: dts: Enable twl4030 off-idle configuration for selected omaps ARM: OMAP5: hwmod: Add ocp2scp3 and sata hwmods ARM: OMAP2+: hwmod: Change hardreset soc_ops for AM43XX
2014-07-04Merge tag 'md/3.16-fixes' of git://neil.brown.name/mdLinus Torvalds1-1/+14
Pull md bugfixes from Neil Brown: "Two minor bugfixes for md in 3.16" * tag 'md/3.16-fixes' of git://neil.brown.name/md: md: flush writes before starting a recovery. md: make sure GET_ARRAY_INFO ioctl reports correct "clean" status

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