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2014-09-04spi/rockchip: Mark DMA as optionalDoug Anderson1-2/+6
The Rockchip SPI controller works fine without DMA (aside from a few warnings). The DMA property even implies this, saying: DMA request names should include "tx" and "rx" if present. Officially mark the properties as optional. Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2014-08-08Merge tag 'cleanup-for-3.17' of ↵Linus Torvalds1-1/+0
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC cleanups from Olof Johansson: "This merge window brings a good size of cleanups on various platforms. Among the bigger ones: - Removal of Samsung s5pc100 and s5p64xx platforms. Both of these have lacked active support for quite a while, and after asking around nobody showed interest in keeping them around. If needed, they could be resurrected in the future but it's more likely that we would prefer reintroduction of them as DT and multiplatform-enabled platforms instead. - OMAP4 controller code register define diet. They defined a lot of registers that were never actually used, etc. - Move of some of the Tegra platform code (PMC, APBIO, fuse, powergate) to drivers/soc so it can be shared with 64-bit code. This also converts them over to traditional driver models where possible. - Removal of legacy gpio-samsung driver, since the last users have been removed (moved to pinctrl) Plus a bunch of smaller changes for various platforms that sort of dissapear in the diffstat for the above. clps711x cleanups, shmobile header file refactoring/moves for multiplatform friendliness, some misc cleanups, etc" * tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (117 commits) drivers: CCI: Correct use of ! and & video: clcd-versatile: Depend on ARM video: fix up versatile CLCD helper move MAINTAINERS: Add sdhci-st file to ARCH/STI architecture ARM: EXYNOS: Fix build breakge with PM_SLEEP=n MAINTAINERS: Remove Kirkwood ARM: tegra: Convert PMC to a driver soc/tegra: fuse: Set up in early initcall ARM: tegra: Always lock the CPU reset vector ARM: tegra: Setup CPU hotplug in a pure initcall soc/tegra: Implement runtime check for Tegra SoCs soc/tegra: fuse: fix dummy functions soc/tegra: fuse: move APB DMA into Tegra20 fuse driver soc/tegra: Add efuse and apbmisc bindings soc/tegra: Add efuse driver for Tegra ARM: tegra: move fuse exports to soc/tegra/fuse.h ARM: tegra: export apb dma readl/writel ARM: tegra: Use a function to get the chip ID ARM: tegra: Sort includes alphabetically ARM: tegra: Move includes to include/soc/tegra ...
2014-08-04Merge remote-tracking branches 'spi/topic/orion', 'spi/topic/pl022', ↵Mark Brown2-1/+42
'spi/topic/qup', 'spi/topic/rockchip' and 'spi/topic/rspi' into spi-next
2014-08-04Merge remote-tracking branches 'spi/topic/dw', 'spi/topic/efm32', ↵Mark Brown2-6/+35
'spi/topic/fsl' and 'spi/topic/omap-uwire' into spi-next
2014-08-04Merge remote-tracking branches 'spi/topic/adi-v3', 'spi/topic/atmel', ↵Mark Brown1-1/+8
'spi/topic/cleanup' and 'spi/topic/davinci' into spi-next
2014-08-04Merge remote-tracking branches 'spi/fix/s3c64xx', 'spi/fix/samsung' and ↵Mark Brown1-14/+12
'spi/fix/xilinx' into spi-linus
2014-08-01spi: davinci: add support to configure gpio cs through dtMurali Karicheri1-1/+8
Currently driver supports only configuration of GPIO CS through platform data. This patch enhances the driver to configure GPIO CS through DT. Also update the DT binding documentation to reflect the availability of cs-gpios. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-17spi: s3c64xx: Update binding documentationNaveen Krishna Chatradhi1-5/+3
Samsung SPI driver now uses the generic SPI "cs-gpios" binding so update the documentation accordingly. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> [javier.martinez@collabora.co.uk: split changes and improve commit message] Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-13Merge tag 's5p-cleanup-v2' of ↵Olof Johansson1-1/+0
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup Merge "Samsung cleanup 2nd version for S5P SoCs for 3.17" from Kukjin Kim: Cleanup S5P SoCs for 3.17 - removing s5p64x0 SoCs and s5pc100 SoC in mainline because no more user and if it is required next time, it will be supported with DT. * tag 's5p-cleanup-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: video: fbdev: s3c-fb: remove s5pc100 related fimd and fb codes mtd: onenand: remove s5pc100 related onenand codes spi: s3c64xx: remove s5pc100 related spi codes gpio: samsung: remov s5pc100 related gpio codes ARM: S5PC100: no more support S5PC100 SoC video: fbdev: s3c-fb: remove s5p64x0 related fimd codes spi: s3c64xx: remove s5p64x0 related spi codes gpio: samsung: remove s5p64x0 related gpio codes ARM: S5P64X0: no more support S5P6440 and S5P6450 SoCs Signed-off-by: Olof Johansson <olof@lixom.net>
2014-07-11spi: samsung: Update binding documentationSachin Kamat1-9/+9
Samsung SPI driver uses generic DMA bindings. Update the documentation accordingly. Signed-off-by: Sachin Kamat <sachin.kamat@samsung.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-11spi: efm32: correct namespacing of location propertyUwe Kleine-König1-6/+7
Olof Johansson pointed out that usually the company name is picked as namespace prefix to specific properties. So expect "energymicro,location" but fall back to the previously introduced name "efm32,location". Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-07spi: s3c64xx: remove s5p64x0 related spi codesKukjin Kim1-1/+0
This patch removes s5p64x0 related spi because of no more support for s5p64x0 SoCs. Meanwhile, cleanup SPI DT bindings for s5p6440-spi, it should be s5p64x0-spi instead. Cc: Mark Brown <broonie@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-07-04spi/rockchip: add rockchip spi DT bindingaddy ke1-0/+37
Signed-off-by: addy ke <addy.ke@rock-chips.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-03spi: dw-mmio: add devicetree supportSteffen Trumtrar1-0/+28
Allow probing the dw-mmio from devicetree. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-06-22spi: qup: Remove chip select functionAndy Gross1-0/+6
This patch removes the chip select function. Chip select should instead be supported using GPIOs, defining the DT entry "cs-gpios", and letting the SPI core assert/deassert the chip select as it sees fit. The chip select control inside the controller is buggy. It is supposed to automatically assert the chip select based on the activity in the controller, but it is buggy and doesn't work at all. So instead we elect to use GPIOs. Signed-off-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-06-21spi: qup: Add support for v1.1.1Andy Gross1-1/+5
This patch adds support for v1.1.1 of the SPI QUP controller. Signed-off-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-06-04Merge branch 'for-linus' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial into next Pull trivial tree changes from Jiri Kosina: "Usual pile of patches from trivial tree that make the world go round" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (23 commits) staging: go7007: remove reference to CONFIG_KMOD aic7xxx: Remove obsolete preprocessor define of: dma: doc fixes doc: fix incorrect formula to calculate CommitLimit value doc: Note need of bc in the kernel build from 3.10 onwards mm: Fix printk typo in dmapool.c modpost: Fix comment typo "Modules.symvers" Kconfig.debug: Grammar s/addition/additional/ wimax: Spelling s/than/that/, wording s/destinatary/recipient/ aic7xxx: Spelling s/termnation/termination/ arm64: mm: Remove superfluous "the" in comment of: Spelling s/anonymouns/anonymous/ dma: imx-sdma: Spelling s/determnine/determine/ ath10k: Improve grammar in comments ath6kl: Spelling s/determnine/determine/ of: Improve grammar for of_alias_get_id() documentation drm/exynos: Spelling s/contro/control/ radio-bcm2048.c: fix wrong overflow check doc: printk-formats: do not mention casts for u64/s64 doc: spelling error changes ...
2014-06-02Merge remote-tracking branches 'spi/topic/dw', 'spi/topic/fsl', ↵Mark Brown2-0/+30
'spi/topic/fsl-espi' and 'spi/topic/id-const' into spi-next
2014-06-02Merge remote-tracking branches 'spi/topic/adi', 'spi/topic/atmel' and ↵Mark Brown1-0/+31
'spi/topic/cadence' into spi-next
2014-05-05doc: spelling error changesCarlos Garcia1-1/+1
Fixed multiple spelling errors. Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Carlos E. Garcia <carlos@cgarcia.org> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2014-04-24spi: dw: document device tree bindingBaruch Siach1-0/+24
Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-04-16spi: fsl-espi: Configure FSL eSPI CSBEF and CSAFTJane Wan1-0/+6
Make FSL eSPI CSnBEF and CSnAFT fields in ESPI_SPMODEn registers (n=0,1,2,3) configurable through device tree. CSnBEF is the chip select setup time. It's the delay in bits from the activation of chip select pin to the first clock for data frame. CSnAFT is the chip select hold time. It's the delay in bits from the last clock for data frame to the deactivation of chip select pin. The FSL eSPI driver hardcodes CSnBEF and CSnAFT to 0. Need to set them to a different value for some device. Signed-off-by: Jane Wan <Jane.Wan@gainspeed.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-04-14spi: Add devicetree bindings documentation for Cadence SPIHarini Katakam1-0/+31
Add spi-cadence bindings documentation. Signed-off-by: Harini Katakam <harinik@xilinx.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-04-14spi: add "spi-lsb-first" to devicetreeZhao Qiang1-0/+2
add optional property devicetree for SPI slave nodes into devicetree so that LSB mode can be enabled by devicetree. Signed-off-by: Zhao Qiang <B45475@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-04-07spi: efm32: Update binding document to make "efm32,location" property optionalAxel Lin1-1/+7
If "efm32,location" property is not provided, keeping what is already configured in the hardware, so its either the reset default 0 or whatever the bootloader did. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-30Merge remote-tracking branches 'spi/topic/xilinx' and 'spi/topic/xtfpga' ↵Mark Brown1-0/+9
into spi-next
2014-03-30Merge remote-tracking branches 'spi/topic/sunxi', 'spi/topic/tegra114', ↵Mark Brown2-0/+48
'spi/topic/ti-qspi', 'spi/topic/ti-ssp', 'spi/topic/topcliff-pch', 'spi/topic/txx9', 'spi/topic/xcomm' and 'spi/topic/xfer' into spi-next
2014-03-30Merge remote-tracking branches 'spi/topic/s3c64xx', 'spi/topic/sc18is602', ↵Mark Brown2-10/+60
'spi/topic/sh-hspi', 'spi/topic/sh-msiof', 'spi/topic/sh-sci', 'spi/topic/sirf' and 'spi/topic/spidev' into spi-next
2014-03-30Merge remote-tracking branches 'spi/topic/omap-uwire', 'spi/topic/omap100k', ↵Mark Brown2-0/+146
'spi/topic/omap2', 'spi/topic/orion', 'spi/topic/pl022', 'spi/topic/qup', 'spi/topic/rspi' and 'spi/topic/s3c24xx' into spi-next
2014-03-30Merge remote-tracking branches 'spi/topic/drivers', 'spi/topic/dw', ↵Mark Brown2-4/+6
'spi/topic/efm32', 'spi/topic/ep93xx', 'spi/topic/fsl', 'spi/topic/fsl-dspi', 'spi/topic/fsl-espi' and 'spi/topic/gpio' into spi-next
2014-03-25spi: efm32: use $vendor,$device scheme for compatible stringUwe Kleine-König1-2/+2
Wolfram Sang pointed out that "efm32,$device" is non-standard. So use the common scheme and prefix device with "efm32-". The old compatible string is left in place until arch/arm/boot/dts/efm32* is fixed. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Mark Brown <broonie@linaro.org> Cc: stable@vger.kernel.org
2014-03-14spi: efm32: properly namespace location propertyUwe Kleine-König1-2/+2
While reviewing an i2c driver for efm32 that needs a similar property Wolfram Sang pointed out that "location" is a too generic name for something that is efm32 specific. So add an appropriate namespace and fall back to the generic name in case of failure. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-13spi/xtensa-xtfpga: add DT binding documentationMax Filippov1-0/+9
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-11spi: sh-spi: Improve bindingsGeert Uytterhoeven1-3/+25
- Add future-proof "renesas,hspi-<soctype>" compatible values, - Add missing "interrupt-parent", "#address-cells", and "#size-cells" properties, - Add reference to pinctrl documentation, - Add example bindings. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-11spi: sh-msiof: Remove "renesas,msiof-sh7724" from bindingsGeert Uytterhoeven1-1/+0
It's not implemented in the driver, so it's a bad example. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-27spi: sh-msiof: Add support for R-Car H2 and M2Geert Uytterhoeven1-2/+21
Add support for the MSIOF variant in the R-Car H2 (r8a7790) and M2 (r8a7791) SoCs. Binding documentation: - Add future-proof "renesas,msiof-<soctype>" compatible values, - The default for "renesas,rx-fifo-size" is 256 on R-Car H2 and M2, - "renesas,tx-fifo-size" and "renesas,rx-fifo-size" are deprecated for soctype-specific bindings, - Add example bindings. Implementation: - MSIOF on R-Car H2 and M2 requires the transmission of dummy data if data is being received only (cfr. "Set SICTR.TSCKE to 1" and "Write dummy transmission data to SITFDR" in paragraph "Transmit and Receive Procedures" of the Hardware User's Manual). - As RX depends on TX, MSIOF on R-Car H2 and M2 also lacks the RSCR register (Receive Clock Select Register), and some bits in the RMDR1 (Receive Mode Register 1) and TMDR2 (Transmit Mode Register 2) registers. - Use the recently introduced SPI_MASTER_MUST_TX flag to enable support for dummy transmission in the SPI core, and to differentiate from other MSIOF implementations in code paths that need this. - New DT compatible values ("renesas,msiof-r8a7790" and "renesas,msiof-r8a7791") are added, as well as new platform device names ("spi_r8a7790_msiof" and "spi_r8a7791_msiof"). - The default RX FIFO size is 256 words on R-Car H2 and M2. This is loosely based on a set of patches from Takashi Yoshii <takasi-y@ops.dti.ne.jp>. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-27spi: sh-msiof: Improve bindingsGeert Uytterhoeven1-7/+17
Documentation: - Add missing "interrupt-parent", "#address-cells", "#size-cells", and "clocks" properties, - Add missing default values for "num-cs", "renesas,tx-fifo-size" and "renesas,rx-fifo-size", - Add a reference to the pinctrl documentation. Implementation: - As "num-cs" is marked optional, provide a sensible default. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23spi: rspi: Remove bogus colon in formattingGeert Uytterhoeven1-1/+1
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23spi: rspi: List full example compatible properties in bindingsGeert Uytterhoeven1-3/+5
List full example compatible properties with soctypes instead of just the soctypes, so checkpatch can validate DTSes. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23spi: sunxi: Add Allwinner A10 SPI controller driverMaxime Ripard1-0/+24
The older Allwinner SoCs (A10, A13, A10s and A20) all have the same SPI controller. Unfortunately, this SPI controller, even though quite similar, is significantly different from the recently supported A31 SPI controller (different registers offset, split/merged registers, etc.). Supporting both controllers in a single driver would be unreasonable, hence the addition of a new driver. Like its more recent counterpart, it supports DMA, but the driver only does PIO until we have a dmaengine driver for this platform. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-19spi: qup: Add device tree bindings informationIvan T. Ivanov1-0/+85
The Qualcomm Universal Peripheral (QUP) core is an AHB slave that provides a common data path (an output FIFO and an input FIFO) for serial peripheral interface (SPI) mini-core. Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-16spi/fsl-dspi: Convert to use regmap and add big-endian supportChao Fu1-0/+2
Freescale DSPI module will have two endianess in different platform, but ARM is little endian. So when DSPI in big endian, core in little endian, readl and writel can not adjust R/W register in this condition. This patch will remove general readl/writel, and import regmap mechanism. Data endian will be transfered in regmap APIs. Documents: dspi add bool "big-endian" in dts node if DSPI module work in big endian. Signed-off-by: Chao Fu <b44548@freescale.com> Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-07spi/atmel: document clock propertiesBoris BREZILLON1-0/+5
Document the clock properties required by the spi-atmel driver. Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-02-05spi: sunxi: Add Allwinner A31 SPI controller driverMaxime Ripard1-0/+24
The Allwinner A31 has a new SPI controller IP compared to the older Allwinner SoCs. It supports DMA, but the driver only does PIO for now, and DMA will be supported eventually. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-01-29spi: rspi: Add DT supportGeert Uytterhoeven1-0/+59
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-01-25Merge tag 'spi-v3.14-2' of ↵Linus Torvalds2-2/+8
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi updates from Mark Brown: "A respun version of the merges for the pull request previously sent with a few additional fixes. The last two merges were fixed up by hand since the branches have moved on and currently have the prior merge in them. Quite a busy release for the SPI subsystem, mostly in cleanups big and small scattered through the stack rather than anything else: - New driver for the Broadcom BC63xx HSSPI controller - Fix duplicate device registration for ACPI - Conversion of s3c64xx to DMAEngine (this pulls in platform and DMA changes upon which the transiton depends) - Some small optimisations to reduce the amount of time we hold locks in the datapath, eliminate some redundant checks and the size of a spi_transfer - Lots of fixes, cleanups and general enhancements to drivers, especially the rspi and Atmel drivers" * tag 'spi-v3.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (112 commits) spi: core: Fix transfer failure when master->transfer_one returns positive value spi: Correct set_cs() documentation spi: Clarify transfer_one() w.r.t. spi_finalize_current_transfer() spi: Spelling s/finised/finished/ spi: sc18is602: Convert to use bits_per_word_mask spi: Remove duplicate code to set default bits_per_word setting spi/pxa2xx: fix compilation warning when !CONFIG_PM_SLEEP spi: clps711x: Add MODULE_ALIAS to support module auto-loading spi: rspi: Add missing clk_disable() calls in error and cleanup paths spi: rspi: Spelling s/transmition/transmission/ spi: rspi: Add support for specifying CPHA/CPOL spi/pxa2xx: initialize DMA channels to -1 to prevent inadvertent match spi: rspi: Add more QSPI register documentation spi: rspi: Add more RSPI register documentation spi: rspi: Remove dependency on DMAE for SHMOBILE spi/s3c64xx: Correct indentation spi: sh: Use spi_sh_clear_bit() instead of open-coded spi: bitbang: Grammar s/make to make/to make/ spi: sh-hspi: Spelling s/recive/receive/ spi: core: Improve tx/rx_nbits check comments ...
2014-01-23Merge remote-tracking branches 'spi/topic/pxa2xx', 'spi/topic/qspi', ↵Mark Brown1-1/+7
'spi/topic/s3c24xx', 'spi/topic/s3c64xx', 'spi/topic/sh', 'spi/topic/tegra114', 'spi/topic/tegra20-sflash', 'spi/topic/tegra20-slink', 'spi/topic/txx9' and 'spi/topic/xcomm' into spi-linus
2014-01-23Merge remote-tracking branches 'spi/topic/fsl-espi', 'spi/topic/gpio', ↵Mark Brown1-1/+1
'spi/topic/hspi', 'spi/topic/mpc512x', 'spi/topic/msiof', 'spi/topic/nuc900', 'spi/topic/oc-tiny', 'spi/topic/omap', 'spi/topic/orion' and 'spi/topic/pci' into spi-linus
2013-12-19spi/qspi: update binding informationSourav Poddar1-1/+7
These update binding information for ti qspi controller. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2013-12-11ARM: tegra: document use of standard DMA DT bindingsStephen Warren3-11/+23
Update all the Tegra DT bindings to require the standard dmas/dma-names properties rather than non-standard nvidia,dma-request-selector property. This is a DT-ABI-incompatible change. It is the second of two changes required for me to consider the Tegra DT bindings as stable, the other being the previous conversion to the common reset bindings. Signed-off-by: Stephen Warren <swarren@nvidia.com>

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