path: root/arch/arm/mach-prima2/rstc.c
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2014-10-20ARM: mach-prima2: drop owner assignment from platform_driversWolfram Sang1-1/+0
A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-05-12ARM: prima2: rstc: fix some minor checkpatch issuesXianglong Du1-14/+20
this patch fixes the below minor issues: WARNING: line over 80 characters 39: FILE: arch/arm/mach-prima2/rstc.c:39: + * Writing 1 to this bit resets corresponding block. Writing 0 to this WARNING: line over 80 characters 41: FILE: arch/arm/mach-prima2/rstc.c:41: + * datasheet doesn't require explicit delay between the set and clear WARNING: line over 80 characters 44: FILE: arch/arm/mach-prima2/rstc.c:44: + writel(readl(sirfsoc_rstc_base + (reset_bit / 32) * 4) | (1 << reset_bit), WARNING: msleep < 20ms can sleep for up to 20ms; see Documentation/timers/timers-howto.txt 46: FILE: arch/arm/mach-prima2/rstc.c:46: + msleep(10); WARNING: line over 80 characters 47: FILE: arch/arm/mach-prima2/rstc.c:47: + writel(readl(sirfsoc_rstc_base + (reset_bit / 32) * 4) & ~(1 << reset_bit), WARNING: line over 80 characters 52: FILE: arch/arm/mach-prima2/rstc.c:52: + * Writing 1 to SET register resets corresponding block. Writing 1 to CLEAR WARNING: line over 80 characters 54: FILE: arch/arm/mach-prima2/rstc.c:54: + * datasheet doesn't require explicit delay between the set and clear WARNING: line over 80 characters 57: FILE: arch/arm/mach-prima2/rstc.c:57: + writel(1 << reset_bit, sirfsoc_rstc_base + (reset_bit / 32) * 8); WARNING: msleep < 20ms can sleep for up to 20ms; see Documentation/timers/timers-howto.txt 58: FILE: arch/arm/mach-prima2/rstc.c:58: + msleep(10); WARNING: line over 80 characters 59: FILE: arch/arm/mach-prima2/rstc.c:59: + writel(1 << reset_bit, sirfsoc_rstc_base + (reset_bit / 32) * 8 + 4); total: 0 errors, 10 warnings, 120 lines checked Signed-off-by: Xianglong Du <Xianglong.Du@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com>
2014-03-17ARM: prima2: build reset code standaloneArnd Bergmann1-9/+13
The prima2 platform code currently depends on the rstc implementation and that in turn depends on the reset controller framework. This removes the platform dependency by letting the driver access arm_pm_restart directly to turn the driver into a standalone entity, and also removes the dependency on the reset controller framework by using "if (IS_ENABLED(CONFIG_RESET_CONTROLLER))". This will cause all code that is used for the reset controller to be dropped by the compiler if the framework is disabled. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-03-05ARM: prima2: move to generic reset controller driver frameworkBarry Song1-34/+59
this moves to generic IP module reset framework, and make other drivers use common device_reset() API. Cc: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Bin Shi <Bin.Shi@csr.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
2013-07-09reboot: arm: change reboot_mode to use enum reboot_modeRobin Holt1-1/+2
Preparing to move the parsing of reboot= to generic kernel code forces the change in reboot_mode handling to use the enum. [akpm@linux-foundation.org: fix arch/arm/mach-socfpga/socfpga.c] Signed-off-by: Robin Holt <holt@sgi.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Russ Anderson <rja@sgi.com> Cc: Robin Holt <holt@sgi.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-06-11ARM: prima2: fix incorrect panic usageHaojian Zhuang1-2/+4
In prima2, some functions of checking DT is registered in initcall level. If it doesn't match the compatible name of sirf, kernel will panic. It blocks the usage of multiplatform on other verndor. The error message is in below. Knic - not syncing: unable to find compatible pwrc node in dtb CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.10.0-rc3-00006-gd7f26ea-dirty #86 [<c0013adc>] (unwind_backtrace+0x0/0xf8) from [<c0011430>] (show_stack+0x10/0x1) [<c0011430>] (show_stack+0x10/0x14) from [<c026f724>] (panic+0x90/0x1e8) [<c026f724>] (panic+0x90/0x1e8) from [<c03267fc>] (sirfsoc_of_pwrc_init+0x24/0x) [<c03267fc>] (sirfsoc_of_pwrc_init+0x24/0x58) from [<c0320864>] (do_one_initcal) [<c0320864>] (do_one_initcall+0x90/0x150) from [<c0320a20>] (kernel_init_freeab) [<c0320a20>] (kernel_init_freeable+0xfc/0x1c4) from [<c026b9e8>] (kernel_init+0) [<c026b9e8>] (kernel_init+0x8/0xe4) from [<c000e158>] (ret_from_fork+0x14/0x3c) Signen-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-01-22ARM: PRIMA2: rstc: enable the support for MarcoBarry Song1-17/+28
marco has SET/CLEAR registers pair for rstc to avoid read-modify-write, this patch detects the mach typer and access registers based on SoC. Signed-off-by: Barry Song <Baohua.Song@csr.com>
2012-01-05ARM: restart: prima2: use new restart hookRussell King1-0/+7
Hook these platforms restart code into the new restart hook rather than using arch_reset(). Reviewed-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-09-11ARM: CSR: add missing sentinels to of_device_id tablesJamie Iles1-0/+1
The of_device_id tables used for matching should be terminated with empty sentinel values. Signed-off-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Barry Song <baohua.song@csr.com>
2011-07-09ARM: CSR: Adding CSR SiRFprimaII board supportBinghua Duan1-0/+69
SiRFprimaII is the latest generation application processor from CSR’s Multifunction SoC product family. Designed around an ARM cortex A9 core, high-speed memory bus, advanced 3D accelerator and full-HD multi-format video decoder, SiRFprimaII is able to meet the needs of complicated applications for modern multifunction devices that require heavy concurrent applications and fluid user experience. Integrated with GPS baseband, analog and PMU, this new platform is designed to provide a cost effective solution for Automotive and Consumer markets. This patch adds the basic support for this SoC and EVB board based on device tree. It is following the ZYNQ of Xilinx in some degree. Signed-off-by: Binghua Duan <Binghua.Duan@csr.com> Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com> Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com> Signed-off-by: Yuping Luo <Yuping.Luo@csr.com> Signed-off-by: Bin Shi <Bin.Shi@csr.com> Signed-off-by: Huayi Li <Huayi.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>

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