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authorRob Herring <rob.herring@calxeda.com>2012-06-13 12:01:55 -0500
committerMauro Carvalho Chehab <mchehab@redhat.com>2012-06-27 09:00:57 -0300
commita1b01edb274518c7da6d69b84e7558c092282aad (patch)
treefe476bbb5048472e9347c20b832fc4ccba08f27e /Documentation/devicetree/bindings/arm/calxeda/mem-ctrlr.txt
parente7930ba49e469d9ce7374a788336caf955f8d7e2 (diff)
edac: add support for Calxeda highbank memory controller
Add support for memory controller on Calxeda Highbank platforms. Highbank platforms support a single 4GB mini-DIMM with 1-bit correction and 2-bit detection. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/calxeda/mem-ctrlr.txt')
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1 files changed, 14 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/calxeda/mem-ctrlr.txt b/Documentation/devicetree/bindings/arm/calxeda/mem-ctrlr.txt
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index 000000000000..f770ac0893d4
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+++ b/Documentation/devicetree/bindings/arm/calxeda/mem-ctrlr.txt
@@ -0,0 +1,14 @@
+Calxeda DDR memory controller
+
+Properties:
+- compatible : Should be "calxeda,hb-ddr-ctrl"
+- reg : Address and size for DDR controller registers.
+- interrupts : Interrupt for DDR controller.
+
+Example:
+
+ memory-controller@fff00000 {
+ compatible = "calxeda,hb-ddr-ctrl";
+ reg = <0xfff00000 0x1000>;
+ interrupts = <0 91 4>;
+ };

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