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authorShane Huang <shane.huang@amd.com>2014-01-22 14:05:46 -0800
committerWolfram Sang <wsa@the-dreams.de>2014-01-24 17:48:51 +0100
commit032f708bc4f6da868ec49dac48ddf3670d8035d3 (patch)
treea07fe98709ce0f981ce7aecf2def498cb6c3a4dc /Documentation/i2c
parent3aacd625f20129f5a41ea3ff3b5353b0e4dabd01 (diff)
i2c: piix4: Add support for AMD ML and CZ SMBus changes
The locations of SMBus register base address and enablement bit are changed from AMD ML, which need this patch to be supported. Signed-off-by: Shane Huang <shane.huang@amd.com> Reviewed-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@vger.kernel.org
Diffstat (limited to 'Documentation/i2c')
-rw-r--r--Documentation/i2c/busses/i2c-piix42
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/i2c/busses/i2c-piix4 b/Documentation/i2c/busses/i2c-piix4
index c097e0f020fe..aa959fd22450 100644
--- a/Documentation/i2c/busses/i2c-piix4
+++ b/Documentation/i2c/busses/i2c-piix4
@@ -13,7 +13,7 @@ Supported adapters:
* AMD SP5100 (SB700 derivative found on some server mainboards)
Datasheet: Publicly available at the AMD website
http://support.amd.com/us/Embedded_TechDocs/44413.pdf
- * AMD Hudson-2, CZ
+ * AMD Hudson-2, ML, CZ
Datasheet: Not publicly available
* Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge
Datasheet: Publicly available at the SMSC website http://www.smsc.com

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