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authorStafford Horne <shorne@gmail.com>2017-06-24 07:09:59 +0900
committerStafford Horne <shorne@gmail.com>2017-11-03 14:01:14 +0900
commitc056718464512da06d7f65a27d5e4f1707b24c80 (patch)
tree3b3b3076d876428ae8b81826f7171f22e84009a5 /arch/openrisc/include/asm/Kbuild
parentb441aab7aa0e15955c432736b08a218a6a4c77f0 (diff)
openrisc: sleep instead of spin on secondary wait
Currently we do a spin on secondary cpus when waiting to boot. This theoretically causes issues with power consumption and does cause issues with qemu cycle burning (it starves cpu 0 from actually being able to boot.) This change puts each secondary cpu to sleep if they have a power management unit, then signals them to wake via IPI when its time to boot. If the cpus have no power management unit they will loop as before. Note: The wakeup IPI requires a special interrupt handler as on secondary cpu's the interrupt infrastructure is not yet established. This interrupt handler is set and reset by updating SPR_EVBAR. Signed-off-by: Stafford Horne <shorne@gmail.com>
Diffstat (limited to 'arch/openrisc/include/asm/Kbuild')
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