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authorSebastian Ott <sebott@linux.ibm.com>2019-02-27 13:56:08 +0100
committerMartin Schwidefsky <schwidefsky@de.ibm.com>2019-04-29 10:47:01 +0200
commit414cbd1e3d14ec0e60666a0fb9d8ae2d77eb7c63 (patch)
tree565130f83fe06b97a58484a0025c7348bba43e1a /arch/s390/include/asm/airq.h
parentb1f548645cb587c14f5e751b9163939d0723885f (diff)
s390/airq: provide cacheline aligned ivs
Provide the ability to create cachesize aligned interrupt vectors. These will be used for per-CPU interrupt vectors. Signed-off-by: Sebastian Ott <sebott@linux.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch/s390/include/asm/airq.h')
-rw-r--r--arch/s390/include/asm/airq.h10
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/s390/include/asm/airq.h b/arch/s390/include/asm/airq.h
index 91e78df365c7..c10d2ee2dfda 100644
--- a/arch/s390/include/asm/airq.h
+++ b/arch/s390/include/asm/airq.h
@@ -35,13 +35,15 @@ struct airq_iv {
unsigned int *data; /* 32 bit value associated with each bit */
unsigned long bits; /* Number of bits in the vector */
unsigned long end; /* Number of highest allocated bit + 1 */
+ unsigned long flags; /* Allocation flags */
spinlock_t lock; /* Lock to protect alloc & free */
};
-#define AIRQ_IV_ALLOC 1 /* Use an allocation bit mask */
-#define AIRQ_IV_BITLOCK 2 /* Allocate the lock bit mask */
-#define AIRQ_IV_PTR 4 /* Allocate the ptr array */
-#define AIRQ_IV_DATA 8 /* Allocate the data array */
+#define AIRQ_IV_ALLOC 1 /* Use an allocation bit mask */
+#define AIRQ_IV_BITLOCK 2 /* Allocate the lock bit mask */
+#define AIRQ_IV_PTR 4 /* Allocate the ptr array */
+#define AIRQ_IV_DATA 8 /* Allocate the data array */
+#define AIRQ_IV_CACHELINE 16 /* Cacheline alignment for the vector */
struct airq_iv *airq_iv_create(unsigned long bits, unsigned long flags);
void airq_iv_release(struct airq_iv *iv);

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