path: root/arch/x86/include/asm/bitops.h
diff options
authorThomas Gleixner <tglx@linutronix.de>2020-06-11 20:02:46 +0200
committerThomas Gleixner <tglx@linutronix.de>2020-06-11 20:02:46 +0200
commit37d1a04b13a6d2fec91a6813fc034947a27db034 (patch)
treec6a8d7d0df96a6eb1ddb53a12885761cb72e0e92 /arch/x86/include/asm/bitops.h
parent37f8173dd84936ea78000ed1cad24f8b18d48ebb (diff)
parent97a9474aeb789183a1d0712e66a4283860279ac9 (diff)
Rebase locking/kcsan to locking/urgent
Merge the state of the locking kcsan branch before the read/write_once() and the atomics modifications got merged. Squash the fallout of the rebase on top of the read/write once and atomic fallback work into the merge. The history of the original branch is preserved in tag locking-kcsan-2020-06-02. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/include/asm/bitops.h')
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h
index 0367efdc5b7a..35460fef39b8 100644
--- a/arch/x86/include/asm/bitops.h
+++ b/arch/x86/include/asm/bitops.h
@@ -201,8 +201,12 @@ arch_test_and_change_bit(long nr, volatile unsigned long *addr)
return GEN_BINARY_RMWcc(LOCK_PREFIX __ASM_SIZE(btc), *addr, c, "Ir", nr);
-static __always_inline bool constant_test_bit(long nr, const volatile unsigned long *addr)
+static __no_kcsan_or_inline bool constant_test_bit(long nr, const volatile unsigned long *addr)
+ /*
+ * Because this is a plain access, we need to disable KCSAN here to
+ * avoid double instrumentation via instrumented bitops.
+ */
return ((1UL << (nr & (BITS_PER_LONG-1))) &
(addr[nr >> _BITOPS_LONG_SHIFT])) != 0;

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