|Age||Commit message (Collapse)||Author||Files||Lines|
That's it. Remove all references to KVM itself, and document
that although it is no more, the ABI between SVC and HYP still
Signed-off-by: Marc Zyngier <firstname.lastname@example.org>
Acked-by: Olof Johansson <email@example.com>
Acked-by: Arnd Bergmann <firstname.lastname@example.org>
Acked-by: Will Deacon <email@example.com>
Acked-by: Vladimir Murzin <firstname.lastname@example.org>
Acked-by: Catalin Marinas <email@example.com>
Acked-by: Linus Walleij <firstname.lastname@example.org>
Acked-by: Christoffer Dall <email@example.com>
Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation this program is
distributed in the hope that it will be useful but without any
warranty without even the implied warranty of merchantability or
fitness for a particular purpose see the gnu general public license
for more details
extracted by the scancode license scanner the SPDX license identifier
has been chosen to replace the boilerplate/reference in 655 file(s).
Signed-off-by: Thomas Gleixner <firstname.lastname@example.org>
Reviewed-by: Allison Randal <email@example.com>
Reviewed-by: Kate Stewart <firstname.lastname@example.org>
Reviewed-by: Richard Fontana <email@example.com>
Signed-off-by: Greg Kroah-Hartman <firstname.lastname@example.org>
VGICv3 CPU interface registers are accessed using
KVM_DEV_ARM_VGIC_CPU_SYSREGS ioctl. These registers are accessed
as 64-bit. The cpu MPIDR value is passed along with register id.
It is used to identify the cpu for registers access.
The VM that supports SEIs expect it on destination machine to handle
guest aborts and hence checked for ICC_CTLR_EL1.SEIS compatibility.
Similarly, VM that supports Affinity Level 3 that is required for AArch64
mode, is required to be supported on destination machine. Hence checked
for ICC_CTLR_EL1.A3V compatibility.
The arch/arm64/kvm/vgic-sys-reg-v3.c handles read and write of VGIC
CPU registers for AArch64.
For AArch32 mode, arch/arm/kvm/vgic-v3-coproc.c file is created but
APIs are not implemented.
Updated arch/arm/include/uapi/asm/kvm.h with new definitions
required to compile for AArch32.
The version of VGIC v3 specification is defined here
Acked-by: Christoffer Dall <email@example.com>
Reviewed-by: Eric Auger <firstname.lastname@example.org>
Signed-off-by: Pavel Fedin <email@example.com>
Signed-off-by: Vijaya Kumar K <Vijaya.Kumar@cavium.com>
Signed-off-by: Marc Zyngier <firstname.lastname@example.org>