1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
|
// SPDX-License-Identifier: GPL-2.0
/*
* Support for Intel Camera Imaging ISP subsystem.
* Copyright (c) 2010 - 2015, Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*/
#include "input_system.h"
#include "ia_css_isys.h"
#include "platform_support.h"
#ifdef USE_INPUT_SYSTEM_VERSION_2401
#include "isys_dma.h" /* isys2401_dma_set_max_burst_size() */
#include "isys_irq.h"
#endif
#if defined(USE_INPUT_SYSTEM_VERSION_2)
input_system_error_t ia_css_isys_init(void)
{
backend_channel_cfg_t backend_ch0;
backend_channel_cfg_t backend_ch1;
target_cfg2400_t targetB;
target_cfg2400_t targetC;
u32 acq_mem_region_size = 24;
u32 acq_nof_mem_regions = 2;
input_system_error_t error = INPUT_SYSTEM_ERR_NO_ERROR;
memset(&backend_ch0, 0, sizeof(backend_channel_cfg_t));
memset(&backend_ch1, 0, sizeof(backend_channel_cfg_t));
memset(&targetB, 0, sizeof(targetB));
memset(&targetC, 0, sizeof(targetC));
error = input_system_configuration_reset();
if (error != INPUT_SYSTEM_ERR_NO_ERROR)
return error;
error = input_system_csi_xmem_channel_cfg(
0, /*ch_id */
INPUT_SYSTEM_PORT_A, /*port */
backend_ch0, /*backend_ch */
32, /*mem_region_size */
6, /*nof_mem_regions */
acq_mem_region_size, /*acq_mem_region_size */
acq_nof_mem_regions, /*acq_nof_mem_regions */
targetB, /*target */
3); /*nof_xmem_buffers */
if (error != INPUT_SYSTEM_ERR_NO_ERROR)
return error;
error = input_system_csi_xmem_channel_cfg(
1, /*ch_id */
INPUT_SYSTEM_PORT_B, /*port */
backend_ch0, /*backend_ch */
16, /*mem_region_size */
3, /*nof_mem_regions */
acq_mem_region_size, /*acq_mem_region_size */
acq_nof_mem_regions, /*acq_nof_mem_regions */
targetB, /*target */
3); /*nof_xmem_buffers */
if (error != INPUT_SYSTEM_ERR_NO_ERROR)
return error;
error = input_system_csi_xmem_channel_cfg(
2, /*ch_id */
INPUT_SYSTEM_PORT_C, /*port */
backend_ch1, /*backend_ch */
32, /*mem_region_size */
3, /*nof_mem_regions */
acq_mem_region_size, /*acq_mem_region_size */
acq_nof_mem_regions, /*acq_nof_mem_regions */
targetC, /*target */
2); /*nof_xmem_buffers */
if (error != INPUT_SYSTEM_ERR_NO_ERROR)
return error;
error = input_system_configuration_commit();
return error;
}
#elif defined(USE_INPUT_SYSTEM_VERSION_2401)
input_system_error_t ia_css_isys_init(void)
{
ia_css_isys_csi_rx_lut_rmgr_init();
ia_css_isys_ibuf_rmgr_init();
ia_css_isys_dma_channel_rmgr_init();
ia_css_isys_stream2mmio_sid_rmgr_init();
isys2401_dma_set_max_burst_size(ISYS2401_DMA0_ID,
1 /* Non Burst DMA transactions */);
/* Enable 2401 input system IRQ status for driver to retrieve */
isys_irqc_status_enable(ISYS_IRQ0_ID);
isys_irqc_status_enable(ISYS_IRQ1_ID);
isys_irqc_status_enable(ISYS_IRQ2_ID);
return INPUT_SYSTEM_ERR_NO_ERROR;
}
#endif
#if defined(USE_INPUT_SYSTEM_VERSION_2)
void ia_css_isys_uninit(void)
{
}
#elif defined(USE_INPUT_SYSTEM_VERSION_2401)
void ia_css_isys_uninit(void)
{
ia_css_isys_csi_rx_lut_rmgr_uninit();
ia_css_isys_ibuf_rmgr_uninit();
ia_css_isys_dma_channel_rmgr_uninit();
ia_css_isys_stream2mmio_sid_rmgr_uninit();
}
#endif
|